ArmPkg/ArmMmuLib AARCH64: cosmetic fixups

[mirror_edk2.git] / ArmPkg / Library / ArmMmuLib / AArch64 / ArmMmuLibCore.c

diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
index f2eec7191328cbbaa4d83476e5935db8889b4fe4..a43d468b73ca72adb9af58412a52c32cbbd9e992 100644 (file)
--- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
+++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
@@ -47,7 +47,7 @@ ArmMemoryAttributeToPageAttribute (
     return TT_ATTR_INDX_MEMORY_NON_CACHEABLE;\r
 \r
   default:\r
-    ASSERT(0);\r
+    ASSERT (0);\r
   case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE:\r
   case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE:\r
     if (ArmReadCurrentEL () == AARCH64_EL2)\r
@@ -78,7 +78,9 @@ PageAttributeToGcdAttribute (
     GcdAttributes = EFI_MEMORY_WB;\r
     break;\r
   default:\r
-    DEBUG ((EFI_D_ERROR, "PageAttributeToGcdAttribute: PageAttributes:0x%lX not supported.\n", PageAttributes));\r
+    DEBUG ((DEBUG_ERROR,\r
+      "PageAttributeToGcdAttribute: PageAttributes:0x%lX not supported.\n",\r
+      PageAttributes));\r
     ASSERT (0);\r
     // The Global Coherency Domain (GCD) value is defined as a bit set.\r
     // Returning 0 means no attribute has been set.\r
@@ -86,13 +88,14 @@ PageAttributeToGcdAttribute (
   }\r
 \r
   // Determine protection attributes\r
-  if (((PageAttributes & TT_AP_MASK) == TT_AP_NO_RO) || ((PageAttributes & TT_AP_MASK) == TT_AP_RO_RO)) {\r
+  if (((PageAttributes & TT_AP_MASK) == TT_AP_NO_RO) ||\r
+      ((PageAttributes & TT_AP_MASK) == TT_AP_RO_RO)) {\r
     // Read only cases map to write-protect\r
     GcdAttributes |= EFI_MEMORY_RO;\r
   }\r
 \r
   // Process eXecute Never attribute\r
-  if ((PageAttributes & (TT_PXN_MASK | TT_UXN_MASK)) != 0 ) {\r
+  if ((PageAttributes & (TT_PXN_MASK | TT_UXN_MASK)) != 0) {\r
     GcdAttributes |= EFI_MEMORY_XP;\r
   }\r
 \r
@@ -503,7 +506,7 @@ ArmConfigureMmu (
   UINT64                        TCR;\r
   EFI_STATUS                    Status;\r
 \r
-  if(MemoryTable == NULL) {\r
+  if (MemoryTable == NULL) {\r
     ASSERT (MemoryTable != NULL);\r
     return EFI_INVALID_PARAMETER;\r
   }\r
@@ -544,7 +547,9 @@ ArmConfigureMmu (
     } else if (MaxAddress < SIZE_256TB) {\r
       TCR |= TCR_PS_256TB;\r
     } else {\r
-      DEBUG ((EFI_D_ERROR, "ArmConfigureMmu: The MaxAddress 0x%lX is not supported by this MMU configuration.\n", MaxAddress));\r
+      DEBUG ((DEBUG_ERROR,\r
+        "ArmConfigureMmu: The MaxAddress 0x%lX is not supported by this MMU configuration.\n",\r
+        MaxAddress));\r
       ASSERT (0); // Bigger than 48-bit memory space are not supported\r
       return EFI_UNSUPPORTED;\r
     }\r
@@ -566,7 +571,9 @@ ArmConfigureMmu (
     } else if (MaxAddress < SIZE_256TB) {\r
       TCR |= TCR_IPS_256TB;\r
     } else {\r
-      DEBUG ((EFI_D_ERROR, "ArmConfigureMmu: The MaxAddress 0x%lX is not supported by this MMU configuration.\n", MaxAddress));\r
+      DEBUG ((DEBUG_ERROR,\r
+        "ArmConfigureMmu: The MaxAddress 0x%lX is not supported by this MMU configuration.\n",\r
+        MaxAddress));\r
       ASSERT (0); // Bigger than 48-bit memory space are not supported\r
       return EFI_UNSUPPORTED;\r
     }\r
@@ -596,9 +603,12 @@ ArmConfigureMmu (
   if (TranslationTable == NULL) {\r
     return EFI_OUT_OF_RESOURCES;\r
   }\r
-  // We set TTBR0 just after allocating the table to retrieve its location from the subsequent\r
-  // functions without needing to pass this value across the functions. The MMU is only enabled\r
-  // after the translation tables are populated.\r
+  //\r
+  // We set TTBR0 just after allocating the table to retrieve its location from\r
+  // the subsequent functions without needing to pass this value across the\r
+  // functions. The MMU is only enabled after the translation tables are\r
+  // populated.\r
+  //\r
   ArmSetTTBR0 (TranslationTable);\r
 \r
   if (TranslationTableBase != NULL) {\r
@@ -606,7 +616,7 @@ ArmConfigureMmu (
   }\r
 \r
   if (TranslationTableSize != NULL) {\r
-    *TranslationTableSize = RootTableEntryCount * sizeof(UINT64);\r
+    *TranslationTableSize = RootTableEntryCount * sizeof (UINT64);\r
   }\r
 \r
   //\r
@@ -614,21 +624,29 @@ ArmConfigureMmu (
   // when populating the page tables.\r
   //\r
   InvalidateDataCacheRange (TranslationTable,\r
-    RootTableEntryCount * sizeof(UINT64));\r
-  ZeroMem (TranslationTable, RootTableEntryCount * sizeof(UINT64));\r
+    RootTableEntryCount * sizeof (UINT64));\r
+  ZeroMem (TranslationTable, RootTableEntryCount * sizeof (UINT64));\r
 \r
   while (MemoryTable->Length != 0) {\r
     Status = FillTranslationTable (TranslationTable, MemoryTable);\r
     if (EFI_ERROR (Status)) {\r
-      goto FREE_TRANSLATION_TABLE;\r
+      goto FreeTranslationTable;\r
     }\r
     MemoryTable++;\r
   }\r
 \r
-  ArmSetMAIR (MAIR_ATTR(TT_ATTR_INDX_DEVICE_MEMORY, MAIR_ATTR_DEVICE_MEMORY) |                      // mapped to EFI_MEMORY_UC\r
-              MAIR_ATTR(TT_ATTR_INDX_MEMORY_NON_CACHEABLE, MAIR_ATTR_NORMAL_MEMORY_NON_CACHEABLE) | // mapped to EFI_MEMORY_WC\r
-              MAIR_ATTR(TT_ATTR_INDX_MEMORY_WRITE_THROUGH, MAIR_ATTR_NORMAL_MEMORY_WRITE_THROUGH) | // mapped to EFI_MEMORY_WT\r
-              MAIR_ATTR(TT_ATTR_INDX_MEMORY_WRITE_BACK, MAIR_ATTR_NORMAL_MEMORY_WRITE_BACK));       // mapped to EFI_MEMORY_WB\r
+  //\r
+  // EFI_MEMORY_UC ==> MAIR_ATTR_DEVICE_MEMORY\r
+  // EFI_MEMORY_WC ==> MAIR_ATTR_NORMAL_MEMORY_NON_CACHEABLE\r
+  // EFI_MEMORY_WT ==> MAIR_ATTR_NORMAL_MEMORY_WRITE_THROUGH\r
+  // EFI_MEMORY_WB ==> MAIR_ATTR_NORMAL_MEMORY_WRITE_BACK\r
+  //\r
+  ArmSetMAIR (\r
+    MAIR_ATTR (TT_ATTR_INDX_DEVICE_MEMORY,        MAIR_ATTR_DEVICE_MEMORY)               |\r
+    MAIR_ATTR (TT_ATTR_INDX_MEMORY_NON_CACHEABLE, MAIR_ATTR_NORMAL_MEMORY_NON_CACHEABLE) |\r
+    MAIR_ATTR (TT_ATTR_INDX_MEMORY_WRITE_THROUGH, MAIR_ATTR_NORMAL_MEMORY_WRITE_THROUGH) |\r
+    MAIR_ATTR (TT_ATTR_INDX_MEMORY_WRITE_BACK,    MAIR_ATTR_NORMAL_MEMORY_WRITE_BACK)\r
+    );\r
 \r
   ArmDisableAlignmentCheck ();\r
   ArmEnableStackAlignmentCheck ();\r
@@ -638,7 +656,7 @@ ArmConfigureMmu (
   ArmEnableMmu ();\r
   return EFI_SUCCESS;\r
 \r
-FREE_TRANSLATION_TABLE:\r
+FreeTranslationTable:\r
   FreePages (TranslationTable, 1);\r
   return Status;\r
 }\r