ArmPkg/Library/CompilerIntrinsicsLib: Enable VS2017/ARM builds

[mirror_edk2.git] / ArmPkg / Library / CompilerIntrinsicsLib / Arm / ldivmod.asm

diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.asm b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.asm
index c71bd59e4520768290a43ed63a68f8090c78b355..115a2b9c0e3c80c88feb4d004de2d192293d69c9 100644 (file)
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.asm
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.asm
@@ -1,6 +1,7 @@
 //------------------------------------------------------------------------------\r
 //\r
 // Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+// Copyright (c) 2018, Pete Batard. All rights reserved.<BR>\r
 //\r
 // This program and the accompanying materials\r
 // are licensed and made available under the terms and conditions of the BSD License\r
@@ -13,20 +14,41 @@
 //------------------------------------------------------------------------------\r
 \r
 \r
-    EXTERN  __aeabi_uldivmod\r
+    IMPORT  __aeabi_uldivmod\r
+    EXPORT  __aeabi_ldivmod\r
+    EXPORT  __rt_sdiv64\r
 \r
-    INCLUDE AsmMacroExport.inc\r
+    AREA  s___aeabi_ldivmod, CODE, READONLY, ARM\r
+\r
+    ARM\r
 \r
 ;\r
-;UINT32\r
+;INT64\r
 ;EFIAPI\r
-;__aeabi_uidivmode (\r
-;  IN UINT32  Dividen\r
-;  IN UINT32  Divisor\r
+;__rt_sdiv64 (\r
+;  IN  INT64  Divisor\r
+;  IN  INT64  Dividend\r
 ;  );\r
 ;\r
+__rt_sdiv64\r
+    ; Swap r0-r1 and r2-r3\r
+    MOV     r12, r0\r
+    MOV     r0, r2\r
+    MOV     r2, r12\r
+    MOV     r12, r1\r
+    MOV     r1, r3\r
+    MOV     r3, r12\r
+    B       __aeabi_ldivmod\r
 \r
- RVCT_ASM_EXPORT __aeabi_ldivmod\r
+;\r
+;INT64\r
+;EFIAPI\r
+;__aeabi_ldivmod (\r
+;  IN  INT64  Dividend\r
+;  IN  INT64  Divisor\r
+;  );\r
+;\r
+__aeabi_ldivmod\r
     PUSH     {r4,lr}\r
     ASRS     r4,r1,#1\r
     EOR      r4,r4,r3,LSR #1\r
@@ -39,7 +61,7 @@ L_Test1
     RSBS     r2,r2,#0\r
     RSC      r3,r3,#0\r
 L_Test2\r
-    BL       __aeabi_uldivmod  ;\r
+    BL       __aeabi_uldivmod\r
     TST      r4,#0x40000000\r
     BEQ      L_Test3\r
     RSBS     r0,r0,#0\r
@@ -53,5 +75,3 @@ L_Exit
     POP      {r4,pc}\r
 \r
     END\r
-\r
-\r