-#/** @file
-# Arm Versatile Express package.
-#
-# Copyright (c) 2011, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- DEC_SPECIFICATION = 0x00010005
- PACKAGE_NAME = ArmPlatformPkg
- PACKAGE_GUID = 3308e0a0-1d94-11e0-915c-0002a5d5c51b
- PACKAGE_VERSION = 0.1
-
-################################################################################
-#
-# Include Section - list of Include Paths that are provided by this package.
-# Comments are used for Keywords and Module Types.
-#
-# Supported Module Types:
-# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
-#
-################################################################################
-[Includes.common]
- Include # Root include for the package
-
-[Guids.common]
- gArmPlatformTokenSpaceGuid = { 0x9c0aaed4, 0x74c5, 0x4043, { 0xb4, 0x17, 0xa3, 0x22, 0x38, 0x14, 0xce, 0x76 } }
- #
- # Following Guid must match FILE_GUID in MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
- #
- gVariableRuntimeDxeFileGuid = { 0xcbd2e4d5, 0x7068, 0x4ff5, { 0xb4, 0x62, 0x98, 0x22, 0xb4, 0xad, 0x8d, 0x60 } }
-
-[PcdsFeatureFlag.common]
- gArmPlatformTokenSpaceGuid.PcdStandalone|FALSE|BOOLEAN|0x00000001
-
-[PcdsFixedAtBuild.common]
- # This PCD should be a FeaturePcd. But we used this PCD as an '#if' in an ASM file.
- # Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor.
- gArmPlatformTokenSpaceGuid.PcdMPCoreSupport|0|UINT32|0x00000002
-
- # Stack for CPU Cores in Secure Mode
- gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0|UINT32|0x00000004
- gArmPlatformTokenSpaceGuid.PcdCPUCoreSecStackSize|0|UINT32|0x00000005
-
- # Stack for CPU Cores in Secure Monitor Mode
- gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0|UINT32|0x00000006
- gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0|UINT32|0x00000007
-
- # Stack for CPU Cores in Non Secure Mode
- gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase|0|UINT32|0x00000008
- gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize|0|UINT32|0x00000009
-
- # Size of the region used by UEFI in permanent memory (Reserved 128MB by default)
- gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x08000000|UINT32|0x00000015
-
- # Size of the region reserved for fixed address allocations (Reserved 128MB by default)
- gArmPlatformTokenSpaceGuid.PcdSystemMemoryFixRegionSize|0x08000000|UINT32|0x00000014
-
- # Size to reserve in the primary core stack for PEI Global Variables
- # = sizeof(UINTN) /* PcdPeiServicePtr or HobListPtr */
- gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize|0x4|UINT32|0x00000016
- # PeiServicePtr and HobListPtr shares the same location in the PEI Global Variable list
- # PeiServicePtr is only valid with PEI Core and HobListPtr only when the PEI Core is skipped.
- gArmPlatformTokenSpaceGuid.PcdPeiServicePtrGlobalOffset|0x4|UINT32|0x00000017
- gArmPlatformTokenSpaceGuid.PcdHobListPtrGlobalOffset|0x4|UINT32|0x00000018
-
- #
- # ARM Primecells
- #
- gArmPlatformTokenSpaceGuid.PcdSP804FrequencyInMHz|1|UINT32|0x0000001D
- gArmPlatformTokenSpaceGuid.PcdSP804Timer0InterruptNum|0|UINT32|0x0000001E
-
- #
- # BDS - Boot Manager
- #
- gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Platform"|VOID*|0x00000019
- gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L""|VOID*|0x0000000C
- gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L""|VOID*|0x0000000D
- gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|""|VOID*|0x000000F
- # PcdDefaultBootType define the type of the binary pointed by PcdDefaultBootDevicePath:
- # - 0 = an EFI application
- # - 1 = a Linux kernel with ATAG support
- # - 2 = a Linux kernel with FDT support
- gArmPlatformTokenSpaceGuid.PcdDefaultBootType|0|UINT32|0x00000010
- gArmPlatformTokenSpaceGuid.PcdFdtDevicePath|L""|VOID*|0x00000011
-
- ## Timeout value for displaying progressing bar in before boot OS.
- # According to UEFI 2.0 spec, the default TimeOut should be 0xffff.
- gArmPlatformTokenSpaceGuid.PcdPlatformBootTimeOut|0xffff|UINT16|0x0000001A
-
- gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L""|VOID*|0x0000001B
- gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L""|VOID*|0x0000001C
-
+#/** @file\r
+#\r
+# Copyright (c) 2011-2018, ARM Limited. All rights reserved.\r
+# Copyright (c) 2015, Intel Corporation. All rights reserved.\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#**/\r
+\r
+[Defines]\r
+ DEC_SPECIFICATION = 0x00010005\r
+ PACKAGE_NAME = ArmPlatformPkg\r
+ PACKAGE_GUID = 3308e0a0-1d94-11e0-915c-0002a5d5c51b\r
+ PACKAGE_VERSION = 0.1\r
+\r
+################################################################################\r
+#\r
+# Include Section - list of Include Paths that are provided by this package.\r
+# Comments are used for Keywords and Module Types.\r
+#\r
+# Supported Module Types:\r
+# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION\r
+#\r
+################################################################################\r
+[Includes.common]\r
+ Include # Root include for the package\r
+\r
+[LibraryClasses]\r
+ ArmPlatformLib|Include/Library/ArmPlatformLib.h\r
+ LcdHwLib|Include/Library/LcdHwLib.h\r
+ LcdPlatformLib|Include/Library/LcdPlatformLib.h\r
+ NorFlashPlatformLib|Include/Library/NorFlashPlatformLib.h\r
+ PL011UartClockLib|Include/Library/PL011UartClockLib.h\r
+ PL011UartLib|Include/Library/PL011UartLib.h\r
+\r
+[Guids.common]\r
+ gArmPlatformTokenSpaceGuid = { 0x9c0aaed4, 0x74c5, 0x4043, { 0xb4, 0x17, 0xa3, 0x22, 0x38, 0x14, 0xce, 0x76 } }\r
+\r
+[PcdsFeatureFlag.common]\r
+ gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|FALSE|BOOLEAN|0x00000004\r
+\r
+ gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked|FALSE|BOOLEAN|0x0000003C\r
+\r
+ # Disable the GOP controller on ExitBootServices(). By default the value is FALSE,\r
+ # we assume the OS will handle the FrameBuffer from the UEFI GOP information.\r
+ gArmPlatformTokenSpaceGuid.PcdGopDisableOnExitBootServices|FALSE|BOOLEAN|0x0000003D\r
+\r
+[PcdsFixedAtBuild.common]\r
+ gArmPlatformTokenSpaceGuid.PcdCoreCount|1|UINT32|0x00000039\r
+ gArmPlatformTokenSpaceGuid.PcdClusterCount|1|UINT32|0x00000038\r
+\r
+ # Stack for CPU Cores in Non Secure Mode\r
+ gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0|UINT64|0x00000009\r
+ gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000|UINT32|0x00000037\r
+ gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000|UINT32|0x0000000A\r
+\r
+ # Size of the region used by UEFI in permanent memory (Reserved 128MB by default)\r
+ gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x08000000|UINT32|0x00000015\r
+\r
+ #\r
+ # ARM Primecells\r
+ #\r
+\r
+ ## SP805 Watchdog\r
+ gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x0|UINT32|0x00000023\r
+ gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz|32000|UINT32|0x00000021\r
+\r
+ ## PL011 UART\r
+ gArmPlatformTokenSpaceGuid.PL011UartClkInHz|24000000|UINT32|0x0000001F\r
+ gArmPlatformTokenSpaceGuid.PL011UartInteger|0|UINT32|0x00000020\r
+ gArmPlatformTokenSpaceGuid.PL011UartFractional|0|UINT32|0x0000002D\r
+ gArmPlatformTokenSpaceGuid.PL011UartInterrupt|0x00000000|UINT32|0x0000002F\r
+ gArmPlatformTokenSpaceGuid.PL011UartRegOffsetVariant|0|UINT8|0x0000003E\r
+\r
+ ## PL011 Serial Debug UART\r
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x00000000|UINT64|0x00000030\r
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|0x00000000|UINT64|0x00000031\r
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|0x00000000|UINT32|0x00000032\r
+\r
+ ## PL061 GPIO\r
+ gArmPlatformTokenSpaceGuid.PcdPL061GpioBase|0x0|UINT32|0x00000025\r
+\r
+ ## PL111 Lcd & HdLcd\r
+ gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x0|UINT32|0x00000026\r
+ gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase|0x0|UINT32|0x00000027\r
+\r
+ ## Default size for display modes upto 1920x1080 (1920 * 1080 * 4 Bytes Per Pixel)\r
+ gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferSize|0x7E9000|UINT32|0x00000043\r
+ ## If set, framebuffer memory will be reserved and mapped in the system RAM\r
+ gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferBase|0x0|UINT64|0x00000044\r
+\r
+ ## ARM Mali Display Processor DP500/DP550/DP650\r
+ gArmPlatformTokenSpaceGuid.PcdArmMaliDpBase|0x0|UINT64|0x00000050\r
+ gArmPlatformTokenSpaceGuid.PcdArmMaliDpMemoryRegionLength|0x0|UINT32|0x00000051\r
+\r
+ ## PL180 MCI\r
+ gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress|0x00000000|UINT32|0x00000028\r
+ gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x00000000|UINT32|0x00000029\r
+\r
+ # Graphics Output Pixel format\r
+ # 0 : PixelRedGreenBlueReserved8BitPerColor\r
+ # 1 : PixelBlueGreenRedReserved8BitPerColor\r
+ # 2 : PixelBitMask\r
+ # Default is set to UEFI console font format PixelBlueGreenRedReserved8BitPerColor\r
+ gArmPlatformTokenSpaceGuid.PcdGopPixelFormat|0x00000001|UINT32|0x00000040\r
+\r
+ ## If set, this will swap settings for HDLCD RED_SELECT and BLUE_SELECT registers\r
+ gArmPlatformTokenSpaceGuid.PcdArmHdLcdSwapBlueRedSelect|FALSE|BOOLEAN|0x00000045\r
+\r
+[PcdsFixedAtBuild.common,PcdsDynamic.common]\r
+ ## PL031 RealTimeClock\r
+ gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0|UINT32|0x00000024\r
+ gArmPlatformTokenSpaceGuid.PcdPL031RtcPpmAccuracy|300000000|UINT32|0x00000022\r
+\r
+ gArmPlatformTokenSpaceGuid.PcdWatchdogCount|0x0|UINT32|0x00000033\r
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