PropertyTypePsci,\r
PropertyTypeFwCfg,\r
PropertyTypePciHost,\r
+ PropertyTypeGicV3,\r
} PROPERTY_TYPE;\r
\r
typedef struct {\r
{ PropertyTypePsci, "arm,psci-0.2" },\r
{ PropertyTypeFwCfg, "qemu,fw-cfg-mmio" },\r
{ PropertyTypePciHost, "pci-host-ecam-generic" },\r
+ { PropertyTypeGicV3, "arm,gic-v3" },\r
{ PropertyTypeUnknown, "" }\r
};\r
\r
VIRTIO_TRANSPORT_DEVICE_PATH *DevicePath;\r
EFI_HANDLE Handle;\r
UINT64 RegBase;\r
- UINT64 DistBase, CpuBase;\r
+ UINT64 DistBase, CpuBase, RedistBase;\r
CONST INTERRUPT_PROPERTY *InterruptProp;\r
INT32 SecIntrNum, IntrNum, VirtIntrNum, HypIntrNum;\r
CONST CHAR8 *PsciMethod;\r
DEBUG ((EFI_D_INFO, "Found GIC @ 0x%Lx/0x%Lx\n", DistBase, CpuBase));\r
break;\r
\r
+ case PropertyTypeGicV3:\r
+ //\r
+ // The GIC v3 DT binding describes a series of at least 3 physical (base\r
+ // addresses, size) pairs: the distributor interface (GICD), at least one\r
+ // redistributor region (GICR) containing dedicated redistributor\r
+ // interfaces for all individual CPUs, and the CPU interface (GICC).\r
+ // Under virtualization, we assume that the first redistributor region\r
+ // listed covers the boot CPU. Also, our GICv3 driver only supports the\r
+ // system register CPU interface, so we can safely ignore the MMIO version\r
+ // which is listed after the sequence of redistributor interfaces.\r
+ // This means we are only interested in the first two memory regions\r
+ // supplied, and ignore everything else.\r
+ //\r
+ ASSERT (Len >= 32);\r
+\r
+ // RegProp[0..1] == { GICD base, GICD size }\r
+ DistBase = fdt64_to_cpu (((UINT64 *)RegProp)[0]);\r
+ ASSERT (DistBase < MAX_UINT32);\r
+\r
+ // RegProp[2..3] == { GICR base, GICR size }\r
+ RedistBase = fdt64_to_cpu (((UINT64 *)RegProp)[2]);\r
+ ASSERT (RedistBase < MAX_UINT32);\r
+\r
+ PcdSet32 (PcdGicDistributorBase, (UINT32)DistBase);\r
+ PcdSet32 (PcdGicRedistributorsBase, (UINT32)RedistBase);\r
+\r
+ DEBUG ((EFI_D_INFO, "Found GIC v3 (re)distributor @ 0x%Lx (0x%Lx)\n",\r
+ DistBase, RedistBase));\r
+ break;\r
+\r
case PropertyTypeRtc:\r
ASSERT (Len == 16);\r
\r