ArmPlatformPkg: Support different PL011 reg offset

[mirror_edk2.git] / ArmPlatformPkg / Include / Drivers / PL011Uart.h

diff --git a/ArmPlatformPkg/Include/Drivers/PL011Uart.h b/ArmPlatformPkg/Include/Drivers/PL011Uart.h
index d5e88e86c86814e708bc901cca2153f5b7e5f927..4957dbf85846aa316cc70c29ddbca4e2082a8373 100644 (file)
--- a/ArmPlatformPkg/Include/Drivers/PL011Uart.h
+++ b/ArmPlatformPkg/Include/Drivers/PL011Uart.h
@@ -18,7 +18,25 @@
 #include <Uefi.h>\r
 #include <Protocol/SerialIo.h>\r
 \r
+#define PL011_VARIANT_ZTE 1\r
+\r
 // PL011 Registers\r
+#if FixedPcdGet8 (PL011UartRegOffsetVariant) == PL011_VARIANT_ZTE\r
+#define UARTDR                    0x004\r
+#define UARTRSR                   0x010\r
+#define UARTECR                   0x010\r
+#define UARTFR                    0x014\r
+#define UARTIBRD                  0x024\r
+#define UARTFBRD                  0x028\r
+#define UARTLCR_H                 0x030\r
+#define UARTCR                    0x034\r
+#define UARTIFLS                  0x038\r
+#define UARTIMSC                  0x040\r
+#define UARTRIS                   0x044\r
+#define UARTMIS                   0x048\r
+#define UARTICR                   0x04c\r
+#define UARTDMACR                 0x050\r
+#else\r
 #define UARTDR                    0x000\r
 #define UARTRSR                   0x004\r
 #define UARTECR                   0x004\r
@@ -34,6 +52,7 @@
 #define UARTMIS                   0x040\r
 #define UARTICR                   0x044\r
 #define UARTDMACR                 0x048\r
+#endif\r
 \r
 #define UARTPID0                  0xFE0\r
 #define UARTPID1                  0xFE4\r
@@ -47,6 +66,17 @@
 #define UART_STATUS_ERROR_MASK    0x0F\r
 \r
 // Flag reg bits\r
+#if FixedPcdGet8 (PL011UartRegOffsetVariant) == PL011_VARIANT_ZTE\r
+#define PL011_UARTFR_RI           (1 << 0)  // Ring indicator\r
+#define PL011_UARTFR_TXFE         (1 << 7)  // Transmit FIFO empty\r
+#define PL011_UARTFR_RXFF         (1 << 6)  // Receive  FIFO full\r
+#define PL011_UARTFR_TXFF         (1 << 5)  // Transmit FIFO full\r
+#define PL011_UARTFR_RXFE         (1 << 4)  // Receive  FIFO empty\r
+#define PL011_UARTFR_BUSY         (1 << 8)  // UART busy\r
+#define PL011_UARTFR_DCD          (1 << 2)  // Data carrier detect\r
+#define PL011_UARTFR_DSR          (1 << 3)  // Data set ready\r
+#define PL011_UARTFR_CTS          (1 << 1)  // Clear to send\r
+#else\r
 #define PL011_UARTFR_RI           (1 << 8)  // Ring indicator\r
 #define PL011_UARTFR_TXFE         (1 << 7)  // Transmit FIFO empty\r
 #define PL011_UARTFR_RXFF         (1 << 6)  // Receive  FIFO full\r
@@ -56,6 +86,7 @@
 #define PL011_UARTFR_DCD          (1 << 2)  // Data carrier detect\r
 #define PL011_UARTFR_DSR          (1 << 1)  // Data set ready\r
 #define PL011_UARTFR_CTS          (1 << 0)  // Clear to send\r
+#endif\r
 \r
 // Flag reg bits - alternative names\r
 #define UART_TX_EMPTY_FLAG_MASK   PL011_UARTFR_TXFE\r