/** @file\r
*\r
-* Copyright (c) 2011, ARM Limited. All rights reserved.\r
+* Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
*\r
* This program and the accompanying materials\r
* are licensed and made available under the terms and conditions of the BSD License\r
\r
#include <Protocol/EmbeddedGpio.h>\r
\r
-// SP805 Watchdog Registers\r
+// PL061 GPIO Registers\r
#define PL061_GPIO_DATA_REG ((UINT32)PcdGet32 (PcdPL061GpioBase) + 0x000)\r
#define PL061_GPIO_DIR_REG ((UINT32)PcdGet32 (PcdPL061GpioBase) + 0x400)\r
#define PL061_GPIO_IS_REG ((UINT32)PcdGet32 (PcdPL061GpioBase) + 0x404)\r
// GPIO pins are numbered 0..7\r
#define LAST_GPIO_PIN 7\r
\r
-// All bits low except one bit high, native bit lenght\r
+// All bits low except one bit high, native bit length\r
#define GPIO_PIN_MASK(Pin) (1UL << ((UINTN)(Pin)))\r
// All bits low except one bit high, restricted to 8 bits (i.e. ensures zeros above 8bits)\r
#define GPIO_PIN_MASK_HIGH_8BIT(Pin) (GPIO_PIN_MASK(Pin) && 0xFF)\r