/** @file\r
\r
- Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>\r
+ Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
\r
**/\r
\r
-#ifndef __LCDPLATFORMLIB_H\r
-#define __LCDPLATFORMLIB_H\r
+#ifndef LCD_PLATFORM_LIB_H_\r
+#define LCD_PLATFORM_LIB_H_\r
\r
#include <Protocol/GraphicsOutput.h>\r
\r
#define LCD_VRAM_SIZE SIZE_8MB\r
\r
-//\r
// Modes definitions\r
-//\r
#define VGA 0\r
#define SVGA 1\r
#define XGA 2\r
#define SXGA 3\r
-#define UXGA 4\r
-#define HD 5\r
+#define WSXGA 4\r
+#define UXGA 5\r
+#define HD 6\r
+#define WVGA 7\r
+#define QHD 8\r
+#define WSVGA 9\r
+#define HD720 10\r
+#define WXGA 11\r
\r
-//\r
// VGA Mode: 640 x 480\r
-//\r
#define VGA_H_RES_PIXELS 640\r
#define VGA_V_RES_PIXELS 480\r
#define VGA_OSC_FREQUENCY 23750000 /* 0x016A6570 */\r
#define VGA_V_FRONT_PORCH ( 3 - 1)\r
#define VGA_V_BACK_PORCH ( 13 - 1)\r
\r
-//\r
// SVGA Mode: 800 x 600\r
-//\r
#define SVGA_H_RES_PIXELS 800\r
#define SVGA_V_RES_PIXELS 600\r
#define SVGA_OSC_FREQUENCY 38250000 /* 0x0247A610 */\r
#define SVGA_V_FRONT_PORCH ( 3 - 1)\r
#define SVGA_V_BACK_PORCH ( 17 - 1)\r
\r
-//\r
// XGA Mode: 1024 x 768\r
-//\r
#define XGA_H_RES_PIXELS 1024\r
#define XGA_V_RES_PIXELS 768\r
#define XGA_OSC_FREQUENCY 63500000 /* 0x03C8EEE0 */\r
#define XGA_V_FRONT_PORCH ( 3 - 1)\r
#define XGA_V_BACK_PORCH ( 23 - 1)\r
\r
-//\r
// SXGA Mode: 1280 x 1024\r
-//\r
#define SXGA_H_RES_PIXELS 1280\r
#define SXGA_V_RES_PIXELS 1024\r
#define SXGA_OSC_FREQUENCY 109000000 /* 0x067F3540 */\r
#define SXGA_V_FRONT_PORCH ( 3 - 1)\r
#define SXGA_V_BACK_PORCH ( 29 - 1)\r
\r
-//\r
+// WSXGA+ Mode: 1680 x 1050\r
+#define WSXGA_H_RES_PIXELS 1680\r
+#define WSXGA_V_RES_PIXELS 1050\r
+#define WSXGA_OSC_FREQUENCY 147000000 /* 0x08C30AC0 */\r
+\r
+#define WSXGA_H_SYNC (170 - 1)\r
+#define WSXGA_H_FRONT_PORCH (104 - 1)\r
+#define WSXGA_H_BACK_PORCH (274 - 1)\r
+\r
+#define WSXGA_V_SYNC ( 5 - 1)\r
+#define WSXGA_V_FRONT_PORCH ( 4 - 1)\r
+#define WSXGA_V_BACK_PORCH ( 41 - 1)\r
+\r
// UXGA Mode: 1600 x 1200\r
-//\r
#define UXGA_H_RES_PIXELS 1600\r
#define UXGA_V_RES_PIXELS 1200\r
#define UXGA_OSC_FREQUENCY 161000000 /* 0x0998AA40 */\r
#define UXGA_V_FRONT_PORCH ( 3 - 1)\r
#define UXGA_V_BACK_PORCH ( 38 - 1)\r
\r
-//\r
// HD Mode: 1920 x 1080\r
-//\r
#define HD_H_RES_PIXELS 1920\r
#define HD_V_RES_PIXELS 1080\r
-#define HD_OSC_FREQUENCY 173000000 /* 0x0A4FC540 */\r
+#define HD_OSC_FREQUENCY 165000000 /* 0x09D5B340 */\r
\r
-#define HD_H_SYNC (200 - 1)\r
+#define HD_H_SYNC ( 79 - 1)\r
#define HD_H_FRONT_PORCH (128 - 1)\r
#define HD_H_BACK_PORCH (328 - 1)\r
\r
#define HD_V_FRONT_PORCH ( 3 - 1)\r
#define HD_V_BACK_PORCH ( 32 - 1)\r
\r
-//\r
-// Colour Masks\r
-//\r
+// WVGA Mode: 800 x 480\r
+#define WVGA_H_RES_PIXELS 800\r
+#define WVGA_V_RES_PIXELS 480\r
+#define WVGA_OSC_FREQUENCY 29500000 /* 0x01C22260 */\r
+#define WVGA_H_SYNC ( 72 - 1)\r
+#define WVGA_H_FRONT_PORCH ( 24 - 1)\r
+#define WVGA_H_BACK_PORCH ( 96 - 1)\r
+#define WVGA_V_SYNC ( 7 - 1)\r
+#define WVGA_V_FRONT_PORCH ( 3 - 1)\r
+#define WVGA_V_BACK_PORCH ( 10 - 1)\r
+\r
+// QHD Mode: 960 x 540\r
+#define QHD_H_RES_PIXELS 960\r
+#define QHD_V_RES_PIXELS 540\r
+#define QHD_OSC_FREQUENCY 40750000 /* 0x026DCBB0 */\r
+#define QHD_H_SYNC ( 96 - 1)\r
+#define QHD_H_FRONT_PORCH ( 32 - 1)\r
+#define QHD_H_BACK_PORCH (128 - 1)\r
+#define QHD_V_SYNC ( 5 - 1)\r
+#define QHD_V_FRONT_PORCH ( 3 - 1)\r
+#define QHD_V_BACK_PORCH ( 14 - 1)\r
+\r
+// WSVGA Mode: 1024 x 600\r
+#define WSVGA_H_RES_PIXELS 1024\r
+#define WSVGA_V_RES_PIXELS 600\r
+#define WSVGA_OSC_FREQUENCY 49000000 /* 0x02EBAE40 */\r
+#define WSVGA_H_SYNC (104 - 1)\r
+#define WSVGA_H_FRONT_PORCH ( 40 - 1)\r
+#define WSVGA_H_BACK_PORCH (144 - 1)\r
+#define WSVGA_V_SYNC ( 10 - 1)\r
+#define WSVGA_V_FRONT_PORCH ( 3 - 1)\r
+#define WSVGA_V_BACK_PORCH ( 11 - 1)\r
+\r
+// HD720 Mode: 1280 x 720\r
+#define HD720_H_RES_PIXELS 1280\r
+#define HD720_V_RES_PIXELS 720\r
+#define HD720_OSC_FREQUENCY 74500000 /* 0x0470C7A0 */\r
+#define HD720_H_SYNC (128 - 1)\r
+#define HD720_H_FRONT_PORCH ( 64 - 1)\r
+#define HD720_H_BACK_PORCH (192 - 1)\r
+#define HD720_V_SYNC ( 5 - 1)\r
+#define HD720_V_FRONT_PORCH ( 3 - 1)\r
+#define HD720_V_BACK_PORCH ( 20 - 1)\r
+\r
+// WXGA Mode: 1280 x 800\r
+#define WXGA_H_RES_PIXELS 1280\r
+#define WXGA_V_RES_PIXELS 800\r
+#define WXGA_OSC_FREQUENCY 83500000 /* 0x04FA1BE0 */\r
+#define WXGA_H_SYNC (128 - 1)\r
+#define WXGA_H_FRONT_PORCH ( 72 - 1)\r
+#define WXGA_H_BACK_PORCH (200 - 1)\r
+#define WXGA_V_SYNC ( 6 - 1)\r
+#define WXGA_V_FRONT_PORCH ( 3 - 1)\r
+#define WXGA_V_BACK_PORCH ( 22 - 1)\r
\r
+// Colour Masks\r
#define LCD_24BPP_RED_MASK 0x00FF0000\r
#define LCD_24BPP_GREEN_MASK 0x0000FF00\r
#define LCD_24BPP_BLUE_MASK 0x000000FF\r
#define LCD_12BPP_444_BLUE_MASK 0x0000000F\r
#define LCD_12BPP_444_RESERVED_MASK 0x0000F000\r
\r
-\r
-// The enumeration indexes maps the PL111 LcdBpp values used in the LCD Control Register\r
+/** The enumeration maps the PL111 LcdBpp values used in the LCD Control\r
+ Register\r
+**/\r
typedef enum {\r
LCD_BITS_PER_PIXEL_1 = 0,\r
LCD_BITS_PER_PIXEL_2,\r
LCD_BITS_PER_PIXEL_12_444\r
} LCD_BPP;\r
\r
+// Display timing settings.\r
+typedef struct {\r
+ UINT32 Resolution;\r
+ UINT32 Sync;\r
+ UINT32 BackPorch;\r
+ UINT32 FrontPorch;\r
+} SCAN_TIMINGS;\r
+\r
+/** Platform related initialization function.\r
\r
+ @param[in] Handle Handle to the LCD device instance.\r
+\r
+ @retval EFI_SUCCESS Plaform library initialized successfully.\r
+ @retval !(EFI_SUCCESS) Other errors.\r
+**/\r
EFI_STATUS\r
LcdPlatformInitializeDisplay (\r
- VOID\r
+ IN EFI_HANDLE Handle\r
);\r
\r
+/** Allocate VRAM memory in DRAM for the framebuffer\r
+ (unless it is reserved already).\r
+\r
+ The allocated address can be used to set the framebuffer.\r
+\r
+ @param[out] VramBaseAddress A pointer to the framebuffer address.\r
+ @param[out] VramSize A pointer to the size of the frame\r
+ buffer in bytes\r
+\r
+ @retval EFI_SUCCESS Frame buffer memory allocated successfully.\r
+ @retval !(EFI_SUCCESS) Other errors.\r
+**/\r
EFI_STATUS\r
LcdPlatformGetVram (\r
OUT EFI_PHYSICAL_ADDRESS* VramBaseAddress,\r
OUT UINTN* VramSize\r
);\r
\r
+/** Return total number of modes supported.\r
+\r
+ Note: Valid mode numbers are 0 to MaxMode - 1\r
+ See Section 12.9 of the UEFI Specification 2.7\r
+\r
+ @retval UINT32 Mode Number.\r
+**/\r
UINT32\r
LcdPlatformGetMaxMode (\r
VOID\r
);\r
\r
+/** Set the requested display mode.\r
+\r
+ @param[in] ModeNumber Mode Number.\r
+\r
+ @retval EFI_SUCCESS Mode set successfully.\r
+ @retval EFI_INVALID_PARAMETER Requested mode not found.\r
+ @retval !(EFI_SUCCESS) Other errors.\r
+**/\r
EFI_STATUS\r
LcdPlatformSetMode (\r
IN UINT32 ModeNumber\r
);\r
\r
+/** Return information for the requested mode number.\r
+\r
+ @param[in] ModeNumber Mode Number.\r
+ @param[out] Info Pointer for returned mode information\r
+ (on success).\r
+\r
+ @retval EFI_SUCCESS Mode information for the requested mode\r
+ returned successfully.\r
+ @retval EFI_INVALID_PARAMETER Requested mode not found.\r
+**/\r
EFI_STATUS\r
LcdPlatformQueryMode (\r
IN UINT32 ModeNumber,\r
OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info\r
);\r
\r
+/** Return display timing information for the requested mode number.\r
+\r
+ @param[in] ModeNumber Mode Number.\r
+\r
+ @param[out] Horizontal Pointer to horizontal timing parameters.\r
+ (Resolution, Sync, Back porch, Front porch)\r
+ @param[out] Vertical Pointer to vertical timing parameters.\r
+ (Resolution, Sync, Back porch, Front porch)\r
+\r
+\r
+ @retval EFI_SUCCESS Display timing information for the requested\r
+ mode returned successfully.\r
+ @retval EFI_INVALID_PARAMETER Requested mode not found.\r
+**/\r
EFI_STATUS\r
LcdPlatformGetTimings (\r
IN UINT32 ModeNumber,\r
- OUT UINT32* HRes,\r
- OUT UINT32* HSync,\r
- OUT UINT32* HBackPorch,\r
- OUT UINT32* HFrontPorch,\r
- OUT UINT32* VRes,\r
- OUT UINT32* VSync,\r
- OUT UINT32* VBackPorch,\r
- OUT UINT32* VFrontPorch\r
+ OUT SCAN_TIMINGS **Horizontal,\r
+ OUT SCAN_TIMINGS **Vertical\r
);\r
\r
+/** Return bits per pixel information for a mode number.\r
+\r
+ @param[in] ModeNumber Mode Number.\r
+\r
+ @param[out] Bpp Pointer to value bits per pixel information.\r
+\r
+ @retval EFI_SUCCESS Bit per pixel information for the requested\r
+ mode returned successfully.\r
+ @retval EFI_INVALID_PARAMETER Requested mode not found.\r
+**/\r
EFI_STATUS\r
LcdPlatformGetBpp (\r
IN UINT32 ModeNumber,\r
OUT LCD_BPP* Bpp\r
);\r
\r
-#endif\r
+#endif /* LCD_PLATFORM_LIB_H_ */\r
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