ArmPlatformPkg: Tidy Lcd code: Coding standard

[mirror_edk2.git] / ArmPlatformPkg / Library / HdLcd / HdLcd.c

diff --git a/ArmPlatformPkg/Library/HdLcd/HdLcd.c b/ArmPlatformPkg/Library/HdLcd/HdLcd.c
index 24efb68f23e3393a96fc760732d978b6346a2807..2cd1be9d255dd5734176d752d60f06f11a047fcb 100644 (file)
--- a/ArmPlatformPkg/Library/HdLcd/HdLcd.c
+++ b/ArmPlatformPkg/Library/HdLcd/HdLcd.c
@@ -1,6 +1,6 @@
-/** @file  Lcd.c\r
+/** @file\r
 \r
-  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>\r
+  Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR>\r
 \r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
@@ -21,12 +21,9 @@
 \r
 #include "HdLcd.h"\r
 \r
-/**********************************************************************\r
- *\r
- *  This file contains all the bits of the Lcd that are\r
- *  platform independent.\r
- *\r
- **********************************************************************/\r
+/** This file contains all the bits of the Lcd that are\r
+  platform independent.\r
+**/\r
 \r
 STATIC\r
 UINTN\r
@@ -34,7 +31,7 @@ GetBytesPerPixel (
   IN  LCD_BPP       Bpp\r
   )\r
 {\r
-  switch(Bpp) {\r
+  switch (Bpp) {\r
   case LCD_BITS_PER_PIXEL_24:\r
     return 4;\r
 \r
@@ -60,21 +57,27 @@ LcdInitialize (
   )\r
 {\r
   // Disable the controller\r
-  MmioWrite32(HDLCD_REG_COMMAND, HDLCD_DISABLE);\r
+  MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);\r
 \r
   // Disable all interrupts\r
-  MmioWrite32(HDLCD_REG_INT_MASK, 0);\r
+  MmioWrite32 (HDLCD_REG_INT_MASK, 0);\r
 \r
   // Define start of the VRAM. This never changes for any graphics mode\r
-  MmioWrite32(HDLCD_REG_FB_BASE, (UINT32) VramBaseAddress);\r
+  MmioWrite32 (HDLCD_REG_FB_BASE, (UINT32)VramBaseAddress);\r
 \r
   // Setup various registers that never change\r
-  MmioWrite32(HDLCD_REG_BUS_OPTIONS,  (4 << 8) | HDLCD_BURST_8);\r
-  MmioWrite32(HDLCD_REG_POLARITIES,   HDLCD_PXCLK_LOW | HDLCD_DATA_HIGH | HDLCD_DATEN_HIGH | HDLCD_HSYNC_LOW | HDLCD_VSYNC_HIGH);\r
-  MmioWrite32(HDLCD_REG_PIXEL_FORMAT, HDLCD_LITTLE_ENDIAN | HDLCD_4BYTES_PER_PIXEL);\r
-  MmioWrite32(HDLCD_REG_RED_SELECT,   (0 << 16 | 8 << 8 |  0));\r
-  MmioWrite32(HDLCD_REG_GREEN_SELECT, (0 << 16 | 8 << 8 |  8));\r
-  MmioWrite32(HDLCD_REG_BLUE_SELECT,  (0 << 16 | 8 << 8 | 16));\r
+  MmioWrite32 (HDLCD_REG_BUS_OPTIONS,  (4 << 8) | HDLCD_BURST_8);\r
+\r
+  MmioWrite32 (HDLCD_REG_POLARITIES, HDLCD_DEFAULT_POLARITIES);\r
+\r
+  MmioWrite32 (\r
+    HDLCD_REG_PIXEL_FORMAT,\r
+    HDLCD_LITTLE_ENDIAN | HDLCD_4BYTES_PER_PIXEL\r
+    );\r
+\r
+  MmioWrite32 (HDLCD_REG_RED_SELECT,   (0 << 16 | 8 << 8 | 0));\r
+  MmioWrite32 (HDLCD_REG_GREEN_SELECT, (0 << 16 | 8 << 8 | 8));\r
+  MmioWrite32 (HDLCD_REG_BLUE_SELECT,  (0 << 16 | 8 << 8 | 16));\r
 \r
   return EFI_SUCCESS;\r
 }\r
@@ -96,46 +99,53 @@ LcdSetMode (
   UINT32            BytesPerPixel;\r
   LCD_BPP           LcdBpp;\r
 \r
-\r
   // Set the video mode timings and other relevant information\r
-  Status = LcdPlatformGetTimings (ModeNumber,\r
-                                  &HRes,&HSync,&HBackPorch,&HFrontPorch,\r
-                                  &VRes,&VSync,&VBackPorch,&VFrontPorch);\r
+  Status = LcdPlatformGetTimings (\r
+             ModeNumber,\r
+             &HRes,\r
+             &HSync,\r
+             &HBackPorch,\r
+             &HFrontPorch,\r
+             &VRes,\r
+             &VSync,\r
+             &VBackPorch,\r
+             &VFrontPorch\r
+             );\r
   ASSERT_EFI_ERROR (Status);\r
-  if (EFI_ERROR( Status )) {\r
+  if (EFI_ERROR (Status)) {\r
     return EFI_DEVICE_ERROR;\r
   }\r
 \r
-  Status = LcdPlatformGetBpp (ModeNumber,&LcdBpp);\r
+  Status = LcdPlatformGetBpp (ModeNumber, &LcdBpp);\r
   ASSERT_EFI_ERROR (Status);\r
-  if (EFI_ERROR( Status )) {\r
+  if (EFI_ERROR (Status)) {\r
     return EFI_DEVICE_ERROR;\r
   }\r
 \r
-  BytesPerPixel = GetBytesPerPixel(LcdBpp);\r
+  BytesPerPixel = GetBytesPerPixel (LcdBpp);\r
 \r
   // Disable the controller\r
-  MmioWrite32(HDLCD_REG_COMMAND, HDLCD_DISABLE);\r
+  MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);\r
 \r
   // Update the frame buffer information with the new settings\r
-  MmioWrite32(HDLCD_REG_FB_LINE_LENGTH, HRes * BytesPerPixel);\r
-  MmioWrite32(HDLCD_REG_FB_LINE_PITCH,  HRes * BytesPerPixel);\r
-  MmioWrite32(HDLCD_REG_FB_LINE_COUNT,  VRes - 1);\r
+  MmioWrite32 (HDLCD_REG_FB_LINE_LENGTH, HRes * BytesPerPixel);\r
+  MmioWrite32 (HDLCD_REG_FB_LINE_PITCH,  HRes * BytesPerPixel);\r
+  MmioWrite32 (HDLCD_REG_FB_LINE_COUNT,  VRes - 1);\r
 \r
   // Set the vertical timing information\r
-  MmioWrite32(HDLCD_REG_V_SYNC,         VSync);\r
-  MmioWrite32(HDLCD_REG_V_BACK_PORCH,   VBackPorch);\r
-  MmioWrite32(HDLCD_REG_V_DATA,         VRes - 1);\r
-  MmioWrite32(HDLCD_REG_V_FRONT_PORCH,  VFrontPorch);\r
+  MmioWrite32 (HDLCD_REG_V_SYNC,         VSync);\r
+  MmioWrite32 (HDLCD_REG_V_BACK_PORCH,   VBackPorch);\r
+  MmioWrite32 (HDLCD_REG_V_DATA,         VRes - 1);\r
+  MmioWrite32 (HDLCD_REG_V_FRONT_PORCH,  VFrontPorch);\r
 \r
   // Set the horizontal timing information\r
-  MmioWrite32(HDLCD_REG_H_SYNC,         HSync);\r
-  MmioWrite32(HDLCD_REG_H_BACK_PORCH,   HBackPorch);\r
-  MmioWrite32(HDLCD_REG_H_DATA,         HRes - 1);\r
-  MmioWrite32(HDLCD_REG_H_FRONT_PORCH,  HFrontPorch);\r
+  MmioWrite32 (HDLCD_REG_H_SYNC,         HSync);\r
+  MmioWrite32 (HDLCD_REG_H_BACK_PORCH,   HBackPorch);\r
+  MmioWrite32 (HDLCD_REG_H_DATA,         HRes - 1);\r
+  MmioWrite32 (HDLCD_REG_H_FRONT_PORCH,  HFrontPorch);\r
 \r
   // Enable the controller\r
-  MmioWrite32(HDLCD_REG_COMMAND, HDLCD_ENABLE);\r
+  MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_ENABLE);\r
 \r
   return EFI_SUCCESS;\r
 }\r