Serial I/O Port library functions with no library constructor/destructor\r
\r
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
- Copyright (c) 2012 - 2013, ARM Ltd. All rights reserved.<BR>\r
- \r
+ Copyright (c) 2012 - 2016, ARM Ltd. All rights reserved.<BR>\r
+ Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
\r
#include <Library/IoLib.h>\r
#include <Library/PcdLib.h>\r
+#include <Library/PL011UartClockLib.h>\r
+#include <Library/PL011UartLib.h>\r
#include <Library/SerialPortLib.h>\r
-#include <Library/SerialPortExtLib.h>\r
-\r
-#include <Drivers/PL011Uart.h>\r
-\r
-\r
-/**\r
\r
- Programmed hardware of Serial port.\r
+/** Initialise the serial device hardware with default settings.\r
\r
- @return Always return RETURN_UNSUPPORTED.\r
-\r
-**/\r
+ @retval RETURN_SUCCESS The serial device was initialised.\r
+ @retval RETURN_INVALID_PARAMETER One or more of the default settings\r
+ has an unsupported value.\r
+ **/\r
RETURN_STATUS\r
EFIAPI\r
SerialPortInitialize (\r
UINT8 DataBits;\r
EFI_STOP_BITS_TYPE StopBits;\r
\r
- BaudRate = (UINTN)PcdGet64 (PcdUartDefaultBaudRate);\r
- ReceiveFifoDepth = 0; // Use the default value for Fifo depth\r
- Parity = (EFI_PARITY_TYPE)PcdGet8 (PcdUartDefaultParity);\r
- DataBits = PcdGet8 (PcdUartDefaultDataBits);\r
- StopBits = (EFI_STOP_BITS_TYPE) PcdGet8 (PcdUartDefaultStopBits);\r
+ BaudRate = FixedPcdGet64 (PcdUartDefaultBaudRate);\r
+ ReceiveFifoDepth = 0; // Use default FIFO depth\r
+ Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity);\r
+ DataBits = FixedPcdGet8 (PcdUartDefaultDataBits);\r
+ StopBits = (EFI_STOP_BITS_TYPE) FixedPcdGet8 (PcdUartDefaultStopBits);\r
\r
return PL011UartInitializePort (\r
- (UINTN)PcdGet64 (PcdSerialRegisterBase),\r
- &BaudRate, &ReceiveFifoDepth, &Parity, &DataBits, &StopBits);\r
+ (UINTN)PcdGet64 (PcdSerialRegisterBase),\r
+ PL011UartClockGetFreq(),\r
+ &BaudRate,\r
+ &ReceiveFifoDepth,\r
+ &Parity,\r
+ &DataBits,\r
+ &StopBits\r
+ );\r
}\r
\r
/**\r
/**\r
Check to see if any data is available to be read from the debug device.\r
\r
- @retval EFI_SUCCESS At least one byte of data is available to be read\r
- @retval EFI_NOT_READY No data is available to be read\r
- @retval EFI_DEVICE_ERROR The serial device is not functioning properly\r
+ @retval TRUE At least one byte of data is available to be read\r
+ @retval FALSE No data is available to be read\r
\r
**/\r
BOOLEAN\r
{\r
return PL011UartPoll ((UINTN)PcdGet64 (PcdSerialRegisterBase));\r
}\r
+/**\r
+ Set new attributes to PL011.\r
+\r
+ @param BaudRate The baud rate of the serial device. If the\r
+ baud rate is not supported, the speed will\r
+ be reduced down to the nearest supported one\r
+ and the variable's value will be updated\r
+ accordingly.\r
+ @param ReceiveFifoDepth The number of characters the device will\r
+ buffer on input. If the specified value is\r
+ not supported, the variable's value will\r
+ be reduced down to the nearest supported one.\r
+ @param Timeout If applicable, the number of microseconds the\r
+ device will wait before timing out a Read or\r
+ a Write operation.\r
+ @param Parity If applicable, this is the EFI_PARITY_TYPE\r
+ that is computed or checked as each character\r
+ is transmitted or received. If the device\r
+ does not support parity, the value is the\r
+ default parity value.\r
+ @param DataBits The number of data bits in each character\r
+ @param StopBits If applicable, the EFI_STOP_BITS_TYPE number\r
+ of stop bits per character. If the device\r
+ does not support stop bits, the value is the\r
+ default stop bit value.\r
+\r
+ @retval EFI_SUCCESS All attributes were set correctly.\r
+ @retval EFI_INVALID_PARAMETERS One or more attributes has an unsupported\r
+ value.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+SerialPortSetAttributes (\r
+ IN OUT UINT64 *BaudRate,\r
+ IN OUT UINT32 *ReceiveFifoDepth,\r
+ IN OUT UINT32 *Timeout,\r
+ IN OUT EFI_PARITY_TYPE *Parity,\r
+ IN OUT UINT8 *DataBits,\r
+ IN OUT EFI_STOP_BITS_TYPE *StopBits\r
+ )\r
+{\r
+ return PL011UartInitializePort (\r
+ (UINTN)PcdGet64 (PcdSerialRegisterBase),\r
+ PL011UartClockGetFreq(),\r
+ BaudRate,\r
+ ReceiveFifoDepth,\r
+ Parity,\r
+ DataBits,\r
+ StopBits\r
+ );\r
+}\r
+\r
+/**\r
\r
+ Assert or deassert the control signals on a serial port.\r
+ The following control signals are set according their bit settings :\r
+ . Request to Send\r
+ . Data Terminal Ready\r
+\r
+ @param[in] Control The following bits are taken into account :\r
+ . EFI_SERIAL_REQUEST_TO_SEND : assert/deassert the\r
+ "Request To Send" control signal if this bit is\r
+ equal to one/zero.\r
+ . EFI_SERIAL_DATA_TERMINAL_READY : assert/deassert\r
+ the "Data Terminal Ready" control signal if this\r
+ bit is equal to one/zero.\r
+ . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : enable/disable\r
+ the hardware loopback if this bit is equal to\r
+ one/zero.\r
+ . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : not supported.\r
+ . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : enable/\r
+ disable the hardware flow control based on CTS (Clear\r
+ To Send) and RTS (Ready To Send) control signals.\r
+\r
+ @retval RETURN_SUCCESS The new control bits were set on the device.\r
+ @retval RETURN_UNSUPPORTED The device does not support this operation.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+SerialPortSetControl (\r
+ IN UINT32 Control\r
+ )\r
+{\r
+ return PL011UartSetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);\r
+}\r
+\r
+/**\r
+\r
+ Retrieve the status of the control bits on a serial device.\r
+\r
+ @param[out] Control Status of the control bits on a serial device :\r
+\r
+ . EFI_SERIAL_DATA_CLEAR_TO_SEND,\r
+ EFI_SERIAL_DATA_SET_READY,\r
+ EFI_SERIAL_RING_INDICATE,\r
+ EFI_SERIAL_CARRIER_DETECT,\r
+ EFI_SERIAL_REQUEST_TO_SEND,\r
+ EFI_SERIAL_DATA_TERMINAL_READY\r
+ are all related to the DTE (Data Terminal Equipment)\r
+ and DCE (Data Communication Equipment) modes of\r
+ operation of the serial device.\r
+ . EFI_SERIAL_INPUT_BUFFER_EMPTY : equal to one if the\r
+ receive buffer is empty, 0 otherwise.\r
+ . EFI_SERIAL_OUTPUT_BUFFER_EMPTY : equal to one if the\r
+ transmit buffer is empty, 0 otherwise.\r
+ . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : equal to one if\r
+ the hardware loopback is enabled (the output feeds\r
+ the receive buffer), 0 otherwise.\r
+ . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : equal to one\r
+ if a loopback is accomplished by software, else 0.\r
+ . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : equal to\r
+ one if the hardware flow control based on CTS (Clear\r
+ To Send) and RTS (Ready To Send) control signals is\r
+ enabled, 0 otherwise.\r
+\r
+ @retval RETURN_SUCCESS The control bits were read from the device.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+SerialPortGetControl (\r
+ OUT UINT32 *Control\r
+ )\r
+{\r
+ return PL011UartGetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);\r
+}\r
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