//\r
\r
#include <AsmMacroIoLib.h>\r
-#include <Base.h>\r
-#include <Library/PcdLib.h>\r
-#include <AutoGen.h>\r
\r
-.text\r
-.align 3\r
-\r
-GCC_ASM_IMPORT(CEntryPoint)\r
-GCC_ASM_IMPORT(ArmPlatformGetCorePosition)\r
-GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)\r
-GCC_ASM_IMPORT(ArmReadMpidr)\r
-GCC_ASM_IMPORT(ArmPlatformPeiBootAction)\r
-GCC_ASM_EXPORT(_ModuleEntryPoint)\r
-\r
-StartupAddr: .word CEntryPoint\r
-\r
-ASM_PFX(_ModuleEntryPoint):\r
+ASM_FUNC(_ModuleEntryPoint)\r
// Do early platform specific actions\r
bl ASM_PFX(ArmPlatformPeiBootAction)\r
\r
bl ASM_PFX(ArmPlatformIsPrimaryCore)\r
\r
// Get the top of the primary stacks (and the base of the secondary stacks)\r
- LoadConstantToReg (FixedPcdGet64(PcdCPUCoresStackBase), r1)\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
- add r1, r1, r2\r
+ MOV32 (r1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize))\r
\r
// r0 is equal to 1 if I am the primary core\r
cmp r0, #1\r
add r0, r0, #1\r
\r
// StackOffset = CorePos * StackSize\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)\r
+ MOV32 (r2, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))\r
mul r0, r0, r2\r
// SP = StackBase + StackOffset\r
add sp, r6, r0\r
\r
_PrepareArguments:\r
// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
- LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)\r
- add r2, r2, #4\r
- ldr r1, [r2]\r
+ MOV32 (r2, FixedPcdGet32(PcdFvBaseAddress))\r
+ ldr r1, [r2, #4]\r
\r
// Move sec startup address into a data register\r
// Ensure we're jumping to FV version of the code (not boot remapped alias)\r
- ldr r3, StartupAddr\r
+ ldr r3, =ASM_PFX(CEntryPoint)\r
\r
// Jump to PrePeiCore C code\r
// r0 = mp_id\r