ArmPlatformPkg/PrePi: replace set/way cache ops with by-VA ones

[mirror_edk2.git] / ArmPlatformPkg / PrePi / PrePi.c

diff --git a/ArmPlatformPkg/PrePi/PrePi.c b/ArmPlatformPkg/PrePi/PrePi.c
index 74284f18830c559bb19b248935e32f42ccab58e8..5129dd09a85ef71d2e30ecff605cf49c4e78119b 100644 (file)
--- a/ArmPlatformPkg/PrePi/PrePi.c
+++ b/ArmPlatformPkg/PrePi/PrePi.c
@@ -8,6 +8,7 @@
 \r
 #include <PiPei.h>\r
 \r
+#include <Library/CacheMaintenanceLib.h>\r
 #include <Library/DebugAgentLib.h>\r
 #include <Library/PrePiLib.h>\r
 #include <Library/PrintLib.h>\r
@@ -178,8 +179,6 @@ CEntryPoint (
 \r
   // Data Cache enabled on Primary core when MMU is enabled.\r
   ArmDisableDataCache ();\r
-  // Invalidate Data cache\r
-  ArmInvalidateDataCache ();\r
   // Invalidate instruction cache\r
   ArmInvalidateInstructionCache ();\r
   // Enable Instruction Caches on all cores.\r
@@ -200,6 +199,10 @@ CEntryPoint (
 \r
   // If not primary Jump to Secondary Main\r
   if (ArmPlatformIsPrimaryCore (MpId)) {\r
+\r
+    InvalidateDataCacheRange ((VOID *)UefiMemoryBase,\r
+                              FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));\r
+\r
     // Goto primary Main.\r
     PrimaryMain (UefiMemoryBase, StacksBase, StartTimeStamp);\r
   } else {\r
@@ -209,4 +212,3 @@ CEntryPoint (
   // DXE Core should always load and never return\r
   ASSERT (FALSE);\r
 }\r
-\r