//\r
-// Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+// Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
// \r
// This program and the accompanying materials \r
// are licensed and made available under the terms and conditions of the BSD License \r
.align 3\r
\r
GCC_ASM_IMPORT(CEntryPoint)\r
+GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)\r
GCC_ASM_IMPORT(ArmPlatformSecBootAction)\r
GCC_ASM_IMPORT(ArmPlatformSecBootMemoryInit)\r
GCC_ASM_IMPORT(ArmDisableInterrupts)\r
_IdentifyCpu:\r
// Identify CPU ID\r
bl ASM_PFX(ArmReadMpidr)\r
- // Get ID of this CPU in Multicore system\r
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r
- and r5, r0, r1\r
+ // Keep a copy of the MpId register value\r
+ mov r9, r0\r
\r
// Is it the Primary Core ?\r
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r3)\r
- cmp r5, r3\r
+ bl ASM_PFX(ArmPlatformIsPrimaryCore)\r
+ cmp r0, #1\r
// Only the primary core initialize the memory (SMC)\r
beq _InitMem\r
\r
// Initialize Init Boot Memory\r
bl ASM_PFX(ArmPlatformSecBootMemoryInit)\r
\r
- // Only Primary CPU could run this line (the secondary cores have jumped from _IdentifyCpu to _SetupStack)\r
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r5)\r
-\r
_SetupPrimaryCoreStack:\r
// Get the top of the primary stacks (and the base of the secondary stacks)\r
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)\r
add r1, r1, r2\r
\r
// Get the Core Position (ClusterId * 4) + CoreId\r
- GetCorePositionFromMpId(r0, r5, r2)\r
+ GetCorePositionFromMpId(r0, r9, r2)\r
// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
add r0, r0, #1\r
\r
// Jump to SEC C code\r
// r0 = mp_id\r
// r1 = Boot Mode\r
- mov r0, r5\r
+ mov r0, r9\r
mov r1, r10\r
blx r3\r
\r