/** @file\r
*\r
* Copyright (c) 2011, ARM Limited. All rights reserved.\r
-* \r
-* This program and the accompanying materials \r
-* are licensed and made available under the terms and conditions of the BSD License \r
-* which accompanies this distribution. The full text of the license may be found at \r
-* http://opensource.org/licenses/bsd-license.php \r
*\r
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+* This program and the accompanying materials\r
+* are licensed and made available under the terms and conditions of the BSD License\r
+* which accompanies this distribution. The full text of the license may be found at\r
+* http://opensource.org/licenses/bsd-license.php\r
+*\r
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
*\r
**/\r
\r
return;\r
}\r
\r
- if (FeaturePcdGet(PcdCacheEnable) == TRUE) {\r
- CacheAttributes = DDR_ATTRIBUTES_CACHED;\r
- } else {\r
- CacheAttributes = DDR_ATTRIBUTES_UNCACHED;\r
- }\r
+ CacheAttributes = DDR_ATTRIBUTES_CACHED;\r
\r
// ReMap (Either NOR Flash or DRAM)\r
- VirtualMemoryTable[Index].PhysicalBase = PcdGet32(PcdSystemMemoryBase);\r
- VirtualMemoryTable[Index].VirtualBase = PcdGet32(PcdSystemMemoryBase);\r
- VirtualMemoryTable[Index].Length = PcdGet32(PcdSystemMemorySize);\r
+ VirtualMemoryTable[Index].PhysicalBase = PcdGet64 (PcdSystemMemoryBase);\r
+ VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdSystemMemoryBase);\r
+ VirtualMemoryTable[Index].Length = PcdGet64 (PcdSystemMemorySize);\r
VirtualMemoryTable[Index].Attributes = CacheAttributes;\r
\r
// SOC Registers. L3 interconnects\r