--- /dev/null
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution. The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Abstract:\r
+;\r
+; Entry point for the coreboot UEFI payload.\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+SECTION .text\r
+\r
+; C Functions\r
+extern ASM_PFX(SecStartup)\r
+\r
+; Pcds\r
+extern ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))\r
+\r
+;\r
+; SecCore Entry Point\r
+;\r
+; Processor is in flat protected mode\r
+;\r
+; @param[in] EAX Initial value of the EAX register (BIST: Built-in Self Test)\r
+; @param[in] DI 'BP': boot-strap processor, or 'AP': application processor\r
+; @param[in] EBP Pointer to the start of the Boot Firmware Volume\r
+;\r
+; @return None This routine does not return\r
+;\r
+global ASM_PFX(_ModuleEntryPoint)\r
+ASM_PFX(_ModuleEntryPoint):\r
+ ;\r
+ ; Disable all the interrupts\r
+ ;\r
+ cli\r
+ ;\r
+ ; Construct the temporary memory at 0x80000, length 0x10000\r
+ ;\r
+ mov esp, (BASE_512KB + SIZE_64KB)\r
+\r
+ ;\r
+ ; Pass BFV into the PEI Core\r
+ ;\r
+ push DWORD [ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))]\r
+\r
+ ;\r
+ ; Pass stack base into the PEI Core\r
+ ;\r
+ push BASE_512KB\r
+\r
+ ;\r
+ ; Pass stack size into the PEI Core\r
+ ;\r
+ push SIZE_64KB\r
+\r
+ ;\r
+ ; Pass Control into the PEI Core\r
+ ;\r
+ call ASM_PFX(SecStartup)\r
+\r
+ ;\r
+ ; Should never return\r
+ ;\r
+ jmp $\r
+\r