CorebootPayloadPkg: Use generic PciBus/PciHostBridge driver

[mirror_edk2.git] / CorebootPayloadPkg / CorebootPayloadPkgIa32.dsc

diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
index dcc015140d6628a4166a31e435dc42486e4427f6..3950c00904a416cbcb1cfd7a8b6ba97e0ee8f0a3 100644 (file)
--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
+++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
@@ -38,6 +38,11 @@
   #\r
   DEFINE MAX_LOGICAL_PROCESSORS  = 64\r
 \r
+  #\r
+  # PCI options\r
+  #\r
+  DEFINE PCIE_BASE                        = 0xE0000000\r
+\r
   #\r
   # Serial port set up\r
   #\r
@@ -115,8 +120,9 @@
   PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf\r
   CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf\r
   IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf\r
-  PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf\r
-  PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf\r
+  PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf\r
+  PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf\r
+  PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf\r
   PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf\r
   PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf\r
   CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf\r
@@ -251,6 +257,8 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }\r
 \r
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|$(PCIE_BASE)\r
+\r
 !if $(SOURCE_DEBUG_ENABLE)\r
   gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2\r
 !endif\r
@@ -282,6 +290,7 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl|$(SERIAL_FIFO_CONTROL)\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize|$(SERIAL_EXTENDED_TX_FIFO_SIZE)\r
 \r
+  gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|TRUE\r
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|$(UART_DEFAULT_BAUD_RATE)\r
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits|$(UART_DEFAULT_DATA_BITS)\r
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity|$(UART_DEFAULT_PARITY)\r
@@ -418,8 +427,11 @@
   #\r
   # PCI Support\r
   #\r
-  CorebootModulePkg/PciRootBridgeNoEnumerationDxe/PciRootBridgeNoEnumeration.inf\r
-  CorebootModulePkg/PciBusNoEnumerationDxe/PciBusNoEnumeration.inf\r
+  MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
+  MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {\r
+    <LibraryClasses>\r
+      PciHostBridgeLib|CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf\r
+  }\r
 \r
   #\r
   # SCSI/ATA/IDE/DISK Support\r