CorebootModulePkg/PciHostBridgeLib: Fix PCI 64bit memory BAR size issue

[mirror_edk2.git] / CorebootPayloadPkg / Library / PciHostBridgeLib / PciHostBridgeSupport.c

diff --git a/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c b/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c
index a95ffcaf64906813d4af9520610a6d5498168c97..0f1c8cb1a2105835a3e4d6df2ec6d413406f7149 100644 (file)
--- a/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c
+++ b/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c
@@ -193,6 +193,7 @@ PcatPciRootBridgeParseBars (
   UINT32                            UpperValue;\r
   UINT64                            Mask;\r
   UINTN                             Offset;\r
+  UINTN                             LowBit;\r
   UINT64                            Base;\r
   UINT64                            Length;\r
   UINT64                            Limit;\r
@@ -262,7 +263,10 @@ PcatPciRootBridgeParseBars (
 \r
           Base = Base | LShiftU64 ((UINT64) OriginalUpperValue, 32);\r
           Length = Length | LShiftU64 ((UINT64) UpperValue, 32);\r
-          Length = (~Length) + 1;\r
+          if (Length != 0) {\r
+            LowBit = LowBitSet64 (Length);\r
+            Length = LShiftU64 (1ULL, LowBit);\r
+          }\r
 \r
           if ((Value & BIT3) == BIT3) {\r
             MemAperture = PMemAbove4G;\r