CorebootPayloadPkg: Fix various typos

[mirror_edk2.git] / CorebootPayloadPkg / Library / PlatformHookLib / PlatformHookLib.c

diff --git a/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c b/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c
index b1cfb8e2c09e8d287db30a630c310c6f2042809b..83bf0eba08490ae8129f3552d2db57f9911f717f 100644 (file)
--- a/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c
+++ b/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c
@@ -14,27 +14,27 @@
 \r
 #include <Base.h>\r
 #include <Uefi/UefiBaseType.h>\r
-#include <Library/PciLib.h>
+#include <Library/PciLib.h>\r
 #include <Library/PlatformHookLib.h>\r
 #include <Library/CbParseLib.h>\r
 #include <Library/PcdLib.h>\r
 \r
-typedef struct {
-  UINT16  VendorId;          ///< Vendor ID to match the PCI device.  The value 0xFFFF terminates the list of entries.
-  UINT16  DeviceId;          ///< Device ID to match the PCI device
-  UINT32  ClockRate;         ///< UART clock rate.  Set to 0 for default clock rate of 1843200 Hz
-  UINT64  Offset;            ///< The byte offset into to the BAR
-  UINT8   BarIndex;          ///< Which BAR to get the UART base address
-  UINT8   RegisterStride;    ///< UART register stride in bytes.  Set to 0 for default register stride of 1 byte.
-  UINT16  ReceiveFifoDepth;  ///< UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.
-  UINT16  TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.
-  UINT8   Reserved[2];
-} PCI_SERIAL_PARAMETER;
-
+typedef struct {\r
+  UINT16  VendorId;          ///< Vendor ID to match the PCI device.  The value 0xFFFF terminates the list of entries.\r
+  UINT16  DeviceId;          ///< Device ID to match the PCI device\r
+  UINT32  ClockRate;         ///< UART clock rate.  Set to 0 for default clock rate of 1843200 Hz\r
+  UINT64  Offset;            ///< The byte offset into to the BAR\r
+  UINT8   BarIndex;          ///< Which BAR to get the UART base address\r
+  UINT8   RegisterStride;    ///< UART register stride in bytes.  Set to 0 for default register stride of 1 byte.\r
+  UINT16  ReceiveFifoDepth;  ///< UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.\r
+  UINT16  TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.\r
+  UINT8   Reserved[2];\r
+} PCI_SERIAL_PARAMETER;\r
+\r
 /**\r
   Performs platform specific initialization required for the CPU to access\r
   the hardware associated with a SerialPortLib instance.  This function does\r
-  not intiailzie the serial port hardware itself.  Instead, it initializes\r
+  not initialize the serial port hardware itself.  Instead, it initializes\r
   hardware devices that are required for the CPU to access the serial port\r
   hardware.  This function may be called more than once.\r
 \r
@@ -51,16 +51,16 @@ PlatformHookSerialPortInitialize (
   RETURN_STATUS     Status;\r
   UINT32            SerialRegBase;\r
   UINT32            SerialRegAccessType;\r
-  UINT32            BaudRate;
-  UINT32            RegWidth;
-  UINT32            InputHertz;
-  UINT32            PayloadParam;
-  UINT32            DeviceVendor;
-  PCI_SERIAL_PARAMETER *SerialParam;
-\r
-  Status = CbParseSerialInfo (&SerialRegBase, &SerialRegAccessType,
-                              &RegWidth, &BaudRate, &InputHertz,
-                              &PayloadParam);
+  UINT32            BaudRate;\r
+  UINT32            RegWidth;\r
+  UINT32            InputHertz;\r
+  UINT32            PayloadParam;\r
+  UINT32            DeviceVendor;\r
+  PCI_SERIAL_PARAMETER *SerialParam;\r
+\r
+  Status = CbParseSerialInfo (&SerialRegBase, &SerialRegAccessType,\r
+                              &RegWidth, &BaudRate, &InputHertz,\r
+                              &PayloadParam);\r
   if (RETURN_ERROR (Status)) {\r
     return Status;\r
   }\r
@@ -78,34 +78,34 @@ PlatformHookSerialPortInitialize (
     return Status;\r
   }\r
 \r
-  Status = PcdSet32S (PcdSerialRegisterStride, RegWidth);
-  if (RETURN_ERROR (Status)) {
-    return Status;
-  }
-
-  Status = PcdSet32S (PcdSerialBaudRate, BaudRate);
-  if (RETURN_ERROR (Status)) {
-    return Status;
-  }
-
-  Status = PcdSet64S (PcdUartDefaultBaudRate, BaudRate);
-  if (RETURN_ERROR (Status)) {
-    return Status;
-  }
-
-  Status = PcdSet32S (PcdSerialClockRate, InputHertz);
-  if (RETURN_ERROR (Status)) {
-    return Status;
-  }
-
-  if (PayloadParam >= 0x80000000) {
-    DeviceVendor = PciRead32 (PayloadParam & 0x0ffff000);
-    SerialParam = PcdGetPtr(PcdPciSerialParameters);
-    SerialParam->VendorId = (UINT16)DeviceVendor;
-    SerialParam->DeviceId = DeviceVendor >> 16;
-    SerialParam->ClockRate = InputHertz;
-    SerialParam->RegisterStride = (UINT8)RegWidth;
-  }
-
+  Status = PcdSet32S (PcdSerialRegisterStride, RegWidth);\r
+  if (RETURN_ERROR (Status)) {\r
+    return Status;\r
+  }\r
+\r
+  Status = PcdSet32S (PcdSerialBaudRate, BaudRate);\r
+  if (RETURN_ERROR (Status)) {\r
+    return Status;\r
+  }\r
+\r
+  Status = PcdSet64S (PcdUartDefaultBaudRate, BaudRate);\r
+  if (RETURN_ERROR (Status)) {\r
+    return Status;\r
+  }\r
+\r
+  Status = PcdSet32S (PcdSerialClockRate, InputHertz);\r
+  if (RETURN_ERROR (Status)) {\r
+    return Status;\r
+  }\r
+\r
+  if (PayloadParam >= 0x80000000) {\r
+    DeviceVendor = PciRead32 (PayloadParam & 0x0ffff000);\r
+    SerialParam = PcdGetPtr(PcdPciSerialParameters);\r
+    SerialParam->VendorId = (UINT16)DeviceVendor;\r
+    SerialParam->DeviceId = DeviceVendor >> 16;\r
+    SerialParam->ClockRate = InputHertz;\r
+    SerialParam->RegisterStride = (UINT8)RegWidth;\r
+  }\r
+\r
   return RETURN_SUCCESS;\r
 }\r