+++ /dev/null
-/*++\r
-\r
-Copyright (c) 2005 - 2007, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials \r
-are licensed and made available under the terms and conditions of the BSD License \r
-which accompanies this distribution. The full text of the license may be found at \r
-http://opensource.org/licenses/bsd-license.php \r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
-\r
-Module Name:\r
-\r
- PciBus.h\r
- \r
-Abstract:\r
-\r
- PCI Bus Driver\r
-\r
-Revision History\r
-\r
---*/\r
-\r
-#ifndef _EFI_PCI_BUS_H\r
-#define _EFI_PCI_BUS_H\r
-\r
-#include <PiDxe.h>\r
-\r
-#include <Protocol/PciIo.h>\r
-#include <Protocol/PciRootBridgeIo.h>\r
-#include <Protocol/DevicePath.h>\r
-#include <Protocol/Decompress.h>\r
-#include <Protocol/UgaIo.h>\r
-#include <Protocol/LoadedImage.h>\r
-#include <Protocol/BusSpecificDriverOverride.h>\r
-\r
-#include <Guid/PciOptionRomTable.h>\r
-\r
-#include <IndustryStandard/Pci.h>\r
-#include <IndustryStandard/Acpi.h>\r
-#include <IndustryStandard/PeImage.h>\r
-\r
-#include <Library/DebugLib.h>\r
-#include <Library/UefiDriverEntryPoint.h>\r
-#include <Library/BaseLib.h>\r
-#include <Library/UefiLib.h>\r
-#include <Library/BaseMemoryLib.h>\r
-#include <Library/ReportStatusCodeLib.h>\r
-#include <Library/MemoryAllocationLib.h>\r
-#include <Library/UefiBootServicesTableLib.h>\r
-#include <Library/DevicePathLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/PeCoffLib.h>\r
-\r
-//\r
-// Driver Produced Protocol Prototypes\r
-//\r
-\r
-#define VGABASE1 0x3B0\r
-#define VGALIMIT1 0x3BB\r
-\r
-#define VGABASE2 0x3C0\r
-#define VGALIMIT2 0x3DF\r
-\r
-#define ISABASE 0x100\r
-#define ISALIMIT 0x3FF\r
-\r
-typedef enum {\r
- PciBarTypeUnknown = 0,\r
- PciBarTypeIo16,\r
- PciBarTypeIo32,\r
- PciBarTypeMem32,\r
- PciBarTypePMem32,\r
- PciBarTypeMem64,\r
- PciBarTypePMem64,\r
- PciBarTypeIo,\r
- PciBarTypeMem,\r
- PciBarTypeMaxType\r
-} PCI_BAR_TYPE;\r
-\r
-typedef struct {\r
- UINT64 BaseAddress;\r
- UINT64 Length;\r
- UINT64 Alignment;\r
- PCI_BAR_TYPE BarType;\r
- BOOLEAN Prefetchable;\r
- UINT8 MemType;\r
- UINT8 Offset;\r
-} PCI_BAR;\r
-\r
-#define PCI_IO_DEVICE_SIGNATURE SIGNATURE_32 ('p','c','i','o')\r
-\r
-#define EFI_BRIDGE_IO32_DECODE_SUPPORTED 0x0001 \r
-#define EFI_BRIDGE_PMEM32_DECODE_SUPPORTED 0x0002 \r
-#define EFI_BRIDGE_PMEM64_DECODE_SUPPORTED 0x0004 \r
-#define EFI_BRIDGE_IO16_DECODE_SUPPORTED 0x0008 \r
-#define EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED 0x0010 \r
-#define EFI_BRIDGE_MEM64_DECODE_SUPPORTED 0x0020\r
-#define EFI_BRIDGE_MEM32_DECODE_SUPPORTED 0x0040\r
-\r
-\r
-typedef struct _PCI_IO_DEVICE {\r
- UINT32 Signature;\r
- EFI_HANDLE Handle;\r
- EFI_PCI_IO_PROTOCOL PciIo;\r
- LIST_ENTRY Link;\r
-\r
- EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL PciDriverOverride;\r
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;\r
-\r
- //\r
- // PCI configuration space header type\r
- //\r
- PCI_TYPE00 Pci;\r
-\r
- //\r
- // Bus number, Device number, Function number\r
- //\r
- UINT8 BusNumber;\r
- UINT8 DeviceNumber;\r
- UINT8 FunctionNumber;\r
-\r
- //\r
- // BAR for this PCI Device\r
- //\r
- PCI_BAR PciBar[PCI_MAX_BAR];\r
-\r
- //\r
- // The bridge device this pci device is subject to\r
- //\r
- struct _PCI_IO_DEVICE *Parent;\r
-\r
- //\r
- // A linked list for children Pci Device if it is bridge device\r
- //\r
- LIST_ENTRY ChildList;\r
-\r
- //\r
- // TRUE if the PCI bus driver creates the handle for this PCI device\r
- //\r
- BOOLEAN Registered;\r
-\r
- //\r
- // TRUE if the PCI bus driver successfully allocates the resource required by\r
- // this PCI device\r
- //\r
- BOOLEAN Allocated;\r
-\r
- //\r
- // The attribute this PCI device currently set\r
- //\r
- UINT64 Attributes;\r
-\r
- //\r
- // The attributes this PCI device actually supports\r
- //\r
- UINT64 Supports;\r
-\r
- //\r
- // The resource decode the bridge supports\r
- //\r
- UINT32 Decodes;\r
-\r
- //\r
- // The OptionRom Size\r
- //\r
- UINT64 RomSize;\r
-\r
- //\r
- // TRUE if there is any EFI driver in the OptionRom\r
- //\r
- BOOLEAN BusOverride;\r
-\r
- //\r
- // A list tracking reserved resource on a bridge device\r
- //\r
- LIST_ENTRY ReservedResourceList;\r
-\r
- //\r
- // A list tracking image handle of platform specific overriding driver\r
- //\r
- LIST_ENTRY OptionRomDriverList;\r
-\r
- BOOLEAN IsPciExp;\r
-\r
-} PCI_IO_DEVICE;\r
-\r
-\r
-#define PCI_IO_DEVICE_FROM_PCI_IO_THIS(a) \\r
- CR (a, PCI_IO_DEVICE, PciIo, PCI_IO_DEVICE_SIGNATURE)\r
-\r
-#define PCI_IO_DEVICE_FROM_PCI_DRIVER_OVERRIDE_THIS(a) \\r
- CR (a, PCI_IO_DEVICE, PciDriverOverride, PCI_IO_DEVICE_SIGNATURE)\r
-\r
-#define PCI_IO_DEVICE_FROM_LINK(a) \\r
- CR (a, PCI_IO_DEVICE, Link, PCI_IO_DEVICE_SIGNATURE)\r
-\r
-//\r
-// Global Variables\r
-//\r
-extern EFI_COMPONENT_NAME_PROTOCOL gPciBusComponentName;\r
-extern EFI_COMPONENT_NAME2_PROTOCOL gPciBusComponentName2;\r
-extern EFI_DRIVER_BINDING_PROTOCOL gPciBusDriverBinding;\r
-\r
-extern BOOLEAN gFullEnumeration;\r
-extern UINT64 gAllOne;\r
-extern UINT64 gAllZero;\r
-\r
-#include "PciIo.h"\r
-#include "PciCommand.h"\r
-#include "PciDeviceSupport.h"\r
-#include "PciEnumerator.h"\r
-#include "PciEnumeratorSupport.h"\r
-#include "PciDriverOverride.h"\r
-#include "PciRomTable.h"\r
-#include "PciOptionRomSupport.h"\r
-#include "PciPowerManagement.h"\r
-\r
-\r
-#define IS_ISA_BRIDGE(_p) IS_CLASS2 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA) \r
-#define IS_INTEL_ISA_BRIDGE(_p) (IS_CLASS2 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA_PDECODE) && ((_p)->Hdr.VendorId == 0x8086) && ((_p)->Hdr.DeviceId == 0x7110))\r
-#define IS_PCI_GFX(_p) IS_CLASS2 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_OTHER)\r
-\r
-#endif\r
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