+++ /dev/null
-/*++\r
-\r
-Copyright (c) 2005 - 2006, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials \r
-are licensed and made available under the terms and conditions of the BSD License \r
-which accompanies this distribution. The full text of the license may be found at \r
-http://opensource.org/licenses/bsd-license.php \r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
-\r
-Module Name:\r
-\r
- PciCommand.c\r
- \r
-Abstract:\r
-\r
- PCI Bus Driver\r
-\r
-Revision History\r
-\r
---*/\r
-\r
-#include "PciBus.h"\r
-\r
-\r
-EFI_STATUS \r
-PciReadCommandRegister (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- OUT UINT16 *Command\r
-)\r
-/*++\r
-\r
-Routine Description:\r
-\r
-Arguments:\r
-\r
-Returns:\r
-\r
- None\r
-\r
---*/\r
-{\r
-\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
-\r
- *Command = 0;\r
- PciIo = &PciIoDevice->PciIo;\r
-\r
- return PciIo->Pci.Read (\r
- PciIo, \r
- EfiPciIoWidthUint16, \r
- PCI_COMMAND_OFFSET, \r
- 1, \r
- Command\r
- );\r
-}\r
- \r
-EFI_STATUS \r
-PciSetCommandRegister (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- IN UINT16 Command\r
-)\r
-/*++\r
-\r
-Routine Description:\r
-\r
-Arguments:\r
-\r
-Returns:\r
-\r
- None\r
-\r
---*/\r
-{\r
- UINT16 Temp;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
- \r
- Temp = Command;\r
- PciIo = &PciIoDevice->PciIo;\r
-\r
- return PciIo->Pci.Write (\r
- PciIo, \r
- EfiPciIoWidthUint16, \r
- PCI_COMMAND_OFFSET, \r
- 1, \r
- &Temp\r
- );\r
- \r
-}\r
-\r
-\r
-EFI_STATUS \r
-PciEnableCommandRegister (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- IN UINT16 Command\r
-)\r
-/*++\r
-\r
-Routine Description:\r
-\r
-Arguments:\r
-\r
-Returns:\r
-\r
- None\r
-\r
---*/\r
-{\r
- UINT16 OldCommand;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
-\r
- OldCommand = 0;\r
- PciIo = &PciIoDevice->PciIo;\r
-\r
- PciIo->Pci.Read (\r
- PciIo, \r
- EfiPciIoWidthUint16, \r
- PCI_COMMAND_OFFSET, \r
- 1, \r
- &OldCommand\r
- );\r
-\r
- OldCommand = (UINT16) (OldCommand | Command);\r
-\r
- return PciIo->Pci.Write (\r
- PciIo, \r
- EfiPciIoWidthUint16, \r
- PCI_COMMAND_OFFSET, \r
- 1, \r
- &OldCommand\r
- );\r
- \r
-}\r
-\r
-\r
-EFI_STATUS \r
-PciDisableCommandRegister (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- IN UINT16 Command\r
-)\r
-/*++\r
-\r
-Routine Description:\r
-\r
-Arguments:\r
-\r
-Returns:\r
-\r
- None\r
-\r
---*/\r
-{\r
- UINT16 OldCommand;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
-\r
- OldCommand = 0;\r
- PciIo = &PciIoDevice->PciIo;\r
-\r
- PciIo->Pci.Read (\r
- PciIo, \r
- EfiPciIoWidthUint16, \r
- PCI_COMMAND_OFFSET, \r
- 1, \r
- &OldCommand\r
- );\r
-\r
- OldCommand = (UINT16) (OldCommand & ~(Command));\r
-\r
- return PciIo->Pci.Write (\r
- PciIo, \r
- EfiPciIoWidthUint16, \r
- PCI_COMMAND_OFFSET, \r
- 1, \r
- &OldCommand\r
- );\r
- \r
-}\r
-\r
-\r
-\r
-EFI_STATUS \r
-PciSetBridgeControlRegister (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- IN UINT16 Command\r
-)\r
-/*++\r
-\r
-Routine Description:\r
-\r
-Arguments:\r
-\r
-Returns:\r
-\r
- None\r
-\r
---*/\r
-{\r
- UINT16 Temp;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
-\r
- Temp = Command;\r
- PciIo = &PciIoDevice->PciIo;\r
-\r
- return PciIo->Pci.Write (\r
- PciIo, \r
- EfiPciIoWidthUint16, \r
- PCI_BRIDGE_CONTROL_REGISTER_OFFSET, \r
- 1, \r
- &Temp\r
- );\r
- \r
-}\r
-\r
-\r
-EFI_STATUS \r
-PciEnableBridgeControlRegister (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- IN UINT16 Command\r
-)\r
-/*++\r
-\r
-Routine Description:\r
-\r
-Arguments:\r
-\r
-Returns:\r
-\r
- None\r
-\r
---*/\r
-{\r
- UINT16 OldCommand;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
-\r
- OldCommand = 0;\r
- PciIo = &PciIoDevice->PciIo;\r
-\r
- PciIo->Pci.Read (\r
- PciIo, \r
- EfiPciIoWidthUint16, \r
- PCI_BRIDGE_CONTROL_REGISTER_OFFSET, \r
- 1, \r
- &OldCommand\r
- );\r
-\r
- OldCommand = (UINT16) (OldCommand | Command);\r
-\r
- return PciIo->Pci.Write (\r
- PciIo, \r
- EfiPciIoWidthUint16, \r
- PCI_BRIDGE_CONTROL_REGISTER_OFFSET, \r
- 1, \r
- &OldCommand\r
- );\r
- \r
-}\r
-\r
-EFI_STATUS \r
-PciDisableBridgeControlRegister (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- IN UINT16 Command\r
-)\r
-/*++\r
-\r
-Routine Description:\r
-\r
-Arguments:\r
-\r
-Returns:\r
-\r
- None\r
-\r
---*/\r
-{\r
- UINT16 OldCommand;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
-\r
- OldCommand = 0;\r
- PciIo = &PciIoDevice->PciIo;\r
-\r
- PciIo->Pci.Read (\r
- PciIo, \r
- EfiPciIoWidthUint16, \r
- PCI_BRIDGE_CONTROL_REGISTER_OFFSET, \r
- 1, \r
- &OldCommand\r
- );\r
-\r
- OldCommand = (UINT16) (OldCommand & ~(Command));\r
-\r
- return PciIo->Pci.Write (\r
- PciIo, \r
- EfiPciIoWidthUint16, \r
- PCI_BRIDGE_CONTROL_REGISTER_OFFSET, \r
- 1, \r
- &OldCommand\r
- );\r
- \r
-}\r
-\r
-\r
-\r
-EFI_STATUS \r
-PciReadBridgeControlRegister (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- OUT UINT16 *Command\r
-)\r
-/*++\r
-\r
-Routine Description:\r
-\r
-Arguments:\r
-\r
-Returns:\r
-\r
- None\r
-\r
---*/\r
-{\r
-\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
-\r
- *Command = 0;\r
- PciIo = &PciIoDevice->PciIo;\r
-\r
- return PciIo->Pci.Read (\r
- PciIo, \r
- EfiPciIoWidthUint16, \r
- PCI_BRIDGE_CONTROL_REGISTER_OFFSET, \r
- 1, \r
- Command\r
- );\r
- \r
-}\r
-\r
-BOOLEAN\r
-PciCapabilitySupport (\r
- IN PCI_IO_DEVICE *PciIoDevice\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
-Arguments:\r
-\r
-Returns:\r
- \r
- None\r
-\r
---*/\r
-// TODO: PciIoDevice - add argument and description to function comment\r
-{\r
-\r
- if (PciIoDevice->Pci.Hdr.Status & EFI_PCI_STATUS_CAPABILITY) {\r
- return TRUE;\r
- }\r
-\r
- return FALSE;\r
-}\r
-\r
-EFI_STATUS\r
-LocateCapabilityRegBlock (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- IN UINT8 CapId,\r
- IN OUT UINT8 *Offset,\r
- OUT UINT8 *NextRegBlock OPTIONAL\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Locate Capability register.\r
-\r
-Arguments:\r
-\r
- PciIoDevice - A pointer to the PCI_IO_DEVICE.\r
- CapId - The capability ID.\r
- Offset - A pointer to the offset. \r
- As input: the default offset; \r
- As output: the offset of the found block.\r
- NextRegBlock - An optional pointer to return the value of next block.\r
-\r
-Returns:\r
- \r
- EFI_UNSUPPORTED - The Pci Io device is not supported.\r
- EFI_NOT_FOUND - The Pci Io device cannot be found.\r
- EFI_SUCCESS - The Pci Io device is successfully located.\r
-\r
---*/\r
-{\r
- UINT8 CapabilityPtr;\r
- UINT16 CapabilityEntry;\r
- UINT8 CapabilityID;\r
-\r
- //\r
- // To check the capability of this device supports\r
- //\r
- if (!PciCapabilitySupport (PciIoDevice)) {\r
- return EFI_UNSUPPORTED;\r
- }\r
-\r
- if (*Offset != 0) {\r
- CapabilityPtr = *Offset;\r
- } else {\r
-\r
- CapabilityPtr = 0;\r
- if (IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) {\r
-\r
- PciIoDevice->PciIo.Pci.Read (\r
- &PciIoDevice->PciIo,\r
- EfiPciIoWidthUint8,\r
- EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR,\r
- 1,\r
- &CapabilityPtr\r
- );\r
- } else {\r
-\r
- PciIoDevice->PciIo.Pci.Read (\r
- &PciIoDevice->PciIo,\r
- EfiPciIoWidthUint8,\r
- PCI_CAPBILITY_POINTER_OFFSET,\r
- 1,\r
- &CapabilityPtr\r
- );\r
- }\r
- }\r
-\r
- while ((CapabilityPtr >= 0x40) && ((CapabilityPtr & 0x03) == 0x00)) {\r
- PciIoDevice->PciIo.Pci.Read (\r
- &PciIoDevice->PciIo,\r
- EfiPciIoWidthUint16,\r
- CapabilityPtr,\r
- 1,\r
- &CapabilityEntry\r
- );\r
-\r
- CapabilityID = (UINT8) CapabilityEntry;\r
-\r
- if (CapabilityID == CapId) {\r
- *Offset = CapabilityPtr;\r
- if (NextRegBlock != NULL) {\r
- *NextRegBlock = (UINT8) (CapabilityEntry >> 8);\r
- }\r
-\r
- return EFI_SUCCESS;\r
- }\r
-\r
- CapabilityPtr = (UINT8) (CapabilityEntry >> 8);\r
- }\r
-\r
- return EFI_NOT_FOUND;\r
-}\r
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