+++ /dev/null
-/*++\r
-\r
-Copyright (c) 2005 - 2006, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials \r
-are licensed and made available under the terms and conditions of the BSD License \r
-which accompanies this distribution. The full text of the license may be found at \r
-http://opensource.org/licenses/bsd-license.php \r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
-\r
-Module Name:\r
- \r
- PciCommand.h\r
- \r
-Abstract:\r
-\r
- PCI Bus Driver\r
-\r
-Revision History\r
-\r
---*/\r
-\r
-#ifndef _EFI_PCI_COMMAND_H\r
-#define _EFI_PCI_COMMAND_H\r
-\r
-#include "PciBus.h"\r
-\r
-//\r
-// The PCI Command register bits owned by PCI Bus driver.\r
-//\r
-// They should be cleared at the beginning. The other registers\r
-// are owned by chipset, we should not touch them.\r
-//\r
-#define EFI_PCI_COMMAND_BITS_OWNED ( \\r
- EFI_PCI_COMMAND_IO_SPACE | \\r
- EFI_PCI_COMMAND_MEMORY_SPACE | \\r
- EFI_PCI_COMMAND_BUS_MASTER | \\r
- EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE | \\r
- EFI_PCI_COMMAND_VGA_PALETTE_SNOOP | \\r
- EFI_PCI_COMMAND_FAST_BACK_TO_BACK \\r
- )\r
-\r
-//\r
-// The PCI Bridge Control register bits owned by PCI Bus driver.\r
-// \r
-// They should be cleared at the beginning. The other registers\r
-// are owned by chipset, we should not touch them.\r
-//\r
-#define EFI_PCI_BRIDGE_CONTROL_BITS_OWNED ( \\r
- EFI_PCI_BRIDGE_CONTROL_ISA | \\r
- EFI_PCI_BRIDGE_CONTROL_VGA | \\r
- EFI_PCI_BRIDGE_CONTROL_VGA_16 | \\r
- EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK \\r
- )\r
-\r
-//\r
-// The PCCard Bridge Control register bits owned by PCI Bus driver.\r
-// \r
-// They should be cleared at the beginning. The other registers\r
-// are owned by chipset, we should not touch them.\r
-//\r
-#define EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED ( \\r
- EFI_PCI_BRIDGE_CONTROL_ISA | \\r
- EFI_PCI_BRIDGE_CONTROL_VGA | \\r
- EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK \\r
- )\r
-\r
-EFI_STATUS \r
-PciReadCommandRegister (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- OUT UINT16 *Command\r
-);\r
-\r
- \r
-EFI_STATUS \r
-PciSetCommandRegister (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- IN UINT16 Command\r
-);\r
-\r
-EFI_STATUS \r
-PciEnableCommandRegister (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- IN UINT16 Command\r
-);\r
-\r
-EFI_STATUS \r
-PciDisableCommandRegister (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- IN UINT16 Command\r
-);\r
-\r
-EFI_STATUS \r
-PciDisableBridgeControlRegister (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- IN UINT16 Command\r
-);\r
-\r
-\r
-EFI_STATUS \r
-PciEnableBridgeControlRegister (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- IN UINT16 Command\r
-);\r
-\r
-EFI_STATUS \r
-PciReadBridgeControlRegister (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- OUT UINT16 *Command\r
-);\r
-\r
-BOOLEAN\r
-PciCapabilitySupport (\r
- IN PCI_IO_DEVICE *PciIoDevice\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- TODO: Add function description\r
-\r
-Arguments:\r
-\r
- PciIoDevice - TODO: add argument description\r
-\r
-Returns:\r
-\r
- TODO: add return values\r
-\r
---*/\r
-;\r
-\r
-EFI_STATUS\r
-LocateCapabilityRegBlock (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- IN UINT8 CapId,\r
- IN OUT UINT8 *Offset,\r
- OUT UINT8 *NextRegBlock OPTIONAL\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Locate Capability register.\r
-\r
-Arguments:\r
-\r
- PciIoDevice - A pointer to the PCI_IO_DEVICE.\r
- CapId - The capability ID.\r
- Offset - A pointer to the offset. \r
- As input: the default offset; \r
- As output: the offset of the found block.\r
- NextRegBlock - An optional pointer to return the value of next block.\r
-\r
-Returns:\r
- \r
- EFI_UNSUPPORTED - The Pci Io device is not supported.\r
- EFI_NOT_FOUND - The Pci Io device cannot be found.\r
- EFI_SUCCESS - The Pci Io device is successfully located.\r
-\r
---*/\r
-;\r
-\r
-\r
-#endif\r
-\r