EdkCompatibilityPkg: Remove EdkCompatibilityPkg

[mirror_edk2.git] / EdkCompatibilityPkg / Foundation / Framework / Protocol / SmmCpuState / CpuSaveState.h

diff --git a/EdkCompatibilityPkg/Foundation/Framework/Protocol/SmmCpuState/CpuSaveState.h b/EdkCompatibilityPkg/Foundation/Framework/Protocol/SmmCpuState/CpuSaveState.h
deleted file mode 100644 (file)
index d541ad6..0000000
--- a/EdkCompatibilityPkg/Foundation/Framework/Protocol/SmmCpuState/CpuSaveState.h
+++ /dev/null
@@ -1,158 +0,0 @@
-/*++\r
-\r
-Copyright (c) 2005, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution.  The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-\r
-Module Name:\r
-\r
-  CpuSaveState.h\r
-\r
-Abstract:\r
-\r
-  Define data structures used by EFI_SMM_CPU_SAVE_STATE protocol.\r
-\r
-Revision History\r
-\r
-++*/\r
-\r
-#ifndef _CPUSAVESTATE_H_\r
-#define _CPUSAVESTATE_H_\r
-\r
-typedef unsigned char               ASM_UINT8;\r
-typedef ASM_UINT8                   ASM_BOOL;\r
-typedef unsigned short              ASM_UINT16;\r
-typedef unsigned long               ASM_UINT32;\r
-\r
-#ifdef _H2INC\r
-typedef double                      ASM_UINT64;\r
-#else\r
-typedef UINT64                      ASM_UINT64;\r
-#endif\r
-\r
-#ifndef __GNUC__\r
-#pragma pack (push)\r
-#pragma pack (1)\r
-#endif\r
-\r
-typedef struct _EFI_SMM_CPU_STATE32 {\r
-  ASM_UINT8                         Reserved1[0xf8];        // fe00h\r
-  ASM_UINT32                        SMBASE;                 // fef8h\r
-  ASM_UINT32                        SMMRevId;               // fefch\r
-  ASM_UINT16                        IORestart;              // ff00h\r
-  ASM_UINT16                        AutoHALTRestart;        // ff02h\r
-  ASM_UINT32                        IEDBASE;                // ff04h\r
-  ASM_UINT8                         Reserved2[0x98];        // ff08h\r
-  ASM_UINT32                        IOMemAddr;              // ffa0h\r
-  ASM_UINT32                        IOMisc;                 // ffa4h\r
-  ASM_UINT32                        _ES;\r
-  ASM_UINT32                        _CS;\r
-  ASM_UINT32                        _SS;\r
-  ASM_UINT32                        _DS;\r
-  ASM_UINT32                        _FS;\r
-  ASM_UINT32                        _GS;\r
-  ASM_UINT32                        _LDTBase;\r
-  ASM_UINT32                        _TR;\r
-  ASM_UINT32                        _DR7;\r
-  ASM_UINT32                        _DR6;\r
-  ASM_UINT32                        _EAX;\r
-  ASM_UINT32                        _ECX;\r
-  ASM_UINT32                        _EDX;\r
-  ASM_UINT32                        _EBX;\r
-  ASM_UINT32                        _ESP;\r
-  ASM_UINT32                        _EBP;\r
-  ASM_UINT32                        _ESI;\r
-  ASM_UINT32                        _EDI;\r
-  ASM_UINT32                        _EIP;\r
-  ASM_UINT32                        _EFLAGS;\r
-  ASM_UINT32                        _CR3;\r
-  ASM_UINT32                        _CR0;\r
-} EFI_SMM_CPU_STATE32;\r
-\r
-typedef struct _EFI_SMM_CPU_STATE64 {\r
-  ASM_UINT8                         Reserved1[0x1d0];       // fc00h\r
-  ASM_UINT32                        GdtBaseHiDword;         // fdd0h\r
-  ASM_UINT32                        LdtBaseHiDword;         // fdd4h\r
-  ASM_UINT32                        IdtBaseHiDword;         // fdd8h\r
-  ASM_UINT8                         Reserved2[0xc];         // fddch\r
-  ASM_UINT64                        IO_EIP;                 // fde8h\r
-  ASM_UINT8                         Reserved3[0x50];        // fdf0h\r
-  ASM_UINT32                        _CR4;                   // fe40h\r
-  ASM_UINT8                         Reserved4[0x48];        // fe44h\r
-  ASM_UINT32                        GdtBaseLoDword;         // fe8ch\r
-  ASM_UINT32                        GdtLimit;               // fe90h\r
-  ASM_UINT32                        IdtBaseLoDword;         // fe94h\r
-  ASM_UINT32                        IdtLimit;               // fe98h\r
-  ASM_UINT32                        LdtBaseLoDword;         // fe9ch\r
-  ASM_UINT32                        LdtLimit;               // fea0h\r
-  ASM_UINT32                        LdtInfo;                // fea4h\r
-  ASM_UINT8                         Reserved5[0x50];        // fea8h\r
-  ASM_UINT32                        SMBASE;                 // fef8h\r
-  ASM_UINT32                        SMMRevId;               // fefch\r
-  ASM_UINT16                        IORestart;              // ff00h\r
-  ASM_UINT16                        AutoHALTRestart;        // ff02h\r
-  ASM_UINT32                        IEDBASE;                // ff04h\r
-  ASM_UINT8                         Reserved6[0x14];        // ff08h\r
-  ASM_UINT64                        _R15;                   // ff1ch\r
-  ASM_UINT64                        _R14;\r
-  ASM_UINT64                        _R13;\r
-  ASM_UINT64                        _R12;\r
-  ASM_UINT64                        _R11;\r
-  ASM_UINT64                        _R10;\r
-  ASM_UINT64                        _R9;\r
-  ASM_UINT64                        _R8;\r
-  ASM_UINT64                        _RAX;                   // ff5ch\r
-  ASM_UINT64                        _RCX;\r
-  ASM_UINT64                        _RDX;\r
-  ASM_UINT64                        _RBX;\r
-  ASM_UINT64                        _RSP;\r
-  ASM_UINT64                        _RBP;\r
-  ASM_UINT64                        _RSI;\r
-  ASM_UINT64                        _RDI;\r
-  ASM_UINT64                        IOMemAddr;              // ff9ch\r
-  ASM_UINT32                        IOMisc;                 // ffa4h\r
-  ASM_UINT32                        _ES;                    // ffa8h\r
-  ASM_UINT32                        _CS;\r
-  ASM_UINT32                        _SS;\r
-  ASM_UINT32                        _DS;\r
-  ASM_UINT32                        _FS;\r
-  ASM_UINT32                        _GS;\r
-  ASM_UINT32                        _LDTR;                  // ffc0h\r
-  ASM_UINT32                        _TR;\r
-  ASM_UINT64                        _DR7;                   // ffc8h\r
-  ASM_UINT64                        _DR6;\r
-  ASM_UINT64                        _RIP;                   // ffd8h\r
-  ASM_UINT64                        IA32_EFER;              // ffe0h\r
-  ASM_UINT64                        _RFLAGS;                // ffe8h\r
-  ASM_UINT64                        _CR3;                   // fff0h\r
-  ASM_UINT64                        _CR0;                   // fff8h\r
-} EFI_SMM_CPU_STATE64;\r
-\r
-#ifndef __GNUC__\r
-#pragma warning (push)\r
-#pragma warning (disable: 4201)\r
-#endif\r
-\r
-\r
-typedef union _EFI_SMM_CPU_STATE {\r
-  struct {\r
-    ASM_UINT8                       Reserved[0x200];\r
-    EFI_SMM_CPU_STATE32             x86;\r
-  };\r
-  EFI_SMM_CPU_STATE64               x64;\r
-} EFI_SMM_CPU_STATE;\r
-\r
-#ifndef __GNUC__\r
-#pragma warning (pop)\r
-#pragma pack (pop)\r
-#endif\r
-\r
-#define EFI_SMM_MIN_REV_ID_x64      0x30006\r
-\r
-#endif\r