/** @file\r
- Copyright (c) 2006, Intel Corporation \r
- All rights reserved. This program and the accompanying materials \r
- are licensed and made available under the terms and conditions of the BSD License \r
- which accompanies this distribution. The full text of the license may be found at \r
- http://opensource.org/licenses/bsd-license.php \r
+ Copyright (c) 2006, Intel Corporation\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
}\r
\r
/**\r
- Reads multiple words of data from the IDE data port. \r
+ Reads multiple words of data from the IDE data port.\r
Call the IO abstraction once to do the complete read,\r
not one word at a time\r
\r
}\r
\r
/**\r
- Write multiple words of data to the IDE data port. \r
+ Write multiple words of data to the IDE data port.\r
Call the IO abstraction once to do the complete read,\r
not one word at a time\r
\r
use fixed addresses. In Native-PCI mode, get base addresses from BARs in\r
the PCI IDE controller's Configuration Space.\r
\r
- The steps to get IDE IO port registers' base addresses for each channel \r
+ The steps to get IDE IO port registers' base addresses for each channel\r
as follows:\r
\r
- 1. Examine the Programming Interface byte of the Class Code fields in PCI IDE \r
+ 1. Examine the Programming Interface byte of the Class Code fields in PCI IDE\r
controller's Configuration Space to determine the operating mode.\r
\r
2. a) In 'Compatibility' mode, use fixed addresses shown in the Table 1 below.\r
\r
Table 2. BARs for Register Mapping\r
</pre>\r
- @note Refer to Intel ICH4 datasheet, Control Block Offset: 03F4h for \r
- primary, 0374h for secondary. So 2 bytes extra offset should be \r
+ @note Refer to Intel ICH4 datasheet, Control Block Offset: 03F4h for\r
+ primary, 0374h for secondary. So 2 bytes extra offset should be\r
added to the base addresses read from BARs.\r
\r
- For more details, please refer to PCI IDE Controller Specification and Intel \r
+ For more details, please refer to PCI IDE Controller Specification and Intel\r
ICH4 Datasheet.\r
\r
@param PciIo Pointer to the EFI_PCI_IO_PROTOCOL instance\r
if ((PciData.Hdr.ClassCode[0] & IDE_PRIMARY_OPERATING_MODE) == 0) {\r
IdeRegsBaseAddr[IdePrimary].CommandBlockBaseAddr = 0x1f0;\r
IdeRegsBaseAddr[IdePrimary].ControlBlockBaseAddr = 0x3f6;\r
- IdeRegsBaseAddr[IdePrimary].BusMasterBaseAddr = \r
+ IdeRegsBaseAddr[IdePrimary].BusMasterBaseAddr =\r
(UINT16)((PciData.Device.Bar[4] & 0x0000fff0));\r
} else {\r
//\r
// The BARs should be of IO type\r
//\r
- if ((PciData.Device.Bar[0] & bit0) == 0 || \r
+ if ((PciData.Device.Bar[0] & bit0) == 0 ||\r
(PciData.Device.Bar[1] & bit0) == 0) {\r
return EFI_UNSUPPORTED;\r
}\r
}\r
\r
/**\r
- This function is used to requery IDE resources. The IDE controller will \r
- probably switch between native and legacy modes during the EFI->CSM->OS \r
+ This function is used to requery IDE resources. The IDE controller will\r
+ probably switch between native and legacy modes during the EFI->CSM->OS\r
transfer. We do this everytime before an BlkIo operation to ensure its\r
succeess.\r
\r
if (Status == EFI_SUCCESS) {\r
SataFlag = TRUE;\r
}\r
- \r
+\r
//\r
// If a channel has not been checked, check it now. Then set it to "checked" state\r
// After this step, all devices in this channel have been checked.\r
if ((EFI_ERROR (Status)) && !SataFlag) {\r
return EFI_NOT_FOUND;\r
}\r
- \r
+\r
//\r
// Device exists. test if it is an ATA device\r
//\r
}\r
\r
/**\r
- This function is called by DiscoverIdeDevice(). It is used for detect \r
- whether the IDE device exists in the specified Channel as the specified \r
+ This function is called by DiscoverIdeDevice(). It is used for detect\r
+ whether the IDE device exists in the specified Channel as the specified\r
Device Number.\r
\r
- There is two IDE channels: one is Primary Channel, the other is \r
- Secondary Channel.(Channel is the logical name for the physical "Cable".) \r
+ There is two IDE channels: one is Primary Channel, the other is\r
+ Secondary Channel.(Channel is the logical name for the physical "Cable".)\r
Different channel has different register group.\r
\r
- On each IDE channel, at most two IDE devices attach, \r
- one is called Device 0 (Master device), the other is called Device 1 \r
- (Slave device). The devices on the same channel co-use the same register \r
- group, so before sending out a command for a specified device via command \r
- register, it is a must to select the current device to accept the command \r
+ On each IDE channel, at most two IDE devices attach,\r
+ one is called Device 0 (Master device), the other is called Device 1\r
+ (Slave device). The devices on the same channel co-use the same register\r
+ group, so before sending out a command for a specified device via command\r
+ register, it is a must to select the current device to accept the command\r
by set the device number in the Head/Device Register.\r
\r
@param[in] *IdeDev\r
\r
@retval TRUE\r
successfully detects device.\r
- \r
+\r
@retval FALSE\r
any failure during detection process will return this\r
value.\r
return EFI_NOT_FOUND;\r
}\r
}\r
- \r
+\r
//\r
// Select slave device\r
//\r
MasterDeviceExist = FALSE;\r
DeviceStatus = EFI_NOT_FOUND;\r
}\r
- \r
+\r
//\r
// Master Error register is not 0x81, Go on check Slave\r
//\r
- \r
+\r
//\r
- // Stall 10ms to wait for slave device ready\r
+ // Stall 20ms to wait for slave device ready if master device not exists\r
//\r
- gBS->Stall (10000);\r
- \r
+ if (!MasterDeviceExist) {\r
+ gBS->Stall (20000);\r
+ }\r
+\r
//\r
// select slave\r
//\r
}\r
\r
/**\r
- This function is used to poll for the DRQ bit clear in the Status \r
- Register. DRQ is cleared when the device is finished transferring data. \r
+ This function is used to poll for the DRQ bit clear in the Status\r
+ Register. DRQ is cleared when the device is finished transferring data.\r
So this function is called after data transfer is finished.\r
\r
@param[in] *IdeDev\r
pointer pointing to IDE_BLK_IO_DEV data structure, used\r
to record all the information of the IDE device.\r
- \r
+\r
@param[in] TimeoutInMilliSeconds\r
used to designate the timeout for the DRQ clear.\r
\r
@retval EFI_SUCCESS\r
DRQ bit clear within the time out.\r
- \r
+\r
@retval EFI_TIMEOUT\r
DRQ bit not clear within the time out.\r
\r
}\r
\r
/**\r
- This function is used to poll for the DRQ bit clear in the Alternate \r
- Status Register. DRQ is cleared when the device is finished \r
+ This function is used to poll for the DRQ bit clear in the Alternate\r
+ Status Register. DRQ is cleared when the device is finished\r
transferring data. So this function is called after data transfer\r
is finished.\r
\r
@param[in] *IdeDev\r
pointer pointing to IDE_BLK_IO_DEV data structure, used\r
to record all the information of the IDE device.\r
- \r
+\r
@param[in] TimeoutInMilliSeconds\r
used to designate the timeout for the DRQ clear.\r
\r
@retval EFI_SUCCESS\r
DRQ bit clear within the time out.\r
- \r
+\r
@retval EFI_TIMEOUT\r
DRQ bit not clear within the time out.\r
\r
}\r
\r
/**\r
- This function is used to poll for the DRQ bit set in the \r
+ This function is used to poll for the DRQ bit set in the\r
Status Register.\r
DRQ is set when the device is ready to transfer data. So this function\r
- is called after the command is sent to the device and before required \r
+ is called after the command is sent to the device and before required\r
data is transferred.\r
\r
@param[in] IDE_BLK_IO_DEV IN *IdeDev\r
pointer pointing to IDE_BLK_IO_DEV data structure,used\r
to record all the information of the IDE device.\r
- \r
+\r
@param[in] UINTN IN TimeoutInMilliSeconds\r
used to designate the timeout for the DRQ ready.\r
\r
@retval EFI_SUCCESS\r
DRQ bit set within the time out.\r
- \r
+\r
@retval EFI_TIMEOUT\r
DRQ bit not set within the time out.\r
- \r
+\r
@retval EFI_ABORTED\r
DRQ bit not set caused by the command abort.\r
\r
}\r
\r
/**\r
- This function is used to poll for the DRQ bit set in the \r
- Alternate Status Register. DRQ is set when the device is ready to \r
- transfer data. So this function is called after the command \r
+ This function is used to poll for the DRQ bit set in the\r
+ Alternate Status Register. DRQ is set when the device is ready to\r
+ transfer data. So this function is called after the command\r
is sent to the device and before required data is transferred.\r
\r
@param[in] IDE_BLK_IO_DEV IN *IdeDev\r
pointer pointing to IDE_BLK_IO_DEV data structure, used\r
to record all the information of the IDE device.\r
- \r
+\r
@param[in] UINTN IN TimeoutInMilliSeconds\r
used to designate the timeout for the DRQ ready.\r
\r
@retval EFI_SUCCESS\r
DRQ bit set within the time out.\r
- \r
+\r
@retval EFI_TIMEOUT\r
DRQ bit not set within the time out.\r
- \r
+\r
@retval EFI_ABORTED\r
DRQ bit not set caused by the command abort.\r
\r
}\r
\r
/**\r
- This function is used to poll for the BSY bit clear in the \r
+ This function is used to poll for the BSY bit clear in the\r
Status Register. BSY is clear when the device is not busy.\r
Every command must be sent after device is not busy.\r
\r
@param[in] IDE_BLK_IO_DEV IN *IdeDev\r
pointer pointing to IDE_BLK_IO_DEV data structure, used\r
to record all the information of the IDE device.\r
- \r
+\r
@param[in] UINTN IN TimeoutInMilliSeconds\r
used to designate the timeout for the DRQ ready.\r
\r
@retval EFI_SUCCESS\r
BSY bit clear within the time out.\r
- \r
+\r
@retval EFI_TIMEOUT\r
BSY bit not clear within the time out.\r
\r
// WaitForBSYClear2\r
//\r
/**\r
- This function is used to poll for the BSY bit clear in the \r
+ This function is used to poll for the BSY bit clear in the\r
Alternate Status Register. BSY is clear when the device is not busy.\r
Every command must be sent after device is not busy.\r
\r
@param[in] IDE_BLK_IO_DEV IN *IdeDev\r
pointer pointing to IDE_BLK_IO_DEV data structure, used\r
to record all the information of the IDE device.\r
- \r
+\r
@param[in] UINTN IN TimeoutInMilliSeconds\r
used to designate the timeout for the DRQ ready.\r
\r
@retval EFI_SUCCESS\r
BSY bit clear within the time out.\r
- \r
+\r
@retval EFI_TIMEOUT\r
BSY bit not clear within the time out.\r
\r
// DRDYReady\r
//\r
/**\r
- This function is used to poll for the DRDY bit set in the \r
- Status Register. DRDY bit is set when the device is ready \r
- to accept command. Most ATA commands must be sent after \r
+ This function is used to poll for the DRDY bit set in the\r
+ Status Register. DRDY bit is set when the device is ready\r
+ to accept command. Most ATA commands must be sent after\r
DRDY set except the ATAPI Packet Command.\r
\r
@param[in] IDE_BLK_IO_DEV IN *IdeDev\r
pointer pointing to IDE_BLK_IO_DEV data structure, used\r
to record all the information of the IDE device.\r
- \r
+\r
@param[in] UINTN IN TimeoutInMilliSeconds\r
used to designate the timeout for the DRQ ready.\r
\r
@retval EFI_SUCCESS\r
DRDY bit set within the time out.\r
- \r
+\r
@retval EFI_TIMEOUT\r
DRDY bit not set within the time out.\r
\r
// DRDYReady2\r
//\r
/**\r
- This function is used to poll for the DRDY bit set in the \r
- Alternate Status Register. DRDY bit is set when the device is ready \r
- to accept command. Most ATA commands must be sent after \r
+ This function is used to poll for the DRDY bit set in the\r
+ Alternate Status Register. DRDY bit is set when the device is ready\r
+ to accept command. Most ATA commands must be sent after\r
DRDY set except the ATAPI Packet Command.\r
\r
@param[in] IDE_BLK_IO_DEV IN *IdeDev\r
pointer pointing to IDE_BLK_IO_DEV data structure, used\r
to record all the information of the IDE device.\r
- \r
+\r
@param[in] UINTN IN TimeoutInMilliSeconds\r
used to designate the timeout for the DRQ ready.\r
\r
@retval EFI_SUCCESS\r
DRDY bit set within the time out.\r
- \r
+\r
@retval EFI_TIMEOUT\r
DRDY bit not set within the time out.\r
\r
// SwapStringChars\r
//\r
/**\r
- This function is a helper function used to change the char order in a \r
+ This function is a helper function used to change the char order in a\r
string. It is designed specially for the PrintAtaModuleName() function.\r
After the IDE device is detected, the IDE driver gets the device module\r
- name by sending ATA command called ATA Identify Command or ATAPI \r
- Identify Command to the specified IDE device. The module name returned \r
- is a string of ASCII characters: the first character is bit8--bit15 \r
- of the first word, the second character is bit0--bit7 of the first word \r
- and so on. Thus the string can not be print directly before it is \r
- preprocessed by this func to change the order of characters in \r
+ name by sending ATA command called ATA Identify Command or ATAPI\r
+ Identify Command to the specified IDE device. The module name returned\r
+ is a string of ASCII characters: the first character is bit8--bit15\r
+ of the first word, the second character is bit0--bit7 of the first word\r
+ and so on. Thus the string can not be print directly before it is\r
+ preprocessed by this func to change the order of characters in\r
each word in the string.\r
\r
@param[in] CHAR8 IN *Destination\r
Indicates the destination string.\r
- \r
+\r
@param[in] CHAR8 IN *Source\r
Indicates the source string.\r
- \r
+\r
@param[in] UINT8 IN Size\r
the length of the string\r
\r
//\r
// Release all the resourses occupied by the IDE_BLK_IO_DEV\r
//\r
- \r
+\r
if (IdeBlkIoDevice->SenseData != NULL) {\r
gBS->FreePool (IdeBlkIoDevice->SenseData);\r
IdeBlkIoDevice->SenseData = NULL;\r
\r
return EFI_SUCCESS;\r
}\r
+/**\r
+ Clear pending IDE interrupt before OS loader/kernel take control of the IDE device.\r
+\r
+ @param[in] Event Pointer to this event\r
+ @param[in] Context Event hanlder private data\r
+\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+ClearInterrupt (\r
+ IN EFI_EVENT Event,\r
+ IN VOID *Context\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ UINT64 IoPortForBmis;\r
+ UINT8 RegisterValue;\r
+ IDE_BLK_IO_DEV *IdeDev;\r
+\r
+ //\r
+ // Get our context\r
+ //\r
+ IdeDev = (IDE_BLK_IO_DEV *) Context;\r
+\r
+ //\r
+ // Obtain IDE IO port registers' base addresses\r
+ //\r
+ Status = ReassignIdeResources (IdeDev);\r
+ if (EFI_ERROR (Status)) {\r
+ return;\r
+ }\r
+\r
+ //\r
+ // Check whether interrupt is pending\r
+ //\r
+\r
+ //\r
+ // Reset IDE device to force it de-assert interrupt pin\r
+ // Note: this will reset all devices on this IDE channel\r
+ //\r
+ AtaSoftReset (IdeDev);\r
+ if (EFI_ERROR (Status)) {\r
+ return;\r
+ }\r
+\r
+ //\r
+ // Get base address of IDE Bus Master Status Regsiter\r
+ //\r
+ if (IdePrimary == IdeDev->Channel) {\r
+ IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISP_OFFSET;\r
+ } else {\r
+ if (IdeSecondary == IdeDev->Channel) {\r
+ IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISS_OFFSET;\r
+ } else {\r
+ return;\r
+ }\r
+ }\r
+ //\r
+ // Read BMIS register and clear ERROR and INTR bit\r
+ //\r
+ IdeDev->PciIo->Io.Read (\r
+ IdeDev->PciIo,\r
+ EfiPciIoWidthUint8,\r
+ EFI_PCI_IO_PASS_THROUGH_BAR,\r
+ IoPortForBmis,\r
+ 1,\r
+ &RegisterValue\r
+ );\r
+\r
+ RegisterValue |= (BMIS_INTERRUPT | BMIS_ERROR);\r
+\r
+ IdeDev->PciIo->Io.Write (\r
+ IdeDev->PciIo,\r
+ EfiPciIoWidthUint8,\r
+ EFI_PCI_IO_PASS_THROUGH_BAR,\r
+ IoPortForBmis,\r
+ 1,\r
+ &RegisterValue\r
+ );\r
+\r
+ //\r
+ // Select the other device on this channel to ensure this device to release the interrupt pin\r
+ //\r
+ if (IdeDev->Device == 0) {\r
+ RegisterValue = (1 << 4) | 0xe0;\r
+ } else {\r
+ RegisterValue = (0 << 4) | 0xe0;\r
+ }\r
+ IDEWritePortB (\r
+ IdeDev->PciIo,\r
+ IdeDev->IoPort->Head,\r
+ RegisterValue\r
+ );\r
+\r
+}\r
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