1. Fixed one bug in UpdateDataCheck().

[mirror_edk2.git] / EdkModulePkg / Bus / Pci / PciBus / Dxe / PciLib.c

diff --git a/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciLib.c b/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciLib.c
index 1296836a3089592868fd1055f8195671fb455552..1601a4d61703698f5b63e63bc227ed4bc1dac913 100644 (file)
--- a/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciLib.c
+++ b/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciLib.c
@@ -1892,13 +1892,12 @@ Returns:
     //\r
   }\r
 \r
-  if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {\r
-\r
-    //\r
-    // Notify the bus allocation phase is finished for the first time\r
-    //\r
-    NotifyPhase (PciResAlloc, EfiPciHostBridgeEndBusAllocation);\r
+  //\r
+  // Notify the bus allocation phase is finished for the first time\r
+  //\r
+  NotifyPhase (PciResAlloc, EfiPciHostBridgeEndBusAllocation);\r
 \r
+  if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {\r
 \r
     if (gPciHotPlugInit != NULL) {\r
       //\r
@@ -1944,15 +1943,10 @@ Returns:
       }\r
 \r
       //\r
-      // Notify the bus allocation phase is to end\r
+      // Notify the bus allocation phase is to end for the 2nd time\r
       //\r
       NotifyPhase (PciResAlloc, EfiPciHostBridgeEndBusAllocation);\r
     }\r
-  } else {\r
-    //\r
-    // Notify the bus allocation phase is to end\r
-    //\r
-    NotifyPhase (PciResAlloc, EfiPciHostBridgeEndBusAllocation);\r
   }\r
 \r
   //\r
@@ -2215,7 +2209,9 @@ UpdateConfigData (
 {\r
   EFI_STATUS                    Status;\r
   EFI_PCI_REGISTER_VALUE_DATA   *PciRegisterData;\r
-  UINT64                        TempValue;\r
+  UINT32                        AndValue;\r
+  UINT32                        OrValue;\r
+  UINT32                        TempValue;\r
 \r
   //\r
   // check register value incompatibility\r
@@ -2224,17 +2220,27 @@ UpdateConfigData (
 \r
   if (Status == EFI_SUCCESS) {\r
 \r
+    AndValue = ((UINT32) PciRegisterData->AndValue) >> (((UINT8) Address & 0x3) * 8);\r
+    OrValue  = ((UINT32) PciRegisterData->OrValue)  >> (((UINT8) Address & 0x3) * 8);\r
+\r
     TempValue = * (UINT32 *) Buffer;\r
+    if (PciRegisterData->AndValue != VALUE_NOCARE) {\r
+      TempValue &= AndValue;\r
+    }\r
+    if (PciRegisterData->OrValue != VALUE_NOCARE) {\r
+      TempValue |= OrValue;\r
+    }\r
 \r
     switch (Width) {\r
     case EfiPciWidthUint8:\r
-      * (UINT8 *) Buffer = (UINT8) TempValue;\r
+      *(UINT8 *)Buffer = (UINT8) TempValue;\r
       break;\r
+\r
     case EfiPciWidthUint16:\r
-      * (UINT16 *) Buffer = (UINT16) TempValue;\r
+      *(UINT16 *)Buffer = (UINT16) TempValue;\r
       break;\r
     case EfiPciWidthUint32:\r
-      * (UINT32 *) Buffer = (UINT32) TempValue;\r
+      *(UINT32 *)Buffer = TempValue;\r
       break;\r
 \r
     default:\r
@@ -2366,7 +2372,7 @@ WriteConfigData (
           return Status;\r
         }\r
 \r
-        Data = Data >> ((1 << AccessWidth) * 8);\r
+        Data = RShiftU64 (Data, ((1 << AccessWidth) * 8));\r
 \r
         Stride = 1 << AccessWidth;\r
         AccessAddress += Stride;\r