return Status;\r
}\r
\r
- Stride = 1 << AccessWidth;\r
+ Stride = 1 << AccessWidth;\r
AccessAddress += Stride;\r
if (AccessAddress >= (Address + (1 << Width))) {\r
//\r
{\r
EFI_STATUS Status;\r
EFI_PCI_REGISTER_VALUE_DATA *PciRegisterData;\r
- UINT64 AndValue;\r
- UINT64 OrValue;\r
- UINT32 TempValue;\r
+ UINT64 TempValue;\r
\r
//\r
// check register value incompatibility\r
\r
if (Status == EFI_SUCCESS) {\r
\r
- AndValue = (PciRegisterData->AndValue) >> ((Address & 0x3) * 8);\r
- OrValue = (PciRegisterData->OrValue) >> ((Address & 0x3) * 8);\r
-\r
TempValue = * (UINT32 *) Buffer;\r
\r
- if (PciRegisterData->AndValue != VALUE_NOCARE) {\r
- TempValue &= (UINT32) AndValue;\r
- }\r
- if (PciRegisterData->OrValue != VALUE_NOCARE) {\r
- TempValue |= (UINT32) OrValue;\r
- }\r
-\r
switch (Width) {\r
case EfiPciWidthUint8:\r
- *(UINT32 *)Buffer = *(UINT32 *)Buffer & 0xffffff00 + (UINT8)TempValue;\r
+ * (UINT8 *) Buffer = (UINT8) TempValue;\r
break;\r
-\r
case EfiPciWidthUint16:\r
- *(UINT32 *)Buffer = *(UINT32 *)Buffer & 0xffff0000 + (UINT16)TempValue;\r
+ * (UINT16 *) Buffer = (UINT16) TempValue;\r
break;\r
case EfiPciWidthUint32:\r
- *(UINT32 *)Buffer = TempValue;\r
+ * (UINT32 *) Buffer = (UINT32) TempValue;\r
break;\r
\r
default:\r
//\r
UpdateConfigData (PciDeviceInfo, PCI_REGISTER_READ, AccessWidth, AccessAddress & 0xff, &Data);\r
\r
- Shift = (Address - AccessAddress) * 8;\r
+ Shift = (UINTN) ((Address - AccessAddress) * 8);\r
switch (Width) {\r
case EfiPciWidthUint8:\r
Data = (* (UINT8 *) Buffer) << Shift | (Data & ~(0xff << Shift));\r