\r
#include <IndustryStandard/pci22.h>\r
\r
-#define EFI_D_UHCI EFI_D_INFO\r
+#define EFI_D_UHCI EFI_D_INFO\r
\r
//\r
// stall time\r
//\r
// 50 ms\r
//\r
-#define INTERRUPT_POLLING_TIME 50 * 1000 * 10\r
+#define INTERRUPT_POLLING_TIME 50 * 1000 * 10\r
\r
//\r
// UHCI IO Space Address Register Register locates at\r
// offset 20 ~ 23h of PCI Configuration Space (UHCI spec, Revision 1.1),\r
// so, its BAR Index is 4.\r
//\r
-#define USB_BAR_INDEX 4\r
+#define USB_BAR_INDEX 4\r
\r
//\r
// One memory block uses 1 page (common buffer for QH,TD use.)\r
//\r
#define NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES 1\r
\r
-\r
#define bit(a) 1 << (a)\r
\r
//\r
#define USBCMD_MAXP bit (7) /* Max Packet (0 = 32, 1 = 64) */\r
\r
/* Status register */\r
-#define USBSTS 2 /* Status Register Offset 02-03h */\r
-#define USBSTS_USBINT bit (0) /* Interrupt due to IOC */\r
-#define USBSTS_ERROR bit (1) /* Interrupt due to error */\r
-#define USBSTS_RD bit (2) /* Resume Detect */\r
-#define USBSTS_HSE bit (3) /* Host System Error*/\r
-#define USBSTS_HCPE bit (4) /* Host Controller Process Error*/\r
-#define USBSTS_HCH bit (5) /* HC Halted */\r
+#define USBSTS 2 /* Status Register Offset 02-03h */\r
+#define USBSTS_USBINT bit (0) /* Interrupt due to IOC */\r
+#define USBSTS_ERROR bit (1) /* Interrupt due to error */\r
+#define USBSTS_RD bit (2) /* Resume Detect */\r
+#define USBSTS_HSE bit (3) /* Host System Error*/\r
+#define USBSTS_HCPE bit (4) /* Host Controller Process Error*/\r
+#define USBSTS_HCH bit (5) /* HC Halted */\r
\r
/* Interrupt enable register */\r
#define USBINTR 4 /* Interrupt Enable Register 04-05h */\r
#define USBINTR_SP bit (3) /* Short packet interrupt enable */\r
\r
/* Frame Number Register Offset 06-08h */\r
-#define USBFRNUM 6\r
+#define USBFRNUM 6\r
\r
/* Frame List Base Address Register Offset 08-0Bh */\r
-#define USBFLBASEADD 8\r
+#define USBFLBASEADD 8\r
\r
/* Start of Frame Modify Register Offset 0Ch */\r
-#define USBSOF 0x0c\r
+#define USBSOF 0x0c\r
\r
/* USB port status and control registers */\r
#define USBPORTSC1 0x10 /*Port 1 offset 10-11h */\r
//\r
// Class Code Register offset\r
//\r
-#define CLASSC 0x09\r
+#define CLASSC 0x09\r
//\r
// USB IO Space Base Address Register offset\r
//\r
-#define USBBASE 0x20\r
+#define USBBASE 0x20\r
\r
//\r
// USB legacy Support\r
//\r
-#define USB_EMULATION 0xc0\r
+#define USB_EMULATION 0xc0\r
\r
//\r
// USB Base Class Code,Sub-Class Code and Programming Interface.\r
//\r
//////////////////////////////////////////////////////////////////////////\r
#define USB_HC_DEV_FROM_THIS(a) CR (a, USB_HC_DEV, UsbHc, USB_HC_DEV_SIGNATURE)\r
+#define USB2_HC_DEV_FROM_THIS(a) CR (a, USB_HC_DEV, Usb2Hc, USB_HC_DEV_SIGNATURE)\r
\r
#define USB_HC_DEV_SIGNATURE EFI_SIGNATURE_32 ('u', 'h', 'c', 'i')\r
#define INTERRUPT_LIST_SIGNATURE EFI_SIGNATURE_32 ('i', 'n', 't', 's')\r
typedef struct {\r
UINTN Signature;\r
EFI_USB_HC_PROTOCOL UsbHc;\r
+ EFI_USB2_HC_PROTOCOL Usb2Hc;\r
EFI_PCI_IO_PROTOCOL *PciIo;\r
\r
//\r
IN EFI_PCI_IO_PROTOCOL *PciIo,\r
IN UINT32 CmdAddrOffset,\r
IN UINT16 UsbCmd\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Write UHCI Command Register\r
+\r
+Arguments:\r
+\r
+ PciIo - EFI_PCI_IO_PROTOCOL\r
+ CmdAddrOffset - Command address offset\r
+ UsbCmd - Data to write\r
+\r
+Returns:\r
+\r
+ EFI_SUCCESS\r
+\r
+--*/\r
+;\r
\r
EFI_STATUS\r
ReadUHCCommandReg (\r
IN EFI_PCI_IO_PROTOCOL *PciIo,\r
IN UINT32 CmdAddrOffset,\r
IN OUT UINT16 *Data\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Read UHCI Command Register\r
+\r
+Arguments:\r
+\r
+ PciIo - EFI_PCI_IO_PROTOCOL\r
+ CmdAddrOffset - Command address offset\r
+ Data - Data to return\r
+\r
+Returns:\r
+\r
+ EFI_SUCCESS\r
+\r
+--*/\r
+;\r
\r
EFI_STATUS\r
WriteUHCStatusReg (\r
IN EFI_PCI_IO_PROTOCOL *PciIo,\r
IN UINT32 StatusAddrOffset,\r
IN UINT16 UsbSts\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Write UHCI Staus Register\r
+\r
+Arguments:\r
+\r
+ PciIo - EFI_PCI_IO_PROTOCOL\r
+ StatusAddrOffset - Status address offset\r
+ UsbSts - Data to write\r
+\r
+Returns:\r
+\r
+ EFI_SUCCESS\r
+\r
+--*/\r
+;\r
\r
EFI_STATUS\r
ReadUHCStatusReg (\r
IN EFI_PCI_IO_PROTOCOL *PciIo,\r
IN UINT32 StatusAddrOffset,\r
IN OUT UINT16 *Data\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Read UHCI Staus Register\r
+\r
+Arguments:\r
+\r
+ PciIo - EFI_PCI_IO_PROTOCOL\r
+ StatusAddrOffset - Status address offset\r
+ UsbSts - Data to return\r
+\r
+Returns:\r
+\r
+ EFI_SUCCESS\r
+\r
+--*/\r
+;\r
\r
EFI_STATUS\r
ClearStatusReg (\r
IN EFI_PCI_IO_PROTOCOL *PciIo,\r
IN UINT32 StatusAddrOffset\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Clear the content of UHC's Status Register\r
+\r
+Arguments:\r
+\r
+ PciIo - EFI_PCI_IO_PROTOCOL\r
+ StatusAddrOffset - Status address offset\r
+ \r
+Returns:\r
+\r
+ EFI_SUCCESS\r
+\r
+--*/\r
+;\r
\r
EFI_STATUS\r
ReadUHCFrameNumberReg (\r
IN EFI_PCI_IO_PROTOCOL *PciIo,\r
IN UINT32 FrameNumAddrOffset,\r
IN OUT UINT16 *Data\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Read from UHC's Frame Number Register\r
+\r
+Arguments:\r
+\r
+ PciIo - EFI_PCI_IO_PROTOCOL\r
+ FrameNumAddrOffset - Frame number register offset\r
+ Data - Data to return \r
+Returns:\r
+\r
+ EFI_SUCCESS\r
+\r
+--*/\r
+;\r
\r
EFI_STATUS\r
WriteUHCFrameListBaseReg (\r
IN EFI_PCI_IO_PROTOCOL *PciIo,\r
IN UINT32 FlBaseAddrOffset,\r
IN UINT32 UsbFrameListBaseAddr\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Write to UHC's Frame List Base Register\r
+\r
+Arguments:\r
+\r
+ PciIo - EFI_PCI_IO_PROTOCOL\r
+ FlBaseAddrOffset - Frame Base address register\r
+ UsbFrameListBaseAddr - Address to write\r
+\r
+Returns:\r
+\r
+ EFI_SUCCESS\r
+\r
+--*/\r
+;\r
\r
EFI_STATUS\r
ReadRootPortReg (\r
IN EFI_PCI_IO_PROTOCOL *PciIo,\r
IN UINT32 PortAddrOffset,\r
IN OUT UINT16 *Data\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Read from UHC's Root Port Register\r
+\r
+Arguments:\r
+\r
+ PciIo - EFI_PCI_IO_PROTOCOL\r
+ PortAddrOffset - Port Addrress Offset,\r
+ Data - Data to return\r
+Returns:\r
+\r
+ EFI_SUCCESS\r
+\r
+--*/\r
+;\r
\r
EFI_STATUS\r
WriteRootPortReg (\r
IN EFI_PCI_IO_PROTOCOL *PciIo,\r
IN UINT32 PortAddrOffset,\r
IN UINT16 ControlBits\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Write to UHC's Root Port Register\r
+\r
+Arguments:\r
+\r
+ PciIo - EFI_PCI_IO_PROTOCOL\r
+ PortAddrOffset - Port Addrress Offset,\r
+ ControlBits - Data to write\r
+Returns:\r
+\r
+ EFI_SUCCESS\r
+\r
+--*/\r
+;\r
\r
EFI_STATUS\r
WaitForUHCHalt (\r
IN EFI_PCI_IO_PROTOCOL *PciIo,\r
IN UINT32 StatusRegAddr,\r
IN UINTN Timeout\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Wait until UHCI halt or timeout\r
+\r
+Arguments:\r
+\r
+ PciIo - EFI_PCI_IO_PROTOCOL\r
+ StatusRegAddr - Status Register Address\r
+ Timeout - Time out value in us\r
+\r
+Returns:\r
+\r
+ EFI_DEVICE_ERROR - Unable to read the status register\r
+ EFI_TIMEOUT - Time out\r
+ EFI_SUCCESS - Success\r
+\r
+--*/\r
+;\r
\r
BOOLEAN\r
IsStatusOK (\r
IN EFI_PCI_IO_PROTOCOL *PciIo,\r
IN UINT32 StatusRegAddr\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Judge whether the host controller operates well\r
+\r
+Arguments:\r
+\r
+ PciIo - EFI_PCI_IO_PROTOCOL\r
+ StatusRegAddr - Status register address\r
+\r
+Returns:\r
+\r
+ TRUE - Status is good\r
+ FALSE - Status is bad\r
+\r
+--*/\r
+;\r
\r
BOOLEAN\r
IsHostSysOrProcessErr (\r
IN EFI_PCI_IO_PROTOCOL *PciIo,\r
IN UINT32 StatusRegAddr\r
- );\r
+ )\r
+/*++\r
\r
-//\r
-// This routine programs the USB frame number register. We assume that the\r
-// HC schedule execution is stopped.\r
-//\r
-EFI_STATUS\r
-SetFrameNumberReg (\r
- IN EFI_PCI_IO_PROTOCOL *PciIo,\r
- IN UINT32 FRNUMAddr,\r
- IN UINT16 Index\r
- );\r
+Routine Description:\r
+\r
+ Judge the status is HostSys,ProcessErr error or good\r
+\r
+Arguments:\r
+\r
+ PciIo - EFI_PCI_IO_PROTOCOL\r
+ StatusRegAddr - Status register address\r
+\r
+Returns:\r
+\r
+ TRUE - Status is good\r
+ FALSE - Status is bad\r
+\r
+--*/\r
+;\r
\r
UINT16\r
GetCurrentFrameNumber (\r
IN EFI_PCI_IO_PROTOCOL *PciIo,\r
- IN UINT32 FRNUMAddr\r
- );\r
+ IN UINT32 FrameNumAddrOffset\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Get Current Frame Number\r
+\r
+Arguments:\r
+\r
+ PciIo - EFI_PCI_IO_PROTOCOL\r
+ FrameNumAddrOffset - FrameNum register AddrOffset\r
+\r
+Returns:\r
+\r
+ Frame number \r
+\r
+--*/\r
+;\r
\r
EFI_STATUS\r
SetFrameListBaseAddress (\r
IN EFI_PCI_IO_PROTOCOL *PciIo,\r
IN UINT32 FLBASEADDRReg,\r
IN UINT32 Addr\r
- );\r
-\r
-UINT32\r
-GetFrameListBaseAddress (\r
- IN EFI_PCI_IO_PROTOCOL *PciIo,\r
- IN UINT32 FLBAddr\r
- );\r
+ )\r
+/*++\r
\r
-EFI_STATUS\r
-CreateFrameList (\r
- IN USB_HC_DEV *HcDev,\r
- IN UINT32 FLBASEADDRReg\r
- );\r
+Routine Description:\r
\r
-EFI_STATUS\r
-FreeFrameListEntry (\r
- IN USB_HC_DEV *UhcDev\r
- );\r
+ Set FrameListBase Address\r
\r
-VOID\r
-InitFrameList (\r
- IN USB_HC_DEV *HcDev\r
- );\r
+Arguments:\r
\r
+ PciIo - EFI_PCI_IO_PROTOCOL\r
+ FlBaseAddrReg - FrameListBase register\r
+ Addr - Address to set\r
\r
-EFI_STATUS\r
-CreateQH (\r
- IN USB_HC_DEV *HcDev,\r
- OUT QH_STRUCT **pptrQH\r
- );\r
+Returns:\r
\r
-VOID\r
-SetQHHorizontalLinkPtr (\r
- IN QH_STRUCT *ptrQH,\r
- IN VOID *ptrNext\r
- );\r
+ EFI_SUCCESS\r
\r
-VOID *\r
-GetQHHorizontalLinkPtr (\r
- IN QH_STRUCT *ptrQH\r
- );\r
+--*/\r
+;\r
\r
-VOID\r
-SetQHHorizontalQHorTDSelect (\r
- IN QH_STRUCT *ptrQH,\r
- IN BOOLEAN bQH\r
- );\r
+UINT32\r
+GetFrameListBaseAddress (\r
+ IN EFI_PCI_IO_PROTOCOL *PciIo,\r
+ IN UINT32 FLBAddr\r
+ )\r
+/*++\r
\r
-VOID\r
-SetQHHorizontalValidorInvalid (\r
- IN QH_STRUCT *ptrQH,\r
- IN BOOLEAN bValid\r
- );\r
+Routine Description:\r
\r
-VOID\r
-SetQHVerticalLinkPtr (\r
- IN QH_STRUCT *ptrQH,\r
- IN VOID *ptrNext\r
- );\r
+ Get Current Frame Number\r
\r
-VOID * \r
-GetQHVerticalLinkPtr (\r
- IN QH_STRUCT *ptrQH\r
- );\r
+Arguments:\r
\r
-VOID\r
-SetQHVerticalQHorTDSelect (\r
- IN QH_STRUCT *ptrQH,\r
- IN BOOLEAN bQH\r
- );\r
+ PciIo - EFI_PCI_IO_PROTOCOL\r
+ FrameNumAddrOffset - FrameNum register AddrOffset\r
\r
-BOOLEAN\r
-IsQHHorizontalQHSelect (\r
- IN QH_STRUCT *ptrQH\r
- );\r
+Returns:\r
\r
-VOID\r
-SetQHVerticalValidorInvalid (\r
- IN QH_STRUCT *ptrQH,\r
- IN BOOLEAN bValid\r
- );\r
+ Frame number \r
\r
-BOOLEAN\r
-GetQHVerticalValidorInvalid (\r
- IN QH_STRUCT *ptrQH\r
- );\r
+--*/\r
+;\r
\r
EFI_STATUS\r
-AllocateTDStruct (\r
- IN USB_HC_DEV *HcDev,\r
- OUT TD_STRUCT **ppTDStruct\r
- );\r
+CreateFrameList (\r
+ IN USB_HC_DEV *HcDev,\r
+ IN UINT32 FLBASEADDRReg\r
+ )\r
/*++\r
\r
Routine Description:\r
\r
- Allocate TD Struct\r
+ CreateFrameList\r
\r
Arguments:\r
\r
- HcDev - USB_HC_DEV\r
- ppTDStruct - place to store TD_STRUCT pointer\r
+ HcDev - USB_HC_DEV\r
+ FlBaseAddrReg - Frame List register\r
+\r
Returns:\r
\r
- EFI_SUCCESS\r
+ EFI_OUT_OF_RESOURCES - Can't allocate memory resources\r
+ EFI_UNSUPPORTED - Map memory fail\r
+ EFI_SUCCESS - Success\r
\r
--*/\r
+;\r
\r
EFI_STATUS\r
-CreateTD (\r
- IN USB_HC_DEV *HcDev,\r
- OUT TD_STRUCT **pptrTD\r
- );\r
+FreeFrameListEntry (\r
+ IN USB_HC_DEV *UhcDev\r
+ )\r
/*++\r
\r
Routine Description:\r
\r
- Create TD\r
+ Free FrameList buffer\r
\r
Arguments:\r
\r
- HcDev - USB_HC_DEV\r
- pptrTD - TD_STRUCT pointer to store\r
+ HcDev - USB_HC_DEV\r
\r
Returns:\r
\r
- EFI_OUT_OF_RESOURCES - Can't allocate resources\r
- EFI_SUCCESS - Success\r
+ EFI_SUCCESS - success\r
\r
--*/\r
+;\r
+\r
+VOID\r
+InitFrameList (\r
+ IN USB_HC_DEV *HcDev\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Initialize FrameList\r
+\r
+Arguments:\r
+\r
+ HcDev - USB_HC_DEV\r
+\r
+Returns:\r
+ VOID\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateQH (\r
+ IN USB_HC_DEV *HcDev,\r
+ OUT QH_STRUCT **pptrQH\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ CreateQH\r
+\r
+Arguments:\r
+\r
+ HcDev - USB_HC_DEV\r
+ pptrQH - QH_STRUCT content to return\r
+Returns:\r
+\r
+ EFI_SUCCESS - Success\r
+ EFI_OUT_OF_RESOURCES - Can't allocate memory\r
+ \r
+--*/\r
+;\r
+\r
+VOID\r
+SetQHHorizontalLinkPtr (\r
+ IN QH_STRUCT *ptrQH,\r
+ IN VOID *ptrNext\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set QH Horizontal Link Pointer\r
+\r
+Arguments:\r
+\r
+ PtrQH - QH_STRUCT\r
+ ptrNext - Data to write \r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
+\r
+VOID *\r
+GetQHHorizontalLinkPtr (\r
+ IN QH_STRUCT *ptrQH\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Get QH Horizontal Link Pointer\r
+\r
+Arguments:\r
+\r
+ PtrQH - QH_STRUCT\r
+ \r
+\r
+Returns:\r
+\r
+ Data to return \r
+\r
+--*/\r
+;\r
+\r
+VOID\r
+SetQHHorizontalQHorTDSelect (\r
+ IN QH_STRUCT *ptrQH,\r
+ IN BOOLEAN bQH\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set QH Horizontal QH or TD \r
+\r
+Arguments:\r
+\r
+ PtrQH - QH_STRUCT\r
+ bQH - TRUE is QH FALSE is TD\r
+\r
+Returns:\r
+ VOID\r
+\r
+--*/\r
+;\r
+\r
+VOID\r
+SetQHHorizontalValidorInvalid (\r
+ IN QH_STRUCT *ptrQH,\r
+ IN BOOLEAN bValid\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set QH Horizontal Valid or Invalid\r
+\r
+Arguments:\r
+\r
+ PtrQH - QH_STRUCT\r
+ bValid - TRUE is Valid FALSE is Invalid\r
+\r
+Returns:\r
+ VOID\r
+\r
+--*/\r
+;\r
+\r
+VOID\r
+SetQHVerticalLinkPtr (\r
+ IN QH_STRUCT *ptrQH,\r
+ IN VOID *ptrNext\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set QH Vertical Link Pointer\r
+ \r
+Arguments:\r
+\r
+ PtrQH - QH_STRUCT\r
+ ptrNext - Data to write\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
+\r
+VOID *\r
+GetQHVerticalLinkPtr (\r
+ IN QH_STRUCT *ptrQH\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Get QH Vertical Link Pointer\r
+ \r
+Arguments:\r
+\r
+ PtrQH - QH_STRUCT\r
+ \r
+Returns:\r
+\r
+ Data to return\r
+\r
+--*/\r
+;\r
+\r
+VOID\r
+SetQHVerticalQHorTDSelect (\r
+ IN QH_STRUCT *ptrQH,\r
+ IN BOOLEAN bQH\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set QH Vertical QH or TD\r
+\r
+Arguments:\r
+\r
+ PtrQH - QH_STRUCT\r
+ bQH - TRUE is QH FALSE is TD\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
+\r
+BOOLEAN\r
+IsQHHorizontalQHSelect (\r
+ IN QH_STRUCT *ptrQH\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Is QH Horizontal QH Select\r
+\r
+Arguments:\r
+\r
+ PtrQH - QH_STRUCT\r
+ \r
+Returns:\r
+\r
+ TRUE - QH\r
+ FALSE - TD\r
+\r
+--*/\r
+;\r
+\r
+VOID\r
+SetQHVerticalValidorInvalid (\r
+ IN QH_STRUCT *ptrQH,\r
+ IN BOOLEAN bValid\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set QH Vertical Valid or Invalid\r
+\r
+Arguments:\r
+\r
+ PtrQH - QH_STRUCT\r
+ IsValid - TRUE is valid FALSE is invalid\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
+\r
+BOOLEAN\r
+GetQHVerticalValidorInvalid (\r
+ IN QH_STRUCT *ptrQH\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Get QH Vertical Valid or Invalid\r
+\r
+Arguments:\r
+\r
+ PtrQH - QH_STRUCT\r
+\r
+Returns:\r
+\r
+ TRUE - Valid\r
+ FALSE - Invalid\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+AllocateTDStruct (\r
+ IN USB_HC_DEV *HcDev,\r
+ OUT TD_STRUCT **ppTDStruct\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Allocate TD Struct\r
+\r
+Arguments:\r
+\r
+ HcDev - USB_HC_DEV\r
+ ppTDStruct - place to store TD_STRUCT pointer\r
+Returns:\r
+\r
+ EFI_SUCCESS\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateTD (\r
+ IN USB_HC_DEV *HcDev,\r
+ OUT TD_STRUCT **pptrTD\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create TD\r
+\r
+Arguments:\r
+\r
+ HcDev - USB_HC_DEV\r
+ pptrTD - TD_STRUCT pointer to store\r
+\r
+Returns:\r
+\r
+ EFI_OUT_OF_RESOURCES - Can't allocate resources\r
+ EFI_SUCCESS - Success\r
+\r
+--*/\r
+;\r
\r
\r
EFI_STATUS\r
IN UINT8 *pDevReq,\r
IN UINT8 RequestLen,\r
OUT TD_STRUCT **ppTD\r
- );\r
+ )\r
/*++\r
\r
Routine Description:\r
EFI_SUCCESS - Success\r
\r
--*/\r
+;\r
\r
EFI_STATUS\r
GenDataTD (\r
IN UINT8 Toggle,\r
IN BOOLEAN bSlow,\r
OUT TD_STRUCT **ppTD\r
- );\r
+ )\r
/*++\r
\r
Routine Description:\r
EFI_SUCCESS - Success\r
\r
--*/\r
+;\r
\r
EFI_STATUS\r
CreateStatusTD (\r
IN UINT8 PktID,\r
IN BOOLEAN bSlow,\r
OUT TD_STRUCT **ppTD\r
- );\r
+ )\r
/*++\r
\r
Routine Description:\r
EFI_SUCCESS - Success\r
\r
--*/\r
+;\r
\r
VOID\r
SetTDLinkPtrValidorInvalid (\r
IN TD_STRUCT *ptrTDStruct,\r
IN BOOLEAN bValid\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set TD Link Pointer Valid or Invalid\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - TD_STRUCT\r
+ bValid - TRUE is valid FALSE is invalid\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
VOID\r
SetTDLinkPtrQHorTDSelect (\r
IN TD_STRUCT *ptrTDStruct,\r
IN BOOLEAN bQH\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set TD Link Pointer QH or TD Select\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - TD_STRUCT\r
+ bQH - TRUE is QH FALSE is TD\r
+ \r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
VOID\r
SetTDLinkPtrDepthorBreadth (\r
IN TD_STRUCT *ptrTDStruct,\r
IN BOOLEAN bDepth\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set TD Link Pointer depth or bread priority\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - TD_STRUCT\r
+ bDepth - TRUE is Depth FALSE is Breadth\r
+ \r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
VOID\r
SetTDLinkPtr (\r
IN TD_STRUCT *ptrTDStruct,\r
IN VOID *ptrNext\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set TD Link Pointer\r
\r
-VOID *\r
+Arguments:\r
+\r
+ ptrTDStruct - TD_STRUCT\r
+ ptrNext - Pointer to set\r
+ \r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
+\r
+VOID *\r
GetTDLinkPtr (\r
IN TD_STRUCT *ptrTDStruct\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Get TD Link Pointer\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - TD_STRUCT\r
+ \r
+Returns:\r
+\r
+ Pointer to get\r
+\r
+--*/\r
+;\r
\r
VOID\r
EnableorDisableTDShortPacket (\r
IN TD_STRUCT *ptrTDStruct,\r
IN BOOLEAN bEnable\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Enable or Disable TD ShortPacket\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - TD_STRUCT\r
+ bEnable - TRUE is Enanble FALSE is Disable\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
VOID\r
SetTDControlErrorCounter (\r
IN TD_STRUCT *ptrTDStruct,\r
IN UINT8 nMaxErrors\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set TD Control ErrorCounter\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - TD_STRUCT\r
+ nMaxErrors - Error counter number\r
+ \r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
VOID\r
SetTDLoworFullSpeedDevice (\r
IN TD_STRUCT *ptrTDStruct,\r
IN BOOLEAN bLowSpeedDevice\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set TD status low speed or full speed\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+ bLowSpeedDevice - Show low speed or full speed\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
VOID\r
SetTDControlIsochronousorNot (\r
IN TD_STRUCT *ptrTDStruct,\r
IN BOOLEAN bIsochronous\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set TD status Isochronous or not\r
+ \r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+ IsIsochronous - Show Isochronous or not\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
VOID\r
SetorClearTDControlIOC (\r
IN TD_STRUCT *ptrTDStruct,\r
IN BOOLEAN bSet\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set TD status IOC IsSet\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+ IsSet - Show IOC set or not\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
VOID\r
SetTDStatusActiveorInactive (\r
IN TD_STRUCT *ptrTDStruct,\r
IN BOOLEAN bActive\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set TD status active or not\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+ IsActive - Active or not\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
UINT16\r
SetTDTokenMaxLength (\r
IN TD_STRUCT *ptrTDStruct,\r
IN UINT16 nMaxLen\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set TD Token maxlength\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+ MaximumLength - Maximum length of TD Token\r
+\r
+Returns:\r
+\r
+ Real maximum length set to TD Token\r
+\r
+--*/\r
+;\r
\r
VOID\r
SetTDTokenDataToggle1 (\r
IN TD_STRUCT *ptrTDStruct\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set TD Token data toggle1\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
VOID\r
SetTDTokenDataToggle0 (\r
IN TD_STRUCT *ptrTDStruct\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set TD Token data toggle0\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
UINT8\r
GetTDTokenDataToggle (\r
IN TD_STRUCT *ptrTDStruct\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Get TD Token data toggle\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+\r
+Returns:\r
+\r
+ data toggle value\r
+\r
+--*/\r
+;\r
\r
VOID\r
SetTDTokenEndPoint (\r
IN TD_STRUCT *ptrTDStruct,\r
IN UINTN nEndPoint\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set Data Token endpoint number\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+ EndPoint - End point number\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
VOID\r
SetTDTokenDeviceAddress (\r
IN TD_STRUCT *ptrTDStruct,\r
IN UINTN nDevAddr\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set TD Token device address\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+ DeviceAddress - Device address\r
+\r
+Returns:\r
+\r
+ VOID\r
+ \r
+--*/\r
+;\r
\r
VOID\r
SetTDTokenPacketID (\r
IN TD_STRUCT *ptrTDStruct,\r
IN UINT8 nPID\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set TD Token packet ID\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+ PID - Packet ID\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
VOID\r
SetTDDataBuffer (\r
IN TD_STRUCT *ptrTDStruct\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set TD data buffer\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
BOOLEAN\r
IsTDStatusActive (\r
IN TD_STRUCT *ptrTDStruct\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Indicate whether TD status active or not\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+\r
+Returns:\r
+\r
+ TRUE - Active\r
+ FALSE - Inactive \r
+\r
+--*/\r
+;\r
\r
BOOLEAN\r
IsTDStatusStalled (\r
IN TD_STRUCT *ptrTDStruct\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Indicate whether TD status stalled or not\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+\r
+Returns:\r
+\r
+ TRUE - Stalled\r
+ FALSE - not stalled\r
+\r
+--*/\r
+;\r
\r
BOOLEAN\r
IsTDStatusBufferError (\r
IN TD_STRUCT *ptrTDStruct\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Indicate whether TD status buffer error or not\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+\r
+Returns:\r
+\r
+ TRUE - Buffer error\r
+ FALSE - No error\r
+\r
+--*/\r
+;\r
\r
BOOLEAN\r
IsTDStatusBabbleError (\r
IN TD_STRUCT *ptrTDStruct\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Indicate whether TD status babble error or not\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+\r
+Returns:\r
+\r
+ TRUE - Babble error\r
+ FALSE - No error\r
+\r
+--*/\r
+;\r
\r
BOOLEAN\r
IsTDStatusNAKReceived (\r
IN TD_STRUCT *ptrTDStruct\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Indicate whether TD status NAK received\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+\r
+Returns:\r
+\r
+ TRUE - NAK received\r
+ FALSE - NAK not received\r
+\r
+--*/\r
+;\r
\r
BOOLEAN\r
IsTDStatusCRCTimeOutError (\r
IN TD_STRUCT *ptrTDStruct\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Indicate whether TD status CRC timeout error or not\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+ \r
+Returns:\r
+\r
+ TRUE - CRC timeout error\r
+ FALSE - CRC timeout no error\r
+\r
+--*/\r
+;\r
\r
BOOLEAN\r
IsTDStatusBitStuffError (\r
IN TD_STRUCT *ptrTDStruct\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Indicate whether TD status bit stuff error or not\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+\r
+Returns:\r
+\r
+ TRUE - Bit stuff error\r
+ FALSE - Bit stuff no error\r
+\r
+--*/\r
+;\r
\r
UINT16\r
GetTDStatusActualLength (\r
IN TD_STRUCT *ptrTDStruct\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Get TD status length\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+\r
+Returns:\r
+\r
+ Return Td status length\r
+\r
+--*/\r
+;\r
\r
UINT16\r
GetTDTokenMaxLength (\r
IN TD_STRUCT *ptrTDStruct\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Get TD Token maximum length\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+\r
+Returns:\r
+\r
+ Return TD token maximum length\r
+\r
+--*/\r
+;\r
\r
UINT8\r
GetTDTokenEndPoint (\r
IN TD_STRUCT *ptrTDStruct\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Get TD Token endpoint number\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+\r
+Returns:\r
+\r
+ Return TD Token endpoint number\r
+\r
+--*/\r
+;\r
\r
UINT8\r
GetTDTokenDeviceAddress (\r
IN TD_STRUCT *ptrTDStruct\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Get TD Token device address\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+\r
+Returns:\r
+\r
+ Return TD Token device address\r
+\r
+--*/\r
+;\r
\r
UINT8\r
GetTDTokenPacketID (\r
IN TD_STRUCT *ptrTDStruct\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Get TD Token packet ID\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+\r
+Returns:\r
+\r
+ Return TD Token packet ID\r
+\r
+--*/\r
+;\r
\r
-UINT8 *\r
+UINT8 *\r
GetTDDataBuffer (\r
IN TD_STRUCT *ptrTDStruct\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Get the point to TD data buffer\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+\r
+Returns:\r
+\r
+ Return a point to TD data buffer\r
+\r
+--*/\r
+;\r
\r
BOOLEAN\r
GetTDLinkPtrValidorInvalid (\r
IN TD_STRUCT *ptrTDStruct\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Get TD LinkPtr valid or not\r
+\r
+Arguments:\r
+\r
+ ptrTDStruct - A point to TD_STRUCT\r
+\r
+Returns:\r
+\r
+ TRUE - Invalid\r
+ FALSE - Valid\r
+\r
+--*/\r
+;\r
\r
UINTN\r
CountTDsNumber (\r
IN TD_STRUCT *ptrFirstTD\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Get the number of TDs\r
+\r
+Arguments:\r
+\r
+ PtrFirstTD - A point to the first TD_STRUCT\r
+\r
+Returns:\r
+\r
+ Return the number of TDs\r
+\r
+--*/\r
+;\r
\r
VOID\r
LinkTDToQH (\r
IN QH_STRUCT *ptrQH,\r
IN TD_STRUCT *ptrTD\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Link TD To QH\r
+\r
+Arguments:\r
+\r
+ PtrQH - QH_STRUCT\r
+ PtrTD - TD_STRUCT\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
VOID\r
LinkTDToTD (\r
IN TD_STRUCT *ptrPreTD,\r
IN TD_STRUCT *ptrTD\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Link TD To TD\r
+\r
+Arguments:\r
+\r
+ ptrPreTD - Previous TD_STRUCT to be linked\r
+ PtrTD - TD_STRUCT to link\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
VOID\r
SetorClearCurFrameListTerminate (\r
IN FRAMELIST_ENTRY *pCurEntry,\r
IN BOOLEAN bSet\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set or clear current framelist terminate\r
+\r
+Arguments:\r
+\r
+ pCurEntry - A point to FRAMELIST_ENTITY\r
+ IsSet - TRUE to empty the frame and indicate the Pointer field is valid\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
+\r
+VOID\r
+SetCurFrameListQHorTD (\r
+ IN FRAMELIST_ENTRY *pCurEntry,\r
+ IN BOOLEAN bQH\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set current framelist QH or TD\r
+\r
+Arguments:\r
+\r
+ pCurEntry - A point to FRAMELIST_ENTITY\r
+ IsQH - TRUE to set QH and FALSE to set TD\r
\r
-VOID\r
-SetCurFrameListQHorTD (\r
- IN FRAMELIST_ENTRY *pCurEntry,\r
- IN BOOLEAN bQH\r
- );\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
BOOLEAN\r
GetCurFrameListTerminate (\r
IN FRAMELIST_ENTRY *pCurEntry\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Get current framelist terminate\r
+\r
+Arguments:\r
+\r
+ pCurEntry - A point to FRAMELIST_ENTITY\r
+\r
+Returns:\r
+\r
+ TRUE - Terminate\r
+ FALSE - Not terminate\r
+\r
+--*/\r
+;\r
\r
VOID\r
SetCurFrameListPointer (\r
IN FRAMELIST_ENTRY *pCurEntry,\r
IN UINT8 *ptr\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set current framelist pointer\r
+\r
+Arguments:\r
+\r
+ pCurEntry - A point to FRAMELIST_ENTITY\r
+ ptr - A point to FrameListPtr point to\r
+\r
+Returns:\r
+\r
+ VOID\r
+ \r
+--*/\r
+;\r
\r
-VOID *\r
+VOID *\r
GetCurFrameListPointer (\r
IN FRAMELIST_ENTRY *pCurEntry\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Get current framelist pointer\r
+\r
+Arguments:\r
+\r
+ pCurEntry - A point to FRAMELIST_ENTITY\r
+\r
+Returns:\r
+\r
+ A point FrameListPtr point to\r
+\r
+--*/\r
+;\r
\r
VOID\r
LinkQHToFrameList (\r
IN FRAMELIST_ENTRY *pEntry,\r
IN UINT16 FrameListIndex,\r
IN QH_STRUCT *ptrQH\r
- );\r
+ )\r
/*++\r
\r
Routine Description:\r
VOID\r
\r
--*/\r
-VOID\r
-DeleteQHTDs (\r
- IN FRAMELIST_ENTRY *pEntry,\r
- IN QH_STRUCT *ptrQH,\r
- IN TD_STRUCT *ptrFirstTD,\r
- IN UINT16 FrameListIndex,\r
- IN BOOLEAN SearchOther\r
- );\r
+;\r
\r
VOID\r
DelLinkSingleQH (\r
IN UINT16 FrameListIndex,\r
IN BOOLEAN SearchOther,\r
IN BOOLEAN Delete\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Unlink from frame list and delete single QH\r
+ \r
+Arguments:\r
+\r
+ HcDev - USB_HC_DEV\r
+ PtrQH - QH_STRUCT\r
+ FrameListIndex - Frame List Index\r
+ SearchOther - Search Other QH\r
+ Delete - TRUE is to delete the QH\r
+ \r
+Returns:\r
+\r
+ VOID\r
+ \r
+--*/\r
+;\r
\r
VOID\r
DeleteQueuedTDs (\r
IN USB_HC_DEV *HcDev,\r
IN TD_STRUCT *ptrFirstTD\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Delete Queued TDs\r
+ \r
+Arguments:\r
+\r
+ HcDev - USB_HC_DEV\r
+ PtrFirstTD - TD link list head\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
VOID\r
InsertQHTDToINTList (\r
IN UINT8 *DataBuffer,\r
IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,\r
IN VOID *Context\r
- );\r
+ )\r
/*++\r
Routine Description:\r
+\r
Insert QH and TD To Interrupt List\r
+\r
Arguments:\r
\r
HcDev - USB_HC_DEV\r
DataBuffer - Data buffer\r
CallBackFunction- CallBackFunction after interrupt transfeer\r
Context - CallBackFunction Context passed as function parameter\r
+\r
Returns:\r
+\r
EFI_SUCCESS - Sucess\r
EFI_INVALID_PARAMETER - Paremeter is error \r
\r
--*/\r
+;\r
\r
EFI_STATUS\r
DeleteAsyncINTQHTDs (\r
IN UINT8 DeviceAddress,\r
IN UINT8 EndPointAddress,\r
OUT UINT8 *DataToggle\r
- );\r
+ )\r
/*++\r
Routine Description:\r
\r
Delete Async INT QH and TDs\r
+ \r
Arguments:\r
\r
HcDev - USB_HC_DEV\r
DataToggle - Data Toggle\r
\r
Returns:\r
+\r
EFI_SUCCESS - Sucess\r
EFI_INVALID_PARAMETER - Paremeter is error \r
\r
--*/\r
+;\r
+\r
BOOLEAN\r
CheckTDsResults (\r
IN TD_STRUCT *ptrTD,\r
OUT UINT32 *Result,\r
OUT UINTN *ErrTDPos,\r
OUT UINTN *ActualTransferSize\r
- );\r
+ )\r
/*++\r
\r
Routine Description:\r
FALSE - Fail\r
\r
--*/\r
+;\r
+\r
VOID\r
ExecuteAsyncINTTDs (\r
IN USB_HC_DEV *HcDev,\r
OUT UINT32 *Result,\r
OUT UINTN *ErrTDPos,\r
OUT UINTN *ActualLen\r
- ) ;\r
+ )\r
/*++\r
\r
Routine Description:\r
VOID\r
\r
--*/\r
+;\r
+\r
VOID\r
UpdateAsyncINTQHTDs (\r
IN INTERRUPT_LIST *ptrList,\r
IN UINT32 Result,\r
IN UINT32 ErrTDPos\r
- );\r
+ )\r
/*++\r
\r
Routine Description:\r
VOID\r
\r
--*/\r
+;\r
+\r
VOID\r
ReleaseInterruptList (\r
IN USB_HC_DEV *HcDev,\r
IN LIST_ENTRY *ListHead\r
- );\r
+ )\r
/*++\r
\r
Routine Description:\r
\r
Release Interrupt List\r
+ \r
Arguments:\r
\r
HcDev - USB_HC_DEV\r
VOID\r
\r
--*/\r
+;\r
+\r
EFI_STATUS\r
ExecuteControlTransfer (\r
IN USB_HC_DEV *HcDev,\r
OUT UINTN *ActualLen,\r
IN UINTN TimeOut,\r
OUT UINT32 *TransferResult\r
- );\r
+ )\r
/*++\r
\r
Routine Description:\r
\r
\r
--*/\r
+;\r
+\r
EFI_STATUS\r
ExecBulkorSyncInterruptTransfer (\r
IN USB_HC_DEV *HcDev,\r
OUT UINT8 *DataToggle,\r
IN UINTN TimeOut,\r
OUT UINT32 *TransferResult\r
- );\r
+ )\r
/*++\r
\r
Routine Description:\r
EFI_SUCCESS - Sucess\r
EFI_DEVICE_ERROR - Error\r
--*/\r
+;\r
\r
EFI_STATUS\r
InitializeMemoryManagement (\r
IN USB_HC_DEV *HcDev\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Initialize Memory Management\r
+\r
+Arguments:\r
+\r
+ HcDev - USB_HC_DEV\r
+\r
+Returns:\r
+\r
+ EFI_SUCCESS - Success\r
+ \r
+--*/\r
+;\r
\r
EFI_STATUS\r
CreateMemoryBlock (\r
IN USB_HC_DEV *HcDev,\r
IN MEMORY_MANAGE_HEADER **MemoryHeader,\r
IN UINTN MemoryBlockSizeInPages\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Use PciIo->AllocateBuffer to allocate common buffer for the memory block,\r
+ and use PciIo->Map to map the common buffer for Bus Master Read/Write.\r
+\r
+\r
+Arguments:\r
+\r
+ HcDev - USB_HC_DEV\r
+ MemoryHeader - MEMORY_MANAGE_HEADER to output\r
+ MemoryBlockSizeInPages - MemoryBlockSizeInPages\r
+ \r
+Returns:\r
+\r
+ EFI_SUCCESS - Success\r
+ EFI_OUT_OF_RESOURCES - Out of resources\r
+ EFI_UNSUPPORTED - Unsupported\r
+\r
+--*/\r
+;\r
\r
EFI_STATUS\r
FreeMemoryHeader (\r
IN USB_HC_DEV *HcDev,\r
IN MEMORY_MANAGE_HEADER *MemoryHeader\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Free Memory Header\r
+\r
+Arguments:\r
+\r
+ HcDev - USB_HC_DEV\r
+ MemoryHeader - MemoryHeader to be freed\r
+\r
+Returns:\r
+\r
+ EFI_INVALID_PARAMETER - Parameter is error\r
+ EFI_SUCCESS - Success\r
+\r
+--*/\r
+;\r
\r
EFI_STATUS\r
UhciAllocatePool (\r
IN USB_HC_DEV *UhcDev,\r
IN UINT8 **Pool,\r
IN UINTN AllocSize\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Uhci Allocate Pool\r
+\r
+Arguments:\r
+\r
+ HcDev - USB_HC_DEV\r
+ Pool - Place to store pointer to the memory buffer\r
+ AllocSize - Alloc Size\r
+\r
+Returns:\r
+\r
+ EFI_SUCCESS - Success\r
+\r
+--*/\r
+;\r
\r
VOID\r
UhciFreePool (\r
IN USB_HC_DEV *HcDev,\r
IN UINT8 *Pool,\r
IN UINTN AllocSize\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Uhci Free Pool\r
+\r
+Arguments:\r
+\r
+ HcDev - USB_HC_DEV\r
+ Pool - Pool to free\r
+ AllocSize - Pool size\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
VOID\r
InsertMemoryHeaderToList (\r
IN MEMORY_MANAGE_HEADER *MemoryHeader,\r
IN MEMORY_MANAGE_HEADER *NewMemoryHeader\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Insert Memory Header To List\r
+\r
+Arguments:\r
+\r
+ MemoryHeader - MEMORY_MANAGE_HEADER\r
+ NewMemoryHeader - MEMORY_MANAGE_HEADER\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
EFI_STATUS\r
AllocMemInMemoryBlock (\r
IN MEMORY_MANAGE_HEADER *MemoryHeader,\r
IN VOID **Pool,\r
IN UINTN NumberOfMemoryUnit\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Alloc Memory In MemoryBlock\r
+\r
+Arguments:\r
+\r
+ MemoryHeader - MEMORY_MANAGE_HEADER\r
+ Pool - Place to store pointer to memory\r
+ NumberOfMemoryUnit - Number Of Memory Unit\r
+\r
+Returns:\r
+\r
+ EFI_NOT_FOUND - Can't find the free memory \r
+ EFI_SUCCESS - Success\r
+\r
+--*/\r
+;\r
\r
BOOLEAN\r
IsMemoryBlockEmptied (\r
IN MEMORY_MANAGE_HEADER *MemoryHeaderPtr\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Is Memory Block Emptied\r
+\r
+Arguments:\r
+\r
+ MemoryHeaderPtr - MEMORY_MANAGE_HEADER\r
+\r
+Returns:\r
+\r
+ TRUE - Empty\r
+ FALSE - Not Empty \r
+\r
+--*/\r
+;\r
\r
VOID\r
DelinkMemoryBlock (\r
IN MEMORY_MANAGE_HEADER *FirstMemoryHeader,\r
IN MEMORY_MANAGE_HEADER *FreeMemoryHeader\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Delink Memory Block\r
+\r
+Arguments:\r
+\r
+ FirstMemoryHeader - MEMORY_MANAGE_HEADER\r
+ NeedFreeMemoryHeader - MEMORY_MANAGE_HEADER\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
EFI_STATUS\r
DelMemoryManagement (\r
IN USB_HC_DEV *HcDev\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Delete Memory Management\r
+\r
+Arguments:\r
+\r
+ HcDev - USB_HC_DEV\r
+\r
+Returns:\r
+\r
+ EFI_SUCCESS - Success\r
+\r
+--*/\r
+;\r
\r
VOID\r
EnableMaxPacketSize (\r
IN USB_HC_DEV *HcDev\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Enable Max Packet Size\r
+\r
+Arguments:\r
+\r
+ HcDev - USB_HC_DEV\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
VOID\r
CleanUsbTransactions (\r
IN USB_HC_DEV *HcDev\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Clean USB Transactions\r
+\r
+Arguments:\r
+\r
+ HcDev - A point to USB_HC_DEV\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
VOID\r
TurnOffUSBEmulation (\r
IN EFI_PCI_IO_PROTOCOL *PciIo\r
- );\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Set current framelist QH or TD\r
+\r
+Arguments:\r
+\r
+ pCurEntry - A point to FRAMELIST_ENTITY\r
+ IsQH - TRUE to set QH and FALSE to set TD\r
+\r
+Returns:\r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
\r
#endif\r
projects / mirror_edk2.git / blobdiff