Further check-in to smooth Intel IPF compiler building.

[mirror_edk2.git] / EdkModulePkg / Bus / Pci / Undi / RuntimeDxe / E100b.h

diff --git a/EdkModulePkg/Bus/Pci/Undi/RuntimeDxe/E100b.h b/EdkModulePkg/Bus/Pci/Undi/RuntimeDxe/E100b.h
index 3a4127c4e56ef6ec94095a0029cda0e1c3e03455..e832cb250fc473deac10169aaf6c0069ef0493ab 100644 (file)
--- a/EdkModulePkg/Bus/Pci/Undi/RuntimeDxe/E100b.h
+++ b/EdkModulePkg/Bus/Pci/Undi/RuntimeDxe/E100b.h
@@ -124,7 +124,7 @@ enum speedo_offsets {
   SCBEarlyRx = 20,               // Early receive byte count. \r
   SCBEarlyRxInt = 24, SCBFlowCtrlReg = 25, SCBPmdr = 27,\r
   // offsets for general control registers (GCRs)\r
-  SCBGenCtrl = 28, SCBGenStatus = 29, SCBGenCtrl2 = 30, SCBRsvd = 31,\r
+  SCBGenCtrl = 28, SCBGenStatus = 29, SCBGenCtrl2 = 30, SCBRsvd = 31\r
 };\r
 \r
 #define GCR2_EEPROM_ACCESS_SEMAPHORE 0x80 // bit offset into the gcr2\r
@@ -137,7 +137,7 @@ enum commands {
   CmdTx = 4, CmdTDR = 5, CmdDump = 6, CmdDiagnose = 7,\r
   CmdSuspend = 0x4000,    /* Suspend after completion. */\r
   CmdIntr = 0x2000,      /* Interrupt after completion. */\r
-  CmdTxFlex = 0x0008,      /* Use "Flexible mode" for CmdTx command. */\r
+  CmdTxFlex = 0x0008      /* Use "Flexible mode" for CmdTx command. */\r
 };\r
 \r
 //-------------------------------------------------------------------------\r