--*/\r
\r
#include "DxeIpl.h"\r
+#include "VirtualMemory.h"\r
+\r
+//
+// Global Descriptor Table (GDT)
+//
+GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT gGdtEntries [] = {\r
+/* selector { Global Segment Descriptor } */ \r
+/* 0x00 */ {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, //null descriptor \r
+/* 0x08 */ {0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}, //linear data segment descriptor\r
+/* 0x10 */ {0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}, //linear code segment descriptor\r
+/* 0x18 */ {0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}, //system data segment descriptor\r
+/* 0x20 */ {0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}, //system code segment descriptor\r
+/* 0x28 */ {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, //spare segment descriptor\r
+/* 0x30 */ {0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}, //system data segment descriptor\r
+/* 0x38 */ {0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}, //system code segment descriptor\r
+/* 0x40 */ {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, //spare segment descriptor\r
+};\r
+\r
+//\r
+// IA32 Gdt register\r
+//\r
+GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR gGdt = {\r
+ sizeof (gGdtEntries) - 1,\r
+ (UINTN) gGdtEntries\r
+ };\r
\r
VOID\r
HandOffToDxeCore (\r
EFI_STATUS Status;\r
EFI_PHYSICAL_ADDRESS BaseOfStack;\r
EFI_PHYSICAL_ADDRESS TopOfStack;\r
- EFI_PHYSICAL_ADDRESS PageTables;\r
+ UINTN PageTables;\r
\r
Status = PeiServicesAllocatePages (EfiBootServicesData, EFI_SIZE_TO_PAGES (STACK_SIZE), &BaseOfStack);\r
ASSERT_EFI_ERROR (Status);\r
// X64 Calling Conventions requires that the stack must be aligned to 16 bytes\r
//\r
TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, 16);\r
+\r
//\r
// Load the GDT of Go64. Since the GDT of 32-bit Tiano locates in the BS_DATA\r
// memory, it may be corrupted when copying FV to high-end memory \r
//\r
- LoadGo64Gdt();\r
+ AsmWriteGdtr (&gGdt);\r
//\r
- // Limit to 36 bits of addressing for debug. Should get it from CPU\r
- //\r
- PageTables = CreateIdentityMappingPageTables (36);\r
+ // Create page table and save PageMapLevel4 to CR3\r
//\r
+ PageTables = CreateIdentityMappingPageTables ();\r
+ AsmWriteCr3 (PageTables);\r
+ //\r
// Go to Long Mode. Interrupts will not get turned on until the CPU AP is loaded.\r
// Call x64 drivers passing in single argument, a pointer to the HOBs.\r
- //\r
- ActivateLongMode (\r
- PageTables, \r
- (EFI_PHYSICAL_ADDRESS)(UINTN)(HobList.Raw), \r
- TopOfStack,\r
- 0x00000000,\r
- DxeCoreEntryPoint\r
+ // \r
+ AsmEnablePaging64 (\r
+ SYS_CODE64_SEL,\r
+ DxeCoreEntryPoint,\r
+ (EFI_PHYSICAL_ADDRESS)(UINTN)(HobList.Raw),\r
+ 0,\r
+ TopOfStack\r
);\r
} else {\r
//\r
);\r
} \r
}\r
+\r