/*++\r
\r
-Copyright (c) 2006, Intel Corporation \r
-All rights reserved. This program and the accompanying materials \r
-are licensed and made available under the terms and conditions of the BSD License \r
-which accompanies this distribution. The full text of the license may be found at \r
-http://opensource.org/licenses/bsd-license.php \r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+Copyright (c) 2006 - 2007, Intel Corporation\r
+All rights reserved. This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
Module Name:\r
\r
Routine Description:\r
\r
This routine provides support for emulation of the interrupt enable of the\r
- the system. For our purposes, CPU enable is just a BOOLEAN that the Timer \r
+ the system. For our purposes, CPU enable is just a BOOLEAN that the Timer\r
Architectural Protocol observes in order to defer behaviour while in its\r
emulated interrupt, or timer tick.\r
\r
Routine Description:\r
\r
This routine provides support for emulation of the interrupt disable of the\r
- the system. For our purposes, CPU enable is just a BOOLEAN that the Timer \r
+ the system. For our purposes, CPU enable is just a BOOLEAN that the Timer\r
Architectural Protocol observes in order to defer behaviour while in its\r
emulated interrupt, or timer tick.\r
\r
Routine Description:\r
\r
This routine provides support for emulation of the interrupt disable of the\r
- the system. For our purposes, CPU enable is just a BOOLEAN that the Timer \r
+ the system. For our purposes, CPU enable is just a BOOLEAN that the Timer\r
Architectural Protocol observes in order to defer behaviour while in its\r
emulated interrupt, or timer tick.\r
\r
\r
Routine Description:\r
\r
- This routine would support generation of a CPU INIT. At \r
- present, this code does not provide emulation. \r
+ This routine would support generation of a CPU INIT. At\r
+ present, this code does not provide emulation.\r
\r
Arguments:\r
\r
\r
Routine Description:\r
\r
- This routine would support registration of an interrupt handler. At \r
- present, this code does not provide emulation. \r
+ This routine would support registration of an interrupt handler. At\r
+ present, this code does not provide emulation.\r
\r
Arguments:\r
\r
\r
Routine Description:\r
\r
- This routine would support querying of an on-CPU timer. At present, \r
- this code does not provide timer emulation. \r
+ This routine would support querying of an on-CPU timer. At present,\r
+ this code does not provide timer emulation.\r
\r
Arguments:\r
\r
if (TimerValue == NULL) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
//\r
// No timer supported\r
//\r
\r
Routine Description:\r
\r
- This routine would support querying of an on-CPU timer. At present, \r
- this code does not provide timer emulation. \r
+ This routine would support querying of an on-CPU timer. At present,\r
+ this code does not provide timer emulation.\r
\r
Arguments:\r
\r
\r
Status\r
\r
- EFI_SUCCESS - protocol instance can be published \r
+ EFI_SUCCESS - protocol instance can be published\r
EFI_OUT_OF_RESOURCES - cannot allocate protocol data structure\r
EFI_DEVICE_ERROR - cannot create the thread\r
\r
CPU_ARCH_PROTOCOL_PRIVATE *Private;\r
VOID *Registration;\r
\r
- Status = gBS->AllocatePool (\r
- EfiBootServicesData,\r
- sizeof (CPU_ARCH_PROTOCOL_PRIVATE),\r
- &Private\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
+ Private = AllocatePool (sizeof (CPU_ARCH_PROTOCOL_PRIVATE));\r
+ ASSERT (Private != NULL);\r
\r
Private->Signature = CPU_ARCH_PROT_PRIVATE_SIGNATURE;\r
Private->Cpu.FlushDataCache = WinNtFlushCpuDataCache;\r
DEBUG ((EFI_D_ERROR, "CPU Architectural Protocol Loaded\n"));\r
\r
\r
- \r
+\r
return Status;\r
}\r
\r
Arguments:\r
String - Unicode string.\r
\r
-Returns: \r
- UINTN of the number represented by String. \r
+Returns:\r
+ UINTN of the number represented by String.\r
\r
--*/\r
{\r
Status = Hii->NewPack (Hii, PackageList, &StringHandle);\r
ASSERT (!EFI_ERROR (Status));\r
\r
- gBS->FreePool (PackageList);\r
+ FreePool (PackageList);\r
\r
//\r
// Store processor version data record to data hub\r
TotalSize\r
);\r
\r
- gBS->FreePool (RecordBuffer.Raw);\r
+ FreePool (RecordBuffer.Raw);\r
}\r
\r
gBS->CloseProtocol (\r