\r
#include "Lan9118Dxe.h"\r
\r
-\r
typedef struct {\r
MAC_ADDR_DEVICE_PATH Lan9118;\r
EFI_DEVICE_PATH_PROTOCOL End;\r
SnpMode->NvRamSize = 0; // No NVRAM with this device\r
SnpMode->NvRamAccessSize = 0; // No NVRAM with this device\r
\r
- // Update network mode information\r
- SnpMode->ReceiveFilterMask = EFI_SIMPLE_NETWORK_RECEIVE_MULTICAST |\r
- EFI_SIMPLE_NETWORK_RECEIVE_UNICAST |\r
- EFI_SIMPLE_NETWORK_RECEIVE_BROADCAST |\r
- EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS;/* |\r
- EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS_MULTICAST;*/\r
- // Current allowed settings\r
- SnpMode->ReceiveFilterSetting = EFI_SIMPLE_NETWORK_RECEIVE_MULTICAST |\r
- EFI_SIMPLE_NETWORK_RECEIVE_UNICAST |\r
- EFI_SIMPLE_NETWORK_RECEIVE_BROADCAST;\r
+ //\r
+ // Claim that all receive filter settings are supported, though the MULTICAST mode\r
+ // is not completely supported. The LAN9118 Ethernet controller is only able to\r
+ // do a "hash filtering" and not a perfect filtering on multicast addresses. The\r
+ // controller does not filter the multicast addresses directly but a hash value\r
+ // of them. The hash value of a multicast address is derived from its CRC and\r
+ // ranges from 0 to 63 included.\r
+ // We claim that the perfect MULTICAST filtering mode is supported because\r
+ // we do not want the user to switch directly to the PROMISCOUS_MULTICAST mode\r
+ // and thus not being able to take advantage of the hash filtering.\r
+ //\r
+ SnpMode->ReceiveFilterMask = EFI_SIMPLE_NETWORK_RECEIVE_UNICAST |\r
+ EFI_SIMPLE_NETWORK_RECEIVE_MULTICAST |\r
+ EFI_SIMPLE_NETWORK_RECEIVE_BROADCAST |\r
+ EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS |\r
+ EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS_MULTICAST;\r
+\r
+ // We do not intend to receive anything for the time being.\r
+ SnpMode->ReceiveFilterSetting = 0;\r
\r
// LAN9118 has 64bit hash table, can filter 64 MCast MAC Addresses\r
SnpMode->MaxMCastFilterCount = MAX_MCAST_FILTER_CNT;\r
// Power up the device so we can find the MAC address\r
Status = Lan9118Initialize (Snp);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "Lan9118: Error initialising hardware\n"));\r
+ DEBUG ((EFI_D_ERROR, "LAN9118: Error initialising hardware\n"));\r
return EFI_DEVICE_ERROR;\r
}\r
\r
}\r
\r
// Initiate a PHY reset\r
- Status = PhySoftReset (PHY_RESET_PMT | PHY_RESET_CHECK_LINK, Snp);\r
+ Status = PhySoftReset (PHY_RESET_PMT, Snp);\r
if (EFI_ERROR (Status)) {\r
Snp->Mode->State = EfiSimpleNetworkStopped;\r
DEBUG ((EFI_D_WARN, "Warning: Link not ready after TimeOut. Check ethernet cable\n"));\r
}\r
\r
// Read the PM register\r
- PmConf = MmioRead32 (LAN9118_PMT_CTRL);\r
+ PmConf = Lan9118MmioRead32 (LAN9118_PMT_CTRL);\r
\r
// MPTCTRL_WOL_EN: Allow Wake-On-Lan to detect wake up frames or magic packets\r
// MPTCTRL_ED_EN: Allow energy detection to allow lowest power consumption mode\r
PmConf |= (MPTCTRL_WOL_EN | MPTCTRL_ED_EN | MPTCTRL_PME_EN);\r
\r
// Write the current configuration to the register\r
- MmioWrite32 (LAN9118_PMT_CTRL, PmConf);\r
- gBS->Stall (LAN9118_STALL);\r
- gBS->Stall (LAN9118_STALL);\r
+ Lan9118MmioWrite32 (LAN9118_PMT_CTRL, PmConf);\r
\r
// Configure GPIO and HW\r
Status = ConfigureHardware (HW_CONF_USE_LEDS, Snp);\r
// Do auto-negotiation if supported\r
Status = AutoNegotiate (AUTO_NEGOTIATE_ADVERTISE_ALL, Snp);\r
if (EFI_ERROR(Status)) {\r
- DEBUG ((EFI_D_WARN, "Lan9118: Auto Negociation not supported.\n"));\r
+ DEBUG ((EFI_D_WARN, "LAN9118: Auto Negotiation failed.\n"));\r
}\r
\r
// Configure flow control depending on speed capabilities\r
return Status;\r
}\r
\r
- // Enable the receiver and transmitter\r
- Status = StartRx (0, Snp);\r
- if (EFI_ERROR(Status)) {\r
- return Status;\r
- }\r
-\r
+ // Enable the transmitter\r
Status = StartTx (START_TX_MAC | START_TX_CFG, Snp);\r
if (EFI_ERROR(Status)) {\r
return Status;\r
}\r
\r
// Now acknowledge all interrupts\r
- MmioWrite32 (LAN9118_INT_STS, ~0);\r
+ Lan9118MmioWrite32 (LAN9118_INT_STS, ~0);\r
\r
// Declare the driver as initialized\r
Snp->Mode->State = EfiSimpleNetworkInitialized;\r
}\r
\r
// Initiate a PHY reset\r
- Status = PhySoftReset (PHY_RESET_PMT | PHY_RESET_CHECK_LINK, Snp);\r
+ Status = PhySoftReset (PHY_RESET_PMT, Snp);\r
if (EFI_ERROR (Status)) {\r
Snp->Mode->State = EfiSimpleNetworkStopped;\r
return EFI_NOT_STARTED;\r
}\r
\r
// Read the PM register\r
- PmConf = MmioRead32 (LAN9118_PMT_CTRL);\r
+ PmConf = Lan9118MmioRead32 (LAN9118_PMT_CTRL);\r
\r
// MPTCTRL_WOL_EN: Allow Wake-On-Lan to detect wake up frames or magic packets\r
// MPTCTRL_ED_EN: Allow energy detection to allow lowest power consumption mode\r
PmConf |= (MPTCTRL_WOL_EN | MPTCTRL_ED_EN | MPTCTRL_PME_EN);\r
\r
// Write the current configuration to the register\r
- MmioWrite32 (LAN9118_PMT_CTRL, PmConf);\r
- gBS->Stall (LAN9118_STALL);\r
+ Lan9118MmioWrite32 (LAN9118_PMT_CTRL, PmConf);\r
+\r
+ // Reactivate the LEDs\r
+ Status = ConfigureHardware (HW_CONF_USE_LEDS, Snp);\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
\r
// Check that a buffer size was specified in SnpInitialize\r
if (gTxBuffer != 0) {\r
- HwConf = MmioRead32 (LAN9118_HW_CFG); // Read the HW register\r
+ HwConf = Lan9118MmioRead32 (LAN9118_HW_CFG); // Read the HW register\r
HwConf &= ~HW_CFG_TX_FIFO_SIZE_MASK; // Clear buffer bits first\r
HwConf |= HW_CFG_TX_FIFO_SIZE(gTxBuffer); // assign size chosen in SnpInitialize\r
\r
- MmioWrite32 (LAN9118_HW_CFG, HwConf); // Write the conf\r
- gBS->Stall (LAN9118_STALL);\r
+ Lan9118MmioWrite32 (LAN9118_HW_CFG, HwConf); // Write the conf\r
}\r
\r
// Enable the receiver and transmitter and clear their contents\r
StartTx (START_TX_MAC | START_TX_CFG | START_TX_CLEAR, Snp);\r
\r
// Now acknowledge all interrupts\r
- MmioWrite32 (LAN9118_INT_STS, ~0);\r
+ Lan9118MmioWrite32 (LAN9118_INT_STS, ~0);\r
\r
return EFI_SUCCESS;\r
}\r
return Status;\r
}\r
\r
+ // Back to the started and thus not initialized state\r
+ Snp->Mode->State = EfiSimpleNetworkStarted;\r
+\r
return EFI_SUCCESS;\r
}\r
\r
UINT32 Crc;\r
UINT8 HashValue;\r
UINT32 MacCSRValue;\r
+ UINT32 ReceiveFilterSetting;\r
EFI_MAC_ADDRESS *Mac;\r
+ EFI_MAC_ADDRESS ZeroMac;\r
\r
// Check Snp Instance\r
if (Snp == NULL) {\r
MultHashTableHigh = IndirectMACRead32 (INDIRECT_MAC_INDEX_HASHH);\r
}\r
\r
+ //\r
+ // Before to change anything, stop and reset the reception of\r
+ // packets.\r
+ //\r
+ StopRx (STOP_RX_CLEAR, Snp);\r
+\r
//\r
// Write the mask of the selected hash values for the multicast filtering.\r
// The two masks are set to zero if the multicast filtering is not enabled.\r
IndirectMACWrite32 (INDIRECT_MAC_INDEX_HASHL, MultHashTableLow);\r
IndirectMACWrite32 (INDIRECT_MAC_INDEX_HASHH, MultHashTableHigh);\r
\r
+ ReceiveFilterSetting = (Mode->ReceiveFilterSetting | Enable) & (~Disable);\r
+\r
+ //\r
// Read MAC controller\r
- MacCSRValue = IndirectMACRead32 (INDIRECT_MAC_INDEX_CR);\r
+ //\r
+ MacCSRValue = IndirectMACRead32 (INDIRECT_MAC_INDEX_CR);\r
+ MacCSRValue &= ~(MACCR_HPFILT | MACCR_BCAST | MACCR_PRMS | MACCR_MCPAS);\r
\r
- // Set the options for the MAC_CSR\r
- if (Enable & EFI_SIMPLE_NETWORK_RECEIVE_UNICAST) {\r
- StartRx (0, Snp);\r
+ if (ReceiveFilterSetting & EFI_SIMPLE_NETWORK_RECEIVE_UNICAST) {\r
+ Lan9118SetMacAddress (&Mode->CurrentAddress, Snp);\r
DEBUG ((DEBUG_NET, "Allowing Unicast Frame Reception\n"));\r
+ } else {\r
+ //\r
+ // The Unicast packets do not have to be listen to, set the MAC\r
+ // address of the LAN9118 to be the "not configured" all zeroes\r
+ // ethernet MAC address.\r
+ //\r
+ ZeroMem (&ZeroMac, NET_ETHER_ADDR_LEN);\r
+ Lan9118SetMacAddress (&ZeroMac, Snp);\r
}\r
\r
- if (Disable & EFI_SIMPLE_NETWORK_RECEIVE_UNICAST) {\r
- StopRx (0, Snp);\r
- DEBUG ((DEBUG_NET, "Disabling Unicast Frame Reception\n"));\r
- }\r
-\r
- if (Enable & EFI_SIMPLE_NETWORK_RECEIVE_MULTICAST) {\r
+ if (ReceiveFilterSetting & EFI_SIMPLE_NETWORK_RECEIVE_MULTICAST) {\r
MacCSRValue |= MACCR_HPFILT;\r
DEBUG ((DEBUG_NET, "Allowing Multicast Frame Reception\n"));\r
}\r
\r
- if (Disable & EFI_SIMPLE_NETWORK_RECEIVE_MULTICAST) {\r
- MacCSRValue &= ~MACCR_HPFILT;\r
- DEBUG ((DEBUG_NET, "Disabling Multicast Frame Reception\n"));\r
- }\r
-\r
- if (Enable & EFI_SIMPLE_NETWORK_RECEIVE_BROADCAST) {\r
- MacCSRValue &= ~(MACCR_BCAST);\r
- DEBUG ((DEBUG_NET, "Allowing Broadcast Frame Reception\n"));\r
+ if (ReceiveFilterSetting & EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS_MULTICAST) {\r
+ MacCSRValue |= MACCR_MCPAS;\r
+ DEBUG ((DEBUG_NET, "Enabling Promiscuous Multicast Mode\n"));\r
}\r
\r
- if (Disable & EFI_SIMPLE_NETWORK_RECEIVE_BROADCAST) {\r
+ if ((ReceiveFilterSetting & EFI_SIMPLE_NETWORK_RECEIVE_BROADCAST) == 0) {\r
MacCSRValue |= MACCR_BCAST;\r
- DEBUG ((DEBUG_NET, "Disabling Broadcast Frame Reception\n"));\r
+ } else {\r
+ DEBUG ((DEBUG_NET, "Allowing Broadcast Frame Reception\n"));\r
}\r
\r
- if (Enable & EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS) {\r
+ if (ReceiveFilterSetting & EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS) {\r
MacCSRValue |= MACCR_PRMS;\r
DEBUG ((DEBUG_NET, "Enabling Promiscuous Mode\n"));\r
}\r
\r
- if (Disable & EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS) {\r
- MacCSRValue &= ~MACCR_PRMS;\r
- DEBUG ((DEBUG_NET, "Disabling Promiscuous Mode\n"));\r
- }\r
-\r
- if (Enable & EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS_MULTICAST) {\r
- MacCSRValue |= (MACCR_HPFILT | MACCR_PRMS);\r
- DEBUG ((DEBUG_NET, "Enabling Promiscuous Multicast Mode\n"));\r
- }\r
-\r
- if (Disable & EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS_MULTICAST) {\r
- MacCSRValue &= ~(MACCR_HPFILT | MACCR_PRMS);\r
- DEBUG ((DEBUG_NET, "Disabling Promiscuous Multicast Mode\n"));\r
- }\r
-\r
+ //\r
// Write the options to the MAC_CSR\r
+ //\r
IndirectMACWrite32 (INDIRECT_MAC_INDEX_CR, MacCSRValue);\r
- gBS->Stall (LAN9118_STALL);\r
+\r
+ //\r
+ // If we have to retrieve something, start packet reception.\r
+ //\r
+ Mode->ReceiveFilterSetting = ReceiveFilterSetting;\r
+ if (ReceiveFilterSetting != 0) {\r
+ StartRx (0, Snp);\r
+ }\r
\r
return EFI_SUCCESS;\r
}\r
New = (EFI_MAC_ADDRESS *) PermAddr;\r
Lan9118SetMacAddress ((EFI_MAC_ADDRESS *) PermAddr, Snp);\r
} else {\r
- DEBUG ((EFI_D_ERROR, "Lan9118: Warning: No valid MAC address in EEPROM, using fallback\n"));\r
+ DEBUG ((EFI_D_ERROR, "LAN9118: Warning: No valid MAC address in EEPROM, using fallback\n"));\r
New = (EFI_MAC_ADDRESS*) (FixedPcdGet64 (PcdLan9118DefaultMacAddress));\r
}\r
} else {\r
}\r
}\r
\r
- // Write address\r
- Lan9118SetMacAddress (New, Snp);\r
+ CopyMem (&Snp->Mode->CurrentAddress, New, NET_ETHER_ADDR_LEN);\r
+\r
+ //\r
+ // If packet reception is currently activated, stop and reset it,\r
+ // set the new ethernet address and restart the packet reception.\r
+ // Otherwise, nothing to do, the MAC address will be updated in\r
+ // SnpReceiveFilters() when the UNICAST packet reception will be\r
+ // activated.\r
+ //\r
+ if (Snp->Mode->ReceiveFilterSetting != 0) {\r
+ StopRx (STOP_RX_CLEAR, Snp);\r
+ Lan9118SetMacAddress (New, Snp);\r
+ StartRx (0, Snp);\r
+ }\r
\r
return EFI_SUCCESS;\r
}\r
// consumer of SNP does not call GetStatus.)\r
// TODO will we lose TxStatuses if this happens? Maybe in SnpTransmit we\r
// should check for it and dump the TX Status FIFO.\r
- FifoInt = MmioRead32 (LAN9118_FIFO_INT);\r
+ FifoInt = Lan9118MmioRead32 (LAN9118_FIFO_INT);\r
\r
// Clear the TX Status FIFO Overflow\r
if ((FifoInt & INSTS_TXSO) == 0) {\r
FifoInt |= INSTS_TXSO;\r
- MmioWrite32 (LAN9118_FIFO_INT, FifoInt);\r
+ Lan9118MmioWrite32 (LAN9118_FIFO_INT, FifoInt);\r
}\r
\r
// Read interrupt status if IrqStat is not NULL\r
if (IrqStat != NULL) {\r
+ *IrqStat = 0;\r
\r
// Check for receive interrupt\r
- if (MmioRead32 (LAN9118_INT_STS) & INSTS_RSFL) { // Data moved from rx FIFO\r
+ if (Lan9118MmioRead32 (LAN9118_INT_STS) & INSTS_RSFL) { // Data moved from rx FIFO\r
*IrqStat |= EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT;\r
- MmioWrite32 (LAN9118_INT_STS,INSTS_RSFL);\r
- } else {\r
- *IrqStat &= ~EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT;\r
+ Lan9118MmioWrite32 (LAN9118_INT_STS,INSTS_RSFL);\r
}\r
\r
// Check for transmit interrupt\r
- if (MmioRead32 (LAN9118_INT_STS) & INSTS_TSFL) {\r
+ if (Lan9118MmioRead32 (LAN9118_INT_STS) & INSTS_TSFL) {\r
*IrqStat |= EFI_SIMPLE_NETWORK_TRANSMIT_INTERRUPT;\r
- MmioWrite32 (LAN9118_INT_STS,INSTS_TSFL);\r
- } else {\r
- *IrqStat &= ~EFI_SIMPLE_NETWORK_TRANSMIT_INTERRUPT;\r
+ Lan9118MmioWrite32 (LAN9118_INT_STS,INSTS_TSFL);\r
}\r
\r
// Check for software interrupt\r
- if (MmioRead32 (LAN9118_INT_STS) & INSTS_SW_INT) {\r
+ if (Lan9118MmioRead32 (LAN9118_INT_STS) & INSTS_SW_INT) {\r
*IrqStat |= EFI_SIMPLE_NETWORK_SOFTWARE_INTERRUPT;\r
- MmioWrite32 (LAN9118_INT_STS,INSTS_SW_INT);\r
- } else {\r
- *IrqStat &= ~EFI_SIMPLE_NETWORK_SOFTWARE_INTERRUPT;\r
+ Lan9118MmioWrite32 (LAN9118_INT_STS,INSTS_SW_INT);\r
}\r
}\r
\r
// Check Status of transmitted packets\r
// (We ignore TXSTATUS_NO_CA has it might happen in Full Duplex)\r
\r
- NumTxStatusEntries = MmioRead32(LAN9118_TX_FIFO_INF) & TXFIFOINF_TXSUSED_MASK;\r
+ NumTxStatusEntries = Lan9118MmioRead32(LAN9118_TX_FIFO_INF) & TXFIFOINF_TXSUSED_MASK;\r
if (NumTxStatusEntries > 0) {\r
- TxStatus = MmioRead32 (LAN9118_TX_STATUS);\r
+ TxStatus = Lan9118MmioRead32 (LAN9118_TX_STATUS);\r
PacketTag = TxStatus >> 16;\r
TxStatus = TxStatus & 0xFFFF;\r
if ((TxStatus & TXSTATUS_ES) && (TxStatus != (TXSTATUS_ES | TXSTATUS_NO_CA))) {\r
LanDriver->Stats.TxTotalFrames += 1;\r
*TxBuff = LanDriver->TxRing[PacketTag % LAN9118_TX_RING_NUM_ENTRIES];\r
}\r
+ } else if (TxBuff != NULL) {\r
+ *TxBuff = NULL;\r
}\r
\r
// Check for a TX Error interrupt\r
- Interrupts = MmioRead32 (LAN9118_INT_STS);\r
+ Interrupts = Lan9118MmioRead32 (LAN9118_INT_STS);\r
if (Interrupts & INSTS_TXE) {\r
DEBUG ((EFI_D_ERROR, "LAN9118: Transmitter error. Restarting..."));\r
\r
- // Initiate a software reset\r
+ // Software reset, the TXE interrupt is cleared by the reset.\r
Status = SoftReset (0, Snp);\r
if (EFI_ERROR (Status)) {\r
DEBUG ((EFI_D_ERROR, "\n\tSoft Reset Failed: Hardware Error\n"));\r
return EFI_DEVICE_ERROR;\r
}\r
\r
- // Acknowledge the TXE\r
- MmioWrite32 (LAN9118_INT_STS, INSTS_TXE);\r
- gBS->Stall (LAN9118_STALL);\r
+ // Reactivate the LEDs\r
+ Status = ConfigureHardware (HW_CONF_USE_LEDS, Snp);\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
\r
- // Restart the transmitter\r
+ //\r
+ // Restart the transmitter and if necessary the receiver.\r
+ // Do not ask for FIFO reset as it has already been done\r
+ // by SoftReset().\r
+ //\r
StartTx (START_TX_MAC | START_TX_CFG, Snp);\r
+ if (Snp->Mode->ReceiveFilterSetting != 0) {\r
+ StartRx (0, Snp);\r
+ }\r
}\r
\r
// Update the media status\r
CommandB = TX_CMD_B_PACKET_TAG (PacketTag) | TX_CMD_B_PACKET_LENGTH (BuffSize);\r
\r
// Write the commands first\r
- MmioWrite32 (LAN9118_TX_DATA, CommandA);\r
- MmioWrite32 (LAN9118_TX_DATA, CommandB);\r
+ Lan9118MmioWrite32 (LAN9118_TX_DATA, CommandA);\r
+ Lan9118MmioWrite32 (LAN9118_TX_DATA, CommandB);\r
\r
// Write the destination address\r
- MmioWrite32 (LAN9118_TX_DATA,\r
+ Lan9118MmioWrite32 (LAN9118_TX_DATA,\r
(DstAddr->Addr[0]) |\r
(DstAddr->Addr[1] << 8) |\r
(DstAddr->Addr[2] << 16) |\r
(DstAddr->Addr[3] << 24)\r
);\r
\r
- MmioWrite32 (LAN9118_TX_DATA,\r
+ Lan9118MmioWrite32 (LAN9118_TX_DATA,\r
(DstAddr->Addr[4]) |\r
(DstAddr->Addr[5] << 8) |\r
(SrcAddr->Addr[0] << 16) | // Write the Source Address\r
(SrcAddr->Addr[1] << 24)\r
);\r
\r
- MmioWrite32 (LAN9118_TX_DATA,\r
+ Lan9118MmioWrite32 (LAN9118_TX_DATA,\r
(SrcAddr->Addr[2]) |\r
(SrcAddr->Addr[3] << 8) |\r
(SrcAddr->Addr[4] << 16) |\r
);\r
\r
// Write the Protocol\r
- MmioWrite32 (LAN9118_TX_DATA, (UINT32)(HTONS (LocalProtocol)));\r
+ Lan9118MmioWrite32 (LAN9118_TX_DATA, (UINT32)(HTONS (LocalProtocol)));\r
\r
// Next buffer is the payload\r
CommandA = TX_CMD_A_LAST_SEGMENT | TX_CMD_A_BUFF_SIZE (BuffSize - HdrSize) | TX_CMD_A_COMPLETION_INT | TX_CMD_A_DATA_START_OFFSET (2); // 2 bytes beginning offset\r
\r
// Write the commands\r
- MmioWrite32 (LAN9118_TX_DATA, CommandA);\r
- MmioWrite32 (LAN9118_TX_DATA, CommandB);\r
+ Lan9118MmioWrite32 (LAN9118_TX_DATA, CommandA);\r
+ Lan9118MmioWrite32 (LAN9118_TX_DATA, CommandB);\r
\r
// Write the payload\r
for (Count = 0; Count < ((BuffSize + 3) >> 2) - 3; Count++) {\r
- MmioWrite32 (LAN9118_TX_DATA, LocalData[Count + 3]);\r
+ Lan9118MmioWrite32 (LAN9118_TX_DATA, LocalData[Count + 3]);\r
}\r
} else {\r
// Format pointer\r
CommandB = TX_CMD_B_PACKET_TAG (PacketTag) | TX_CMD_B_PACKET_LENGTH (BuffSize);\r
\r
// Write the commands first\r
- MmioWrite32 (LAN9118_TX_DATA, CommandA);\r
- MmioWrite32 (LAN9118_TX_DATA, CommandB);\r
+ Lan9118MmioWrite32 (LAN9118_TX_DATA, CommandA);\r
+ Lan9118MmioWrite32 (LAN9118_TX_DATA, CommandB);\r
\r
// Write all the data\r
for (Count = 0; Count < ((BuffSize + 3) >> 2); Count++) {\r
- MmioWrite32 (LAN9118_TX_DATA, LocalData[Count]);\r
+ Lan9118MmioWrite32 (LAN9118_TX_DATA, LocalData[Count]);\r
}\r
}\r
\r
)\r
{\r
LAN9118_DRIVER *LanDriver;\r
+ UINT32 IntSts;\r
UINT32 RxFifoStatus;\r
UINT32 NumPackets;\r
UINT32 RxCfgValue;\r
return EFI_NOT_STARTED;\r
}\r
\r
+ //\r
+ // If the receiver raised the RXE error bit, check if the receiver status\r
+ // FIFO is full and if not just acknowledge the error. The two other\r
+ // conditions to get a RXE error are :\r
+ // . the RX data FIFO is read whereas being empty.\r
+ // . the RX status FIFO is read whereas being empty.\r
+ // The RX data and status FIFO are read by this driver only in the following\r
+ // code of this function. After the readings, the RXE error bit is checked\r
+ // and if raised, the controller is reset. Thus, at this point, we consider\r
+ // that the only valid reason to get an RXE error is the receiver status\r
+ // FIFO being full. And if this is not the case, we consider that this is\r
+ // a spurious error and we just get rid of it. We experienced such 'spurious'\r
+ // errors when running the driver on an A57 on Juno. No valid reason to\r
+ // explain those errors has been found so far and everything seems to\r
+ // work perfectly when they are just ignored.\r
+ //\r
+ IntSts = Lan9118MmioRead32 (LAN9118_INT_STS);\r
+ if ((IntSts & INSTS_RXE) && (!(IntSts & INSTS_RSFF))) {\r
+ Lan9118MmioWrite32 (LAN9118_INT_STS, INSTS_RXE);\r
+ }\r
+\r
// Count dropped frames\r
- DroppedFrames = MmioRead32 (LAN9118_RX_DROP);\r
+ DroppedFrames = Lan9118MmioRead32 (LAN9118_RX_DROP);\r
LanDriver->Stats.RxDroppedFrames += DroppedFrames;\r
\r
NumPackets = RxStatusUsedSpace (0, Snp) / 4;\r
}\r
\r
// Read Rx Status (only if not empty)\r
- RxFifoStatus = MmioRead32 (LAN9118_RX_STATUS);\r
+ RxFifoStatus = Lan9118MmioRead32 (LAN9118_RX_STATUS);\r
LanDriver->Stats.RxTotalFrames += 1;\r
\r
// First check for errors\r
PLength = GET_RXSTATUS_PACKET_LENGTH(RxFifoStatus);\r
LanDriver->Stats.RxTotalBytes += (PLength - 4);\r
\r
- // Check buffer size\r
- if (*BuffSize < PLength) {\r
- *BuffSize = PLength;\r
- return EFI_BUFFER_TOO_SMALL;\r
- }\r
-\r
// If padding is applied, read more DWORDs\r
if (PLength % 4) {\r
Padding = 4 - (PLength % 4);\r
Padding = 0;\r
}\r
\r
+ // Check buffer size\r
+ if (*BuffSize < (PLength + Padding)) {\r
+ *BuffSize = PLength + Padding;\r
+ return EFI_BUFFER_TOO_SMALL;\r
+ }\r
+\r
// Set the amount of data to be transfered out of FIFO for THIS packet\r
// This can be used to trigger an interrupt, and status can be checked\r
- RxCfgValue = MmioRead32 (LAN9118_RX_CFG);\r
+ RxCfgValue = Lan9118MmioRead32 (LAN9118_RX_CFG);\r
RxCfgValue &= ~(RXCFG_RX_DMA_CNT_MASK);\r
RxCfgValue |= RXCFG_RX_DMA_CNT (ReadLimit);\r
\r
// Set end alignment to 4-bytes\r
RxCfgValue &= ~(RXCFG_RX_END_ALIGN_MASK);\r
- MmioWrite32 (LAN9118_RX_CFG, RxCfgValue);\r
+ Lan9118MmioWrite32 (LAN9118_RX_CFG, RxCfgValue);\r
\r
// Update buffer size\r
*BuffSize = PLength; // -4 bytes may be needed: Received in buffer as\r
\r
// Read Rx Packet\r
for (Count = 0; Count < ReadLimit; Count++) {\r
- RawData[Count] = MmioRead32 (LAN9118_RX_DATA);\r
- }\r
-\r
- // Check for Rx errors (worst possible error)\r
- if (MmioRead32 (LAN9118_INT_STS) & INSTS_RXE) {\r
- DEBUG ((EFI_D_WARN, "Warning: Receiver Error. Restarting...\n"));\r
-\r
- // Initiate a software reset\r
- Status = SoftReset (0, Snp);\r
- if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "Error: Soft Reset Failed: Hardware Error.\n"));\r
- return EFI_DEVICE_ERROR;\r
- }\r
-\r
- // Acknowledge the RXE\r
- MmioWrite32 (LAN9118_INT_STS, INSTS_RXE);\r
- gBS->Stall (LAN9118_STALL);\r
-\r
- // Restart the rx (and do not clear FIFO)\r
- StartRx (0, Snp);\r
-\r
- // Say that command could not be sent\r
- return EFI_DEVICE_ERROR;\r
+ RawData[Count] = Lan9118MmioRead32 (LAN9118_RX_DATA);\r
}\r
\r
// Get the destination address\r
Src.Addr[3] = (RawData[2] & 0xFF00) >> 8;\r
Src.Addr[4] = (RawData[2] & 0xFF0000) >> 16;\r
Src.Addr[5] = (RawData[2] & 0xFF000000) >> 24;\r
- CopyMem (SrcAddr,&Src, NET_ETHER_ADDR_LEN);\r
+ CopyMem (SrcAddr, &Src, NET_ETHER_ADDR_LEN);\r
}\r
\r
// Get the protocol\r
*Protocol = NTOHS (RawData[3] & 0xFFFF);\r
}\r
\r
+ // Check for Rx errors (worst possible error)\r
+ if (Lan9118MmioRead32 (LAN9118_INT_STS) & INSTS_RXE) {\r
+ DEBUG ((EFI_D_WARN, "Warning: Receiver Error. Restarting...\n"));\r
+\r
+ // Software reset, the RXE interrupt is cleared by the reset.\r
+ Status = SoftReset (0, Snp);\r
+ if (EFI_ERROR (Status)) {\r
+ DEBUG ((EFI_D_ERROR, "Error: Soft Reset Failed: Hardware Error.\n"));\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
+\r
+ // Reactivate the LEDs\r
+ Status = ConfigureHardware (HW_CONF_USE_LEDS, Snp);\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
+\r
+ //\r
+ // Restart the receiver and the transmitter without resetting the FIFOs\r
+ // as it has been done by SoftReset().\r
+ //\r
+ StartRx (0, Snp);\r
+ StartTx (START_TX_MAC | START_TX_CFG, Snp);\r
+\r
+ // Say that command could not be sent\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
+\r
#if defined(EVAL_PERFORMANCE)\r
UINT64 EndClock = GetPerformanceCounter ();\r
DEBUG ((EFI_D_ERROR, "Receive Time processing: %d counts @ %d Hz\n", StartClock - EndClock,Perf));\r
projects / mirror_edk2.git / blobdiff