ARM Packages: Removed trailing spaces

[mirror_edk2.git] / EmbeddedPkg / Library / GdbDebugAgent / Arm / ExceptionSupport.ARMv6.asm

diff --git a/EmbeddedPkg/Library/GdbDebugAgent/Arm/ExceptionSupport.ARMv6.asm b/EmbeddedPkg/Library/GdbDebugAgent/Arm/ExceptionSupport.ARMv6.asm
index c70fb924828ad7af24b352fee41aedc09a0445d0..611e83d7dae46053801705d12eea9a324d92ba92 100755 (executable)
--- a/EmbeddedPkg/Library/GdbDebugAgent/Arm/ExceptionSupport.ARMv6.asm
+++ b/EmbeddedPkg/Library/GdbDebugAgent/Arm/ExceptionSupport.ARMv6.asm
@@ -1,4 +1,4 @@
-//------------------------------------------------------------------------------ \r
+//------------------------------------------------------------------------------\r
 //\r
 // Use ARMv6 instruction to operate on a single stack\r
 //\r
@@ -21,7 +21,7 @@
 This is the stack constructed by the exception handler (low address to high address)\r
                 # R0 - IFAR is EFI_SYSTEM_CONTEXT for ARM\r
   Reg   Offset\r
-  ===   ======              \r
+  ===   ======\r
   R0    0x00    # stmfd     SP!,{R0-R12}\r
   R1    0x04\r
   R2    0x08\r
@@ -43,15 +43,15 @@ This is the stack constructed by the exception handler (low address to high addr
   DFAR  0x48\r
   IFSR  0x4c\r
   IFAR  0x50\r
-  \r
+\r
   LR    0x54    # SVC Link register (we need to restore it)\r
-  \r
-  LR    0x58    # pushed by srsfd    \r
-  CPSR  0x5c    \r
+\r
+  LR    0x58    # pushed by srsfd\r
+  CPSR  0x5c\r
 \r
  */\r
- \r
- \r
+\r
+\r
   EXPORT  ExceptionHandlersStart\r
   EXPORT  ExceptionHandlersEnd\r
   EXPORT  CommonExceptionEntry\r
@@ -60,7 +60,7 @@ This is the stack constructed by the exception handler (low address to high addr
 \r
   PRESERVE8\r
   AREA  DxeExceptionHandlers, CODE, READONLY\r
-  \r
+\r
 //\r
 // This code gets copied to the ARM vector table\r
 // ExceptionHandlersStart - ExceptionHandlersEnd gets copied\r
@@ -101,7 +101,7 @@ UndefinedInstructionEntry
   stmfd     SP!,{R0-R12}              ; Store the register state\r
 \r
   mov       R0,#1                     ; ExceptionType\r
-  ldr       R1,CommonExceptionEntry; \r
+  ldr       R1,CommonExceptionEntry;\r
   bx        R1\r
 \r
 SoftwareInterruptEntry\r
@@ -173,55 +173,55 @@ CommonExceptionEntry
 ExceptionHandlersEnd\r
 \r
 //\r
-// This code runs from CpuDxe driver loaded address. It is patched into \r
+// This code runs from CpuDxe driver loaded address. It is patched into\r
 // CommonExceptionEntry.\r
 //\r
 AsmCommonExceptionEntry\r
   mrc       p15, 0, R1, c6, c0, 2   ; Read IFAR\r
-  str       R1, [SP, #0x50]         ; Store it in EFI_SYSTEM_CONTEXT_ARM.IFAR \r
-  \r
+  str       R1, [SP, #0x50]         ; Store it in EFI_SYSTEM_CONTEXT_ARM.IFAR\r
+\r
   mrc       p15, 0, R1, c5, c0, 1   ; Read IFSR\r
   str       R1, [SP, #0x4c]         ; Store it in EFI_SYSTEM_CONTEXT_ARM.IFSR\r
-  \r
+\r
   mrc       p15, 0, R1, c6, c0, 0   ; Read DFAR\r
   str       R1, [SP, #0x48]         ; Store it in EFI_SYSTEM_CONTEXT_ARM.DFAR\r
-  \r
+\r
   mrc       p15, 0, R1, c5, c0, 0   ; Read DFSR\r
   str       R1, [SP, #0x44]         ; Store it in EFI_SYSTEM_CONTEXT_ARM.DFSR\r
-  \r
-  ldr       R1, [SP, #0x5c]         ; srsfd saved pre-exception CPSR on the stack \r
+\r
+  ldr       R1, [SP, #0x5c]         ; srsfd saved pre-exception CPSR on the stack\r
   str       R1, [SP, #0x40]         ; Store it in EFI_SYSTEM_CONTEXT_ARM.CPSR\r
 \r
   add       R2, SP, #0x38           ; Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR\r
   and       R3, R1, #0x1f           ; Check CPSR to see if User or System Mode\r
   cmp       R3, #0x1f               ; if ((CPSR == 0x10) || (CPSR == 0x1df))\r
-  cmpne     R3, #0x10               ;   \r
+  cmpne     R3, #0x10               ;\r
   stmeqed   R2, {lr}^               ;   save unbanked lr\r
-                                    ; else \r
+                                    ; else\r
   stmneed   R2, {lr}                ;   save SVC lr\r
 \r
 \r
-  ldr       R5, [SP, #0x58]         ; PC is the LR pushed by srsfd \r
+  ldr       R5, [SP, #0x58]         ; PC is the LR pushed by srsfd\r
                                     ; Check to see if we have to adjust for Thumb entry\r
   sub       r4, r0, #1              ; if (ExceptionType == 1 || ExceptionType ==2)) {\r
-  cmp       r4, #1                  ;   // UND & SVC have differnt LR adjust for Thumb \r
+  cmp       r4, #1                  ;   // UND & SVC have differnt LR adjust for Thumb\r
   bhi       NoAdjustNeeded\r
-  \r
-  tst       r1, #0x20               ;   if ((CPSR & T)) == T) {  // Thumb Mode on entry \r
+\r
+  tst       r1, #0x20               ;   if ((CPSR & T)) == T) {  // Thumb Mode on entry\r
   addne     R5, R5, #2              ;     PC += 2;\r
-  str       R5,[SP,#0x58]           ; Update LR value pused by srsfd \r
-  \r
+  str       R5,[SP,#0x58]           ; Update LR value pused by srsfd\r
+\r
 NoAdjustNeeded\r
 \r
   str       R5, [SP, #0x3c]         ; Store it in EFI_SYSTEM_CONTEXT_ARM.PC\r
-  \r
-  sub       R1, SP, #0x60           ; We pused 0x60 bytes on the stack \r
+\r
+  sub       R1, SP, #0x60           ; We pused 0x60 bytes on the stack\r
   str       R1, [SP, #0x34]         ; Store it in EFI_SYSTEM_CONTEXT_ARM.SP\r
-  \r
-                                    ; R0 is ExceptionType \r
-  mov       R1,SP                   ; R1 is SystemContext \r
 \r
-/* \r
+                                    ; R0 is ExceptionType\r
+  mov       R1,SP                   ; R1 is SystemContext\r
+\r
+/*\r
 VOID\r
 EFIAPI\r
 GdbExceptionHandler (\r
@@ -231,29 +231,29 @@ GdbExceptionHandler (
 \r
 */\r
   blx       GdbExceptionHandler     ; Call exception handler\r
-  \r
+\r
   ldr       R1,[SP,#0x3c]           ; EFI_SYSTEM_CONTEXT_ARM.PC\r
-  str       R1,[SP,#0x58]           ; Store it back to srsfd stack slot so it can be restored \r
+  str       R1,[SP,#0x58]           ; Store it back to srsfd stack slot so it can be restored\r
 \r
   ldr       R1,[SP,#0x40]           ; EFI_SYSTEM_CONTEXT_ARM.CPSR\r
-  str       R1,[SP,#0x5c]           ; Store it back to srsfd stack slot so it can be restored \r
-  \r
+  str       R1,[SP,#0x5c]           ; Store it back to srsfd stack slot so it can be restored\r
+\r
   add       R3, SP, #0x54           ; Make R3 point to SVC LR saved on entry\r
   add       R2, SP, #0x38           ; Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR\r
   and       R1, R1, #0x1f           ; Check to see if User or System Mode\r
   cmp       R1, #0x1f               ; if ((CPSR == 0x10) || (CPSR == 0x1f))\r
-  cmpne     R1, #0x10               ;   \r
+  cmpne     R1, #0x10               ;\r
   ldmeqed   R2, {lr}^               ;   restore unbanked lr\r
                                     ; else\r
   ldmneed   R3, {lr}                ;   restore SVC lr, via ldmfd SP!, {LR}\r
-  \r
+\r
   ldmfd     SP!,{R0-R12}            ; Restore general purpose registers\r
                                     ; Exception handler can not change SP\r
-                                    \r
+\r
   add       SP,SP,#0x20             ; Clear out the remaining stack space\r
   ldmfd     SP!,{LR}                ; restore the link register for this context\r
   rfefd     SP!                     ; return from exception via srsfd stack slot\r
-  \r
+\r
   END\r
 \r
 \r