IdeDev,\r
(VOID *) AtaIdentifyPointer,\r
sizeof (EFI_IDENTIFY_DATA),\r
- IDENTIFY_DRIVE_CMD,\r
+ ATA_CMD_IDENTIFY_DRIVE,\r
DeviceSelect,\r
0,\r
0,\r
\r
Atapi6IdentifyStruct = IdeDev->pIdData;\r
\r
- if ((Atapi6IdentifyStruct->AtapiData.cmd_set_support_83 & bit10) == 0) {\r
+ if ((Atapi6IdentifyStruct->AtapiData.cmd_set_support_83 & BIT10) == 0) {\r
//\r
// The device dosn't support 48 bit addressing\r
//\r
return EFI_DEVICE_ERROR;\r
}\r
\r
- if (AtaCommand == SET_FEATURES_CMD) {\r
+ if (AtaCommand == ATA_CMD_SET_FEATURES) {\r
IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, 0x03);\r
}\r
\r
\r
DEBUG_CODE_BEGIN ();\r
\r
- if (StatusRegister & DWF) {\r
+ if (StatusRegister & ATA_STSREG_DWF) {\r
DEBUG (\r
(EFI_D_BLKIO,\r
"CheckErrorStatus()-- %02x : Error : Write Fault\n",\r
);\r
}\r
\r
- if (StatusRegister & CORR) {\r
+ if (StatusRegister & ATA_STSREG_CORR) {\r
DEBUG (\r
(EFI_D_BLKIO,\r
"CheckErrorStatus()-- %02x : Error : Corrected Data\n",\r
);\r
}\r
\r
- if (StatusRegister & ERR) {\r
+ if (StatusRegister & ATA_STSREG_ERR) {\r
ErrorRegister = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Error);\r
\r
- if (ErrorRegister & BBK_ERR) {\r
+ if (ErrorRegister & ATA_ERRREG_BBK) {\r
DEBUG (\r
(EFI_D_BLKIO,\r
"CheckErrorStatus()-- %02x : Error : Bad Block Detected\n",\r
);\r
}\r
\r
- if (ErrorRegister & UNC_ERR) {\r
+ if (ErrorRegister & ATA_ERRREG_UNC) {\r
DEBUG (\r
(EFI_D_BLKIO,\r
"CheckErrorStatus()-- %02x : Error : Uncorrectable Data\n",\r
);\r
}\r
\r
- if (ErrorRegister & MC_ERR) {\r
+ if (ErrorRegister & ATA_ERRREG_MC) {\r
DEBUG (\r
(EFI_D_BLKIO,\r
"CheckErrorStatus()-- %02x : Error : Media Change\n",\r
);\r
}\r
\r
- if (ErrorRegister & ABRT_ERR) {\r
+ if (ErrorRegister & ATA_ERRREG_ABRT) {\r
DEBUG (\r
(EFI_D_BLKIO,\r
"CheckErrorStatus()-- %02x : Error : Abort\n",\r
);\r
}\r
\r
- if (ErrorRegister & TK0NF_ERR) {\r
+ if (ErrorRegister & ATA_ERRREG_TK0NF) {\r
DEBUG (\r
(EFI_D_BLKIO,\r
"CheckErrorStatus()-- %02x : Error : Track 0 Not Found\n",\r
);\r
}\r
\r
- if (ErrorRegister & AMNF_ERR) {\r
+ if (ErrorRegister & ATA_ERRREG_AMNF) {\r
DEBUG (\r
(EFI_D_BLKIO,\r
"CheckErrorStatus()-- %02x : Error : Address Mark Not Found\n",\r
\r
DEBUG_CODE_END ();\r
\r
- if ((StatusRegister & (ERR | DWF | CORR)) == 0) {\r
+ if ((StatusRegister & (ATA_STSREG_ERR | ATA_STSREG_DWF | ATA_STSREG_CORR)) == 0) {\r
return EFI_SUCCESS;\r
}\r
\r
//\r
// Using ATA Read Sector(s) command (opcode=0x20) with PIO DATA IN protocol\r
//\r
- AtaCommand = READ_SECTORS_CMD;\r
+ AtaCommand = ATA_CMD_READ_SECTORS;\r
\r
\r
BlocksRemaining = NumberOfBlocks;\r
//\r
// Using Write Sector(s) command (opcode=0x30) with PIO DATA OUT protocol\r
//\r
- AtaCommand = WRITE_SECTORS_CMD;\r
+ AtaCommand = ATA_CMD_WRITE_SECTORS;\r
\r
BlocksRemaining = NumberOfBlocks;\r
\r
//\r
// set SRST bit to initiate soft reset\r
//\r
- DeviceControl |= SRST;\r
+ DeviceControl |= ATA_CTLREG_SRST;\r
\r
//\r
// disable Interrupt\r
//\r
- DeviceControl |= bit1;\r
+ DeviceControl |= BIT1;\r
\r
IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);\r
\r
//\r
// Using ATA "Read Sectors Ext" command(opcode=0x24) with PIO DATA IN protocol\r
//\r
- AtaCommand = READ_SECTORS_EXT_CMD;\r
+ AtaCommand = ATA_CMD_READ_SECTORS_EXT;\r
Buffer = DataBuffer;\r
BlocksRemaining = NumberOfBlocks;\r
Lba64 = StartLba;\r
//\r
// Using ATA "Write Sectors Ext" cmd(opcode=0x24) with PIO DATA OUT protocol\r
//\r
- AtaCommand = WRITE_SECTORS_EXT_CMD;\r
+ AtaCommand = ATA_CMD_WRITE_SECTORS_EXT;\r
Lba64 = StartLba;\r
Buffer = DataBuffer;\r
BlocksRemaining = NumberOfBlocks;\r
//\r
// Fill feature register if needed\r
//\r
- if (AtaCommand == SET_FEATURES_CMD) {\r
+ if (AtaCommand == ATA_CMD_SET_FEATURES) {\r
IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, 0x03);\r
}\r
\r
//\r
// Fill feature register if needed\r
//\r
- if (AtaCommand == SET_FEATURES_CMD) {\r
+ if (AtaCommand == ATA_CMD_SET_FEATURES) {\r
IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, 0x03);\r
}\r
\r
Device = (UINT8) ((IdeDev->Device << 4) | 0xe0);\r
Status = AtaNonDataCommandIn (\r
IdeDev,\r
- ATA_SMART_CMD,\r
+ ATA_CMD_SMART,\r
Device,\r
ATA_SMART_ENABLE_OPERATION,\r
0,\r
IdeDev,\r
(VOID *) TmpAtaIdentifyPointer,\r
sizeof (EFI_IDENTIFY_DATA),\r
- IDENTIFY_DRIVE_CMD,\r
+ ATA_CMD_IDENTIFY_DRIVE,\r
DeviceSelect,\r
0,\r
0,\r
//\r
AtaNonDataCommandIn (\r
IdeDev,\r
- ATA_SMART_CMD,\r
+ ATA_CMD_SMART,\r
Device,\r
ATA_SMART_RETURN_STATUS,\r
0,\r
\r
switch (UdmaOp) {\r
case AtaUdmaReadOp:\r
- MaxDmaCommandSectors = MAX_DMA_COMMAND_SECTORS;\r
+ MaxDmaCommandSectors = ATAPI_MAX_DMA_CMD_SECTORS;\r
PciIoProtocolOp = EfiPciIoOperationBusMasterWrite;\r
- AtaCommand = READ_DMA_CMD;\r
+ AtaCommand = ATA_CMD_READ_DMA;\r
break;\r
case AtaUdmaReadExtOp:\r
- MaxDmaCommandSectors = MAX_DMA_EXT_COMMAND_SECTORS;\r
+ MaxDmaCommandSectors = ATAPI_MAX_DMA_EXT_CMD_SECTORS;\r
PciIoProtocolOp = EfiPciIoOperationBusMasterWrite;\r
- AtaCommand = READ_DMA_EXT_CMD;\r
+ AtaCommand = ATA_CMD_READ_DMA_EXT;\r
break;\r
case AtaUdmaWriteOp:\r
- MaxDmaCommandSectors = MAX_DMA_COMMAND_SECTORS;\r
+ MaxDmaCommandSectors = ATAPI_MAX_DMA_CMD_SECTORS;\r
PciIoProtocolOp = EfiPciIoOperationBusMasterRead;\r
- AtaCommand = WRITE_DMA_CMD;\r
+ AtaCommand = ATA_CMD_WRITE_DMA;\r
break;\r
case AtaUdmaWriteExtOp:\r
- MaxDmaCommandSectors = MAX_DMA_EXT_COMMAND_SECTORS;\r
+ MaxDmaCommandSectors = ATAPI_MAX_DMA_EXT_CMD_SECTORS;\r
PciIoProtocolOp = EfiPciIoOperationBusMasterRead;\r
- AtaCommand = WRITE_DMA_EXT_CMD;\r
+ AtaCommand = ATA_CMD_WRITE_DMA_EXT;\r
break;\r
default:\r
return EFI_UNSUPPORTED;\r
// Disable interrupt of Select device\r
//\r
IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl);\r
- DeviceControl |= IEN_L;\r
+ DeviceControl |= ATA_CTLREG_IEN_L;\r
IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);\r
\r
return EFI_SUCCESS;\r