//\r
StatusValue = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Error);\r
\r
- if (StatusValue & bit1) {\r
+ if (StatusValue & BIT1) {\r
return EFI_NO_MEDIA;\r
}\r
\r
- if (StatusValue & bit6) {\r
+ if (StatusValue & BIT6) {\r
return EFI_WRITE_PROTECTED;\r
} else {\r
return EFI_SUCCESS;\r
IdeDev,\r
(VOID *) AtapiIdentifyPointer,\r
sizeof (EFI_IDENTIFY_DATA),\r
- ATAPI_IDENTIFY_DEVICE_CMD,\r
+ ATA_CMD_IDENTIFY_DEVICE,\r
DeviceSelect,\r
0,\r
0,\r
//\r
IdeDev->SenseDataNumber = 20;\r
\r
- IdeDev->SenseData = AllocatePool (IdeDev->SenseDataNumber * sizeof (REQUEST_SENSE_DATA));\r
+ IdeDev->SenseData = AllocatePool (IdeDev->SenseDataNumber * sizeof (ATAPI_REQUEST_SENSE_DATA));\r
if (IdeDev->SenseData == NULL) {\r
gBS->FreePool (IdeDev->pIdData);\r
gBS->FreePool (IdeDev->pInquiryData);\r
{\r
ATAPI_PACKET_COMMAND Packet;\r
EFI_STATUS Status;\r
- INQUIRY_DATA *InquiryData;\r
+ ATAPI_INQUIRY_DATA *InquiryData;\r
\r
//\r
// prepare command packet for the ATAPI Inquiry Packet Command.\r
//\r
ZeroMem (&Packet, sizeof (ATAPI_PACKET_COMMAND));\r
- Packet.Inquiry.opcode = INQUIRY;\r
+ Packet.Inquiry.opcode = ATA_CMD_INQUIRY;\r
Packet.Inquiry.page_code = 0;\r
- Packet.Inquiry.allocation_length = sizeof (INQUIRY_DATA);\r
+ Packet.Inquiry.allocation_length = sizeof (ATAPI_INQUIRY_DATA);\r
\r
- InquiryData = AllocatePool (sizeof (INQUIRY_DATA));\r
+ InquiryData = AllocatePool (sizeof (ATAPI_INQUIRY_DATA));\r
if (InquiryData == NULL) {\r
return EFI_DEVICE_ERROR;\r
}\r
IdeDev,\r
&Packet,\r
(UINT16 *) InquiryData,\r
- sizeof (INQUIRY_DATA),\r
+ sizeof (ATAPI_INQUIRY_DATA),\r
ATAPITIMEOUT\r
);\r
if (EFI_ERROR (Status)) {\r
IDEWritePortB (\r
IdeDev->PciIo,\r
IdeDev->IoPort->Head,\r
- (UINT8) ((IdeDev->Device << 4) | DEFAULT_CMD) // DEFAULT_CMD: 0xa0 (1010,0000)\r
+ (UINT8) ((IdeDev->Device << 4) | ATA_DEFAULT_CMD) // DEFAULT_CMD: 0xa0 (1010,0000)\r
);\r
\r
//\r
IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, 0x00);\r
\r
//\r
- // set the transfersize to MAX_ATAPI_BYTE_COUNT to let the device\r
+ // set the transfersize to ATAPI_MAX_BYTE_COUNT to let the device\r
// determine how many data should be transferred.\r
//\r
IDEWritePortB (\r
IdeDev->PciIo,\r
IdeDev->IoPort->CylinderLsb,\r
- (UINT8) (MAX_ATAPI_BYTE_COUNT & 0x00ff)\r
+ (UINT8) (ATAPI_MAX_BYTE_COUNT & 0x00ff)\r
);\r
IDEWritePortB (\r
IdeDev->PciIo,\r
IdeDev->IoPort->CylinderMsb,\r
- (UINT8) (MAX_ATAPI_BYTE_COUNT >> 8)\r
+ (UINT8) (ATAPI_MAX_BYTE_COUNT >> 8)\r
);\r
\r
//\r
- // DEFAULT_CTL:0x0a (0000,1010)\r
+ // ATA_DEFAULT_CTL:0x0a (0000,1010)\r
// Disable interrupt\r
//\r
- IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DEFAULT_CTL);\r
+ IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, ATA_DEFAULT_CTL);\r
\r
//\r
// Send Packet command to inform device\r
// that the following data bytes are command packet.\r
//\r
- IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, PACKET_CMD);\r
+ IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, ATA_CMD_PACKET);\r
\r
Status = DRQReady (IdeDev, ATAPITIMEOUT);\r
if (EFI_ERROR (Status)) {\r
IDEWritePortB (\r
IdeDev->PciIo,\r
IdeDev->IoPort->Head,\r
- (UINT8) ((IdeDev->Device << 4) | DEFAULT_CMD) // DEFAULT_CMD: 0xa0 (1010,0000)\r
+ (UINT8) ((IdeDev->Device << 4) | ATA_DEFAULT_CMD) // ATA_DEFAULT_CMD: 0xa0 (1010,0000)\r
);\r
\r
//\r
IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, 0x00);\r
\r
//\r
- // set the transfersize to MAX_ATAPI_BYTE_COUNT to\r
+ // set the transfersize to ATAPI_MAX_BYTE_COUNT to\r
// let the device determine how many data should be transferred.\r
//\r
IDEWritePortB (\r
IdeDev->PciIo,\r
IdeDev->IoPort->CylinderLsb,\r
- (UINT8) (MAX_ATAPI_BYTE_COUNT & 0x00ff)\r
+ (UINT8) (ATAPI_MAX_BYTE_COUNT & 0x00ff)\r
);\r
IDEWritePortB (\r
IdeDev->PciIo,\r
IdeDev->IoPort->CylinderMsb,\r
- (UINT8) (MAX_ATAPI_BYTE_COUNT >> 8)\r
+ (UINT8) (ATAPI_MAX_BYTE_COUNT >> 8)\r
);\r
\r
//\r
// DEFAULT_CTL:0x0a (0000,1010)\r
// Disable interrupt\r
//\r
- IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DEFAULT_CTL);\r
+ IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, ATA_DEFAULT_CTL);\r
\r
//\r
// Send Packet command to inform device\r
// that the following data bytes are command packet.\r
//\r
- IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, PACKET_CMD);\r
+ IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, ATA_CMD_PACKET);\r
\r
Status = DRQReady2 (IdeDev, ATAPITIMEOUT);\r
if (EFI_ERROR (Status)) {\r
// fill command packet\r
//\r
ZeroMem (&Packet, sizeof (ATAPI_PACKET_COMMAND));\r
- Packet.TestUnitReady.opcode = TEST_UNIT_READY;\r
+ Packet.TestUnitReady.opcode = ATA_CMD_TEST_UNIT_READY;\r
\r
//\r
// send command packet\r
)\r
{\r
EFI_STATUS Status;\r
- REQUEST_SENSE_DATA *Sense;\r
+ ATAPI_REQUEST_SENSE_DATA *Sense;\r
UINT16 *Ptr;\r
BOOLEAN FetchSenseData;\r
ATAPI_PACKET_COMMAND Packet;\r
\r
*SenseCounts = 0;\r
\r
- ZeroMem (IdeDev->SenseData, sizeof (REQUEST_SENSE_DATA) * (IdeDev->SenseDataNumber));\r
+ ZeroMem (IdeDev->SenseData, sizeof (ATAPI_REQUEST_SENSE_DATA) * (IdeDev->SenseDataNumber));\r
//\r
// fill command packet for Request Sense Packet Command\r
//\r
ZeroMem (&Packet, sizeof (ATAPI_PACKET_COMMAND));\r
- Packet.RequestSence.opcode = REQUEST_SENSE;\r
- Packet.RequestSence.allocation_length = sizeof (REQUEST_SENSE_DATA);\r
+ Packet.RequestSence.opcode = ATA_CMD_REQUEST_SENSE;\r
+ Packet.RequestSence.allocation_length = sizeof (ATAPI_REQUEST_SENSE_DATA);\r
\r
//\r
// initialize pointer\r
//\r
for (FetchSenseData = TRUE; FetchSenseData;) {\r
\r
- Sense = (REQUEST_SENSE_DATA *) Ptr;\r
+ Sense = (ATAPI_REQUEST_SENSE_DATA *) Ptr;\r
\r
//\r
// send out Request Sense Packet Command and get one Sense data form device\r
IdeDev,\r
&Packet,\r
Ptr,\r
- sizeof (REQUEST_SENSE_DATA),\r
+ sizeof (ATAPI_REQUEST_SENSE_DATA),\r
ATAPITIMEOUT\r
);\r
//\r
// In this case, dead loop occurs if we don't have a gatekeeper. 20 is\r
// supposed to be large enough for any ATAPI device.\r
//\r
- if ((Sense->sense_key != SK_NO_SENSE) && ((*SenseCounts) < 20)) {\r
+ if ((Sense->sense_key != ATA_SK_NO_SENSE) && ((*SenseCounts) < 20)) {\r
//\r
// Ptr is word-based pointer\r
//\r
- Ptr += (sizeof (REQUEST_SENSE_DATA) + 1) >> 1;\r
+ Ptr += (sizeof (ATAPI_REQUEST_SENSE_DATA) + 1) >> 1;\r
\r
} else {\r
//\r
//\r
// used for capacity data returned from ATAPI device\r
//\r
- READ_CAPACITY_DATA Data;\r
- READ_FORMAT_CAPACITY_DATA FormatData;\r
+ ATAPI_READ_CAPACITY_DATA Data;\r
+ ATAPI_READ_FORMAT_CAPACITY_DATA FormatData;\r
\r
*SenseCount = 0;\r
\r
if (IdeDev->Type == IdeCdRom) {\r
\r
ZeroMem (&Packet, sizeof (ATAPI_PACKET_COMMAND));\r
- Packet.Inquiry.opcode = READ_CAPACITY;\r
+ Packet.Inquiry.opcode = ATA_CMD_READ_CAPACITY;\r
Status = AtapiPacketCommandIn (\r
IdeDev,\r
&Packet,\r
(UINT16 *) &Data,\r
- sizeof (READ_CAPACITY_DATA),\r
+ sizeof (ATAPI_READ_CAPACITY_DATA),\r
ATAPITIMEOUT\r
);\r
\r
// Type == IdeMagnetic\r
//\r
ZeroMem (&Packet, sizeof (ATAPI_PACKET_COMMAND));\r
- Packet.ReadFormatCapacity.opcode = READ_FORMAT_CAPACITY;\r
+ Packet.ReadFormatCapacity.opcode = ATA_CMD_READ_FORMAT_CAPACITY;\r
Packet.ReadFormatCapacity.allocation_length_lo = 12;\r
Status = AtapiPacketCommandIn (\r
IdeDev,\r
&Packet,\r
(UINT16 *) &FormatData,\r
- sizeof (READ_FORMAT_CAPACITY_DATA),\r
+ sizeof (ATAPI_READ_FORMAT_CAPACITY_DATA),\r
ATAPITIMEOUT\r
);\r
}\r
{\r
\r
ATAPI_PACKET_COMMAND Packet;\r
- READ10_CMD *Read10Packet;\r
+ ATAPI_READ10_CMD *Read10Packet;\r
EFI_STATUS Status;\r
UINTN BlocksRemaining;\r
UINT32 Lba32;\r
// fill the Packet data structure\r
//\r
\r
- Read10Packet->opcode = READ_10;\r
+ Read10Packet->opcode = ATA_CMD_READ_10;\r
\r
//\r
// Lba0 ~ Lba3 specify the start logical block address of the data transfer.\r
{\r
\r
ATAPI_PACKET_COMMAND Packet;\r
- READ10_CMD *Read10Packet;\r
+ ATAPI_READ10_CMD *Read10Packet;\r
\r
EFI_STATUS Status;\r
UINTN BlocksRemaining;\r
//\r
// Command code is WRITE_10.\r
//\r
- Read10Packet->opcode = WRITE_10;\r
+ Read10Packet->opcode = ATA_CMD_WRITE_10;\r
\r
//\r
// Lba0 ~ Lba3 specify the start logical block address of the data transfer.\r
// for ATAPI device, no need to wait DRDY ready after device selecting.\r
// (bit7 and bit5 are both set to 1 for backward compatibility)\r
//\r
- DeviceSelect = (UINT8) (((bit7 | bit5) | (IdeDev->Device << 4)));\r
+ DeviceSelect = (UINT8) (((BIT7 | BIT5) | (IdeDev->Device << 4)));\r
IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Head, DeviceSelect);\r
\r
- Command = ATAPI_SOFT_RESET_CMD;\r
+ Command = ATA_CMD_SOFT_RESET;\r
IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, Command);\r
\r
//\r
OUT SENSE_RESULT *Result\r
)\r
{\r
- REQUEST_SENSE_DATA *SenseData;\r
+ ATAPI_REQUEST_SENSE_DATA *SenseData;\r
\r
if (SenseCount == 0) {\r
return EFI_INVALID_PARAMETER;\r
*Result = SenseOtherSense;\r
\r
switch (SenseData->sense_key) {\r
- case SK_NO_SENSE:\r
+ case ATA_SK_NO_SENSE:\r
*Result = SenseNoSenseKey;\r
break;\r
- case SK_NOT_READY:\r
+ case ATA_SK_NOT_READY:\r
switch (SenseData->addnl_sense_code) {\r
- case ASC_NO_MEDIA:\r
+ case ATA_ASC_NO_MEDIA:\r
*Result = SenseNoMedia;\r
break;\r
- case ASC_MEDIA_UPSIDE_DOWN:\r
+ case ATA_ASC_MEDIA_UPSIDE_DOWN:\r
*Result = SenseMediaError;\r
break;\r
- case ASC_NOT_READY:\r
- if (SenseData->addnl_sense_code_qualifier == ASCQ_IN_PROGRESS) {\r
+ case ATA_ASC_NOT_READY:\r
+ if (SenseData->addnl_sense_code_qualifier == ATA_ASCQ_IN_PROGRESS) {\r
*Result = SenseDeviceNotReadyNeedRetry;\r
} else {\r
*Result = SenseDeviceNotReadyNoRetry;\r
break;\r
}\r
break;\r
- case SK_UNIT_ATTENTION:\r
- if (SenseData->addnl_sense_code == ASC_MEDIA_CHANGE) {\r
+ case ATA_SK_UNIT_ATTENTION:\r
+ if (SenseData->addnl_sense_code == ATA_ASC_MEDIA_CHANGE) {\r
*Result = SenseMediaChange;\r
}\r
break;\r
- case SK_MEDIUM_ERROR:\r
+ case ATA_SK_MEDIUM_ERROR:\r
switch (SenseData->addnl_sense_code) {\r
- case ASC_MEDIA_ERR1:\r
- case ASC_MEDIA_ERR2:\r
- case ASC_MEDIA_ERR3:\r
- case ASC_MEDIA_ERR4:\r
+ case ATA_ASC_MEDIA_ERR1:\r
+ case ATA_ASC_MEDIA_ERR2:\r
+ case ATA_ASC_MEDIA_ERR3:\r
+ case ATA_ASC_MEDIA_ERR4:\r
*Result = SenseMediaError;\r
break;\r
}\r
UINT16 TempWordBuffer;\r
\r
AltRegister = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Alt.AltStatus);\r
- if ((AltRegister & BSY) == BSY) {\r
+ if ((AltRegister & ATA_STSREG_BSY) == ATA_STSREG_BSY) {\r
return EFI_NOT_READY;\r
}\r
- if ((AltRegister & (BSY | DRQ)) == DRQ) {\r
+ if ((AltRegister & (ATA_STSREG_BSY | ATA_STSREG_DRQ)) == ATA_STSREG_DRQ) {\r
TempWordBuffer = IDEReadPortB (IdeDev->PciIo,IdeDev->IoPort->Alt.AltStatus);\r
- while ((TempWordBuffer & (BSY | DRQ)) == DRQ) {\r
+ while ((TempWordBuffer & (ATA_STSREG_BSY | ATA_STSREG_DRQ)) == ATA_STSREG_DRQ) {\r
IDEReadPortWMultiple (\r
IdeDev->PciIo,\r
IdeDev->IoPort->Data, \r
projects / mirror_edk2.git / blobdiff