Retired PciIncompatibleDeviceSupportLib from IntelFrameworkModulePkg.

[mirror_edk2.git] / IntelFrameworkModulePkg / Bus / Pci / PciBusDxe / PciOptionRomSupport.c

diff --git a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
index 9365847eb55e3178fb063292dd823b2256217d65..19803efb2c6acc29370416fb443ffb682f8c20c9 100644 (file)
--- a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
+++ b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
@@ -216,9 +216,10 @@ LoadFile2 (
 }\r
 \r
 /**\r
-  Get Pci device's oprom infor bits.\r
+  Get Pci device's oprom information.\r
 \r
-  @param PciIoDevice    Pci device instance.\r
+  @param PciIoDevice    Input Pci device instance.\r
+                        Output Pci device instance with updated OptionRom size.\r
 \r
   @retval EFI_NOT_FOUND Pci device has not Option Rom.\r
   @retval EFI_SUCCESS   Pci device has Option Rom.\r
@@ -226,7 +227,7 @@ LoadFile2 (
 **/\r
 EFI_STATUS\r
 GetOpRomInfo (\r
-  IN PCI_IO_DEVICE    *PciIoDevice\r
+  IN OUT PCI_IO_DEVICE    *PciIoDevice\r
   )\r
 {\r
   UINT8                           RomBarIndex;\r
@@ -255,11 +256,7 @@ GetOpRomInfo (
 \r
   if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) {\r
     //\r
-    // If is ppb\r
-    //\r
-\r
-    //\r
-    // 0x38\r
+    // If is ppb, 0x38\r
     //\r
     RomBarIndex = PCI_BRIDGE_ROMBAR;\r
   }\r
@@ -269,9 +266,8 @@ GetOpRomInfo (
   AllOnes = 0xfffffffe;\r
   Address = EFI_PCI_ADDRESS (Bus, Device, Function, RomBarIndex);\r
 \r
-  Status = PciRootBridgeIoWrite (\r
+  Status = PciRootBridgeIo->Pci.Write (\r
                                   PciRootBridgeIo,\r
-                                  &PciIoDevice->Pci,\r
                                   EfiPciWidthUint32,\r
                                   Address,\r
                                   1,\r
@@ -284,9 +280,8 @@ GetOpRomInfo (
   //\r
   // Read back\r
   //\r
-  Status = PciRootBridgeIoRead (\r
+  Status = PciRootBridgeIo->Pci.Read(\r
                                   PciRootBridgeIo,\r
-                                  &PciIoDevice->Pci,\r
                                   EfiPciWidthUint32,\r
                                   Address,\r
                                   1,\r
@@ -295,6 +290,7 @@ GetOpRomInfo (
   if (EFI_ERROR (Status)) {\r
     return EFI_NOT_FOUND;\r
   }\r
+\r
   //\r
   // Bits [1, 10] are reserved\r
   //\r
@@ -558,7 +554,7 @@ RomDecode (
     // Clear all bars\r
     //\r
     for (Offset = 0x10; Offset <= 0x24; Offset += sizeof (UINT32)) {\r
-      PciIoWrite (PciIo, EfiPciIoWidthUint32, Offset, 1, &gAllZero);\r
+      PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, Offset, 1, &gAllZero);\r
     }\r
 \r
     //\r
@@ -566,13 +562,13 @@ RomDecode (
     // enable its decoder\r
     //\r
     Value32 = RomBar | 0x1;\r
-    PciIoWrite (\r
-                PciIo,\r
-                (EFI_PCI_IO_PROTOCOL_WIDTH) EfiPciWidthUint32,\r
-                RomBarIndex,\r
-                1,\r
-                &Value32\r
-                );\r
+    PciIo->Pci.Write (\r
+                 PciIo,\r
+                 (EFI_PCI_IO_PROTOCOL_WIDTH) EfiPciWidthUint32,\r
+                 RomBarIndex,\r
+                 1,\r
+                 &Value32\r
+                 );\r
 \r
     //\r
     // Programe all upstream bridge\r
@@ -600,13 +596,13 @@ RomDecode (
     // disable rom decode\r
     //\r
     Value32 = 0xFFFFFFFE;\r
-    PciIoWrite (\r
-                PciIo,\r
-                (EFI_PCI_IO_PROTOCOL_WIDTH) EfiPciWidthUint32,\r
-                RomBarIndex,\r
-                1,\r
-                &Value32\r
-                );\r
+    PciIo->Pci.Write (\r
+                 PciIo,\r
+                 (EFI_PCI_IO_PROTOCOL_WIDTH) EfiPciWidthUint32,\r
+                 RomBarIndex,\r
+                 1,\r
+                 &Value32\r
+                 );\r
 \r
   }\r
 }\r