+++ /dev/null
-/** @file\r
- Internal include file of CPU I/O DXE Driver.\r
-\r
- Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>\r
- SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#ifndef __CPU_IO_DXE_H__\r
-#define __CPU_IO_DXE_H__\r
-\r
-\r
-#include <PiDxe.h>\r
-\r
-#include <Protocol/CpuIo.h>\r
-\r
-#include <Library/BaseLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/IoLib.h>\r
-#include <Library/UefiBootServicesTableLib.h>\r
-\r
-#define MAX_IO_PORT_ADDRESS 0xFFFF\r
-\r
-/**\r
- Reads memory-mapped registers.\r
-\r
- The I/O operations are carried out exactly as requested. The caller is responsible\r
- for satisfying any alignment and I/O width restrictions that a PI System on a\r
- platform might require. For example on some platforms, width requests of\r
- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will\r
- be handled by the driver.\r
-\r
- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,\r
- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for\r
- each of the Count operations that is performed.\r
-\r
- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,\r
- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is\r
- incremented for each of the Count operations that is performed. The read or\r
- write operation is performed Count times on the same Address.\r
-\r
- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,\r
- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is\r
- incremented for each of the Count operations that is performed. The read or\r
- write operation is performed Count times from the first element of Buffer.\r
-\r
- @param[in] This A pointer to the EFI_CPU_IO_PROTOCOL instance.\r
- @param[in] Width Signifies the width of the I/O or Memory operation.\r
- @param[in] Address The base address of the I/O operation.\r
- @param[in] Count The number of I/O operations to perform. The number of\r
- bytes moved is Width size * Count, starting at Address.\r
- @param[out] Buffer For read operations, the destination buffer to store the results.\r
- For write operations, the source buffer from which to write data.\r
-\r
- @retval EFI_SUCCESS The data was read from or written to the PI system.\r
- @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.\r
- @retval EFI_INVALID_PARAMETER Buffer is NULL.\r
- @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.\r
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,\r
- and Count is not valid for this PI system.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-CpuMemoryServiceRead (\r
- IN EFI_CPU_IO_PROTOCOL *This,\r
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
- IN UINT64 Address,\r
- IN UINTN Count,\r
- OUT VOID *Buffer\r
- );\r
-\r
-/**\r
- Writes memory-mapped registers.\r
-\r
- The I/O operations are carried out exactly as requested. The caller is responsible\r
- for satisfying any alignment and I/O width restrictions that a PI System on a\r
- platform might require. For example on some platforms, width requests of\r
- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will\r
- be handled by the driver.\r
-\r
- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,\r
- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for\r
- each of the Count operations that is performed.\r
-\r
- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,\r
- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is\r
- incremented for each of the Count operations that is performed. The read or\r
- write operation is performed Count times on the same Address.\r
-\r
- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,\r
- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is\r
- incremented for each of the Count operations that is performed. The read or\r
- write operation is performed Count times from the first element of Buffer.\r
-\r
- @param[in] This A pointer to the EFI_CPU_IO_PROTOCOL instance.\r
- @param[in] Width Signifies the width of the I/O or Memory operation.\r
- @param[in] Address The base address of the I/O operation.\r
- @param[in] Count The number of I/O operations to perform. The number of\r
- bytes moved is Width size * Count, starting at Address.\r
- @param[in] Buffer For read operations, the destination buffer to store the results.\r
- For write operations, the source buffer from which to write data.\r
-\r
- @retval EFI_SUCCESS The data was read from or written to the PI system.\r
- @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.\r
- @retval EFI_INVALID_PARAMETER Buffer is NULL.\r
- @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.\r
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,\r
- and Count is not valid for this PI system.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-CpuMemoryServiceWrite (\r
- IN EFI_CPU_IO_PROTOCOL *This,\r
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
- IN UINT64 Address,\r
- IN UINTN Count,\r
- IN VOID *Buffer\r
- );\r
-\r
-/**\r
- Reads I/O registers.\r
-\r
- The I/O operations are carried out exactly as requested. The caller is responsible\r
- for satisfying any alignment and I/O width restrictions that a PI System on a\r
- platform might require. For example on some platforms, width requests of\r
- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will\r
- be handled by the driver.\r
-\r
- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,\r
- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for\r
- each of the Count operations that is performed.\r
-\r
- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,\r
- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is\r
- incremented for each of the Count operations that is performed. The read or\r
- write operation is performed Count times on the same Address.\r
-\r
- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,\r
- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is\r
- incremented for each of the Count operations that is performed. The read or\r
- write operation is performed Count times from the first element of Buffer.\r
-\r
- @param[in] This A pointer to the EFI_CPU_IO_PROTOCOL instance.\r
- @param[in] Width Signifies the width of the I/O or Memory operation.\r
- @param[in] Address The base address of the I/O operation.\r
- @param[in] Count The number of I/O operations to perform. The number of\r
- bytes moved is Width size * Count, starting at Address.\r
- @param[out] Buffer For read operations, the destination buffer to store the results.\r
- For write operations, the source buffer from which to write data.\r
-\r
- @retval EFI_SUCCESS The data was read from or written to the PI system.\r
- @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.\r
- @retval EFI_INVALID_PARAMETER Buffer is NULL.\r
- @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.\r
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,\r
- and Count is not valid for this PI system.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-CpuIoServiceRead (\r
- IN EFI_CPU_IO_PROTOCOL *This,\r
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
- IN UINT64 Address,\r
- IN UINTN Count,\r
- OUT VOID *Buffer\r
- );\r
-\r
-/**\r
- Write I/O registers.\r
-\r
- The I/O operations are carried out exactly as requested. The caller is responsible\r
- for satisfying any alignment and I/O width restrictions that a PI System on a\r
- platform might require. For example on some platforms, width requests of\r
- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will\r
- be handled by the driver.\r
-\r
- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,\r
- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for\r
- each of the Count operations that is performed.\r
-\r
- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,\r
- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is\r
- incremented for each of the Count operations that is performed. The read or\r
- write operation is performed Count times on the same Address.\r
-\r
- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,\r
- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is\r
- incremented for each of the Count operations that is performed. The read or\r
- write operation is performed Count times from the first element of Buffer.\r
-\r
- @param[in] This A pointer to the EFI_CPU_IO_PROTOCOL instance.\r
- @param[in] Width Signifies the width of the I/O or Memory operation.\r
- @param[in] Address The base address of the I/O operation.\r
- @param[in] Count The number of I/O operations to perform. The number of\r
- bytes moved is Width size * Count, starting at Address.\r
- @param[in] Buffer For read operations, the destination buffer to store the results.\r
- For write operations, the source buffer from which to write data.\r
-\r
- @retval EFI_SUCCESS The data was read from or written to the PI system.\r
- @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.\r
- @retval EFI_INVALID_PARAMETER Buffer is NULL.\r
- @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.\r
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,\r
- and Count is not valid for this PI system.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-CpuIoServiceWrite (\r
- IN EFI_CPU_IO_PROTOCOL *This,\r
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
- IN UINT64 Address,\r
- IN UINTN Count,\r
- IN VOID *Buffer\r
- );\r
-\r
-#endif\r
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