ProcessorPackageNumberRecordType = 21,\r
ProcessorCoreFrequencyListRecordType = 22,\r
ProcessorFsbFrequencyListRecordType = 23,\r
- ProcessorHealthStatusRecordType = 24\r
+ ProcessorHealthStatusRecordType = 24,\r
+ ProcessorCoreCountRecordType = 25,\r
+ ProcessorEnabledCoreCountRecordType = 26,\r
+ ProcessorThreadCountRecordType = 27,\r
+ ProcessorCharacteristicsRecordType = 28,\r
+ ProcessorFamily2RecordType = 29,\r
+ ProcessorPartNumberRecordType = 30,\r
} EFI_CPU_VARIABLE_RECORD_TYPE;\r
\r
- The data structure and all enumeration fields are *NOT* defined in ProcSubclass specification 0.9, which only\r
- defines the following macros to specify the record number of the data record:\r
+ The enumeration fields from ProcessorCoreFrequencyRecordType to ProcessorHealthStatusRecordType are *NOT* defined \r
+ in ProcSubclass specification 0.9, which only defines the following macros to specify the record number of the data record:\r
#define EFI_PROCESSOR_FREQUENCY_RECORD_NUMBER 0x00000001\r
#define EFI_PROCESSOR_BUS_FREQUENCY_RECORD_NUMBER 0x00000002\r
#define EFI_PROCESSOR_VERSION_RECORD_NUMBER 0x00000003\r
#define EFI_PROCESSOR_HEALTH_STATUS_RECORD_NUMBER 0x00000018\r
Keeping this inconsistency for backward compatibility.\r
\r
+ The enumeration fields from ProcessorCoreCountRecordType to ProcessorPartNumberRecordType are *NOT* defined \r
+ in ProcSubclass specification 0.9. \r
+ They are introduced to support new fields for type 4 defined in SmBios 2.6 specification.\r
+ Keeping this inconsistency to reflect the latest industry standard.\r
+\r
8. Guid/DataHubRecords.h\r
typedef union {\r
EFI_PROCESSOR_CORE_FREQUENCY_LIST_DATA ProcessorCoreFrequencyList;\r
...\r
- EFI_PROCESSOR_PACKAGE_NUMBER_DATA ProcessorPackageNumber;\r
+ EFI_PROCESSOR_FAMILY2_DATA ProcessorFamily2;\r
} EFI_CPU_VARIABLE_RECORD;\r
\r
typedef struct {\r
code logic. Therefore developer doesn't need to allocate memory dynamically to construct variable length data record.\r
Keeping this inconsistency for backward compatibility.\r
\r
+ 9. Guid/DataHubRecords.h\r
+ typedef STRING_REF EFI_PROCESSOR_PART_NUMBER_DATA;\r
+\r
+ typedef enum {\r
+ EfiProcessorFamilySh3 = 0x104,\r
+ EfiProcessorFamilySh4 = 0x105,\r
+ EfiProcessorFamilyArm = 0x118,\r
+ EfiProcessorFamilyStrongArm = 0x119,\r
+ EfiProcessorFamily6x86 = 0x12C,\r
+ EfiProcessorFamilyMediaGx = 0x12D,\r
+ EfiProcessorFamilyMii = 0x12E,\r
+ EfiProcessorFamilyWinChip = 0x140,\r
+ EfiProcessorFamilyDsp = 0x15E,\r
+ EfiProcessorFamilyVideo = 0x1F4\r
+ } EFI_PROCESSOR_FAMILY2_DATA;\r
+\r
+ typedef UINT8 EFI_PROCESSOR_CORE_COUNT_DATA;\r
+\r
+ typedef UINT8 EFI_PROCESSOR_ENABLED_CORE_COUNT_DATA;\r
+\r
+ typedef UINT8 EFI_PROCESSOR_THREAD_COUNT_DATA;\r
+\r
+ typedef struct {\r
+ UINT16 Reserved :1;\r
+ UINT16 Unknown :1;\r
+ UINT16 Capable64Bit :1;\r
+ UINT16 Reserved2 :13;\r
+ } EFI_PROCESSOR_CHARACTERISTICS_DATA;\r
+\r
+ The fields listed here are *NOT* defined in ProcSubclass specification 0.9. They are introduced to support\r
+ new fields for type 4 defined in SmBios 2.6 specification. \r
+ Keeping this inconsistency to reflect the latest industry standard.\r
+\r
##\r
# Mismatch with Intel Platform Innovation Framework for MemSubclass Specification (Version 0.90)\r
##\r
typedef struct {\r
...\r
EFI_INTER_LINK_DATA ManagementDeviceThresholdLink;\r
+ UINT8 ComponentType;\r
} EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA;\r
\r
- The field listed above is *NOT* defined in MiscSubclass specification 0.9. It is introduced to support\r
- new management device component (type 35) defined in SmBios 2.6 specification. \r
- Keeping this inconsistency to reflect the latest industry standard.\r
+ a. The field "ManagementDeviceThresholdLink" above is *NOT* defined in MiscSubclass specification 0.9. It is introduced to support\r
+ new management device component (type 35) defined in SmBios 2.6 specification. \r
+ Keeping this inconsistency to reflect the latest industry standard.\r
+ b. The field "ComponentType" above is *NOT* defined in MiscSubclass specifications 0.9. It's implementation-specific to simplify the code logic.\r
+ Keeping this inconsistency for backward compatibility.\r
\r
6. Guid/DataHubRecords.h\r
typedef struct {\r
...\r
EfiSlotTypeAgp2X = 0x10,\r
...\r
- EfiSlotTypePciExpress = 0xA5\r
+ EfiSlotTypePciExpress = 0xA5,\r
+ EfiSlotTypePciExpressX1 = 0xA6,\r
+ EfiSlotTypePciExpressX2 = 0xA7,\r
+ EfiSlotTypePciExpressX4 = 0xA8,\r
+ EfiSlotTypePciExpressX8 = 0xA9,\r
+ EfiSlotTypePciExpressX16 = 0xAA\r
} EFI_MISC_SLOT_TYPE;\r
\r
a. The field name "EfiSlotTypeAgp2X" is *NOT* consistent with MiscSubclass specification 0.9, in which it is named\r
"EfiSlotTypeApg2X".\r
From its literal sense, this field represents a AGP type display card, so it should be named as "EfiSlotTypeAgp2X".\r
- b. The "EfiSlotTypePciExpress" field is *NOT* defined in MiscSubclass specification 0.9. It isintroduced to support\r
- new system slots (type 9) defined in SmBios 2.6 specification.\r
+ b. The enumeration fields from "EfiSlotTypePciExpress" to "EfiSlotTypePciExpressX16" are *NOT* defined in MiscSubclass specification 0.9.\r
+ They are introduced to support new system slots (type 9) defined in SmBios 2.6 specification.\r
Keeping this inconsistency to reflect the latest industry standard.\r
\r
8. Guid/DataHubRecords.h\r
code logic. Therefore developer doesn't need to allocate memory dynamically to construct variable length data record.\r
Keeping this inconsistency for backward compatibility.\r
\r
+ 21. Guid/DataHubRecords.h\r
+ typedef struct {\r
+ EFI_MISC_COOLING_DEVICE_TYPE CoolingDeviceType;\r
+ EFI_INTER_LINK_DATA CoolingDeviceTemperatureLink;\r
+ UINT8 CoolingDeviceUnitGroup;\r
+ UINT16 CoolingDeviceNominalSpeed;\r
+ UINT32 CoolingDeviceOemDefined;\r
+ } EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA;\r
+\r
+ The "CoolingDeviceUnitGroup" field and "CoolingDeviceNominalSpeed" field are *NOT* consistent with \r
+ MiscSubclass specification 0.9. These fields are aligned with SMBIOS 2.6 specification. And user can easily\r
+ assign any value to CoolingDeviceNominalSpeed.\r
+\r
+ 22. Guid/DataHubRecords.h\r
+ typedef enum {\r
+ ...\r
+ EfiSlotDataBusWidth1xOrx1 = 0x8,\r
+ EfiSlotDataBusWidth2xOrx2 = 0x9,\r
+ EfiSlotDataBusWidth4xOrx4 = 0xA,\r
+ EfiSlotDataBusWidth8xOrx8 = 0xB,\r
+ EfiSlotDataBusWidth12xOrx12 = 0xC,\r
+ EfiSlotDataBusWidth16xOrx16 = 0xD,\r
+ EfiSlotDataBusWidth32xOrx32 = 0xE\r
+ } EFI_MISC_SLOT_DATA_BUS_WIDTH;\r
+\r
+ The enumeration fields from "EfiSlotDataBusWidth1xOrx1" to "EfiSlotDataBusWidth32xOrx32" are *NOT* defined in MiscSubclass specification 0.9.\r
+ They are introduced to support new system slots (type 9) defined in SmBios 2.6 specification.\r
+ Keeping this inconsistency to reflect the latest industry standard.\r
+\r
+ 23. Guid/DataHubRecords.h\r
+ typedef struct {\r
+ ...\r
+ UINT16 TemperatureProbeMaximumValue;\r
+ UINT16 TemperatureProbeMinimumValue;\r
+ UINT16 TemperatureProbeResolution;\r
+ UINT16 TemperatureProbeTolerance;\r
+ UINT16 TemperatureProbeAccuracy;\r
+ UINT16 TemperatureProbeNominalValue;\r
+ UINT16 MDLowerNoncriticalThreshold;\r
+ UINT16 MDUpperNoncriticalThreshold;\r
+ UINT16 MDLowerCriticalThreshold;\r
+ UINT16 MDUpperCriticalThreshold;\r
+ UINT16 MDLowerNonrecoverableThreshold;\r
+ UINT16 MDUpperNonrecoverableThreshold;\r
+ ...\r
+ } EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA;\r
+\r
+ The structure fields from "TemperatureProbeMaximumValue" to "MDUpperNonrecoverableThreshold" are *NOT* consistent with MiscSubclass specification 0.9.\r
+ The specification defines the fields type as EFI_EXP_BASE10_DATA. In fact, they should be UINT16 type because they refer to 16bit width data.\r
+ Keeping this inconsistency for backward compatibility.\r
+\r
+ 24. Guid/DataHubRecords.h\r
+ #define EFI_MISC_IPMI_INTERFACE_TYPE_DATA_RECORD_NUMBER EFI_MISC_IPMI_INTERFACE_TYPE_RECORD_NUMBER\r
+\r
+ The definition above is *NOT* defined in MiscSubclass specifications 0.9. It's defined for backward compatibility.\r
+\r
##\r
# Mismatch with Intel Platform Innovation Framework for Status Codes Specification (Version 0.92)\r
##\r
The enumeration fields listed above are *NOT* defined in Framework SmmCis specification 0.91. EdkII introduces\r
these fields to support new SMI types.\r
\r
+ 3. Include/Framework/SmmCis.h\r
+ typedef union {\r
+ ///\r
+ /// The processor save-state information for IA-32 processors. \r
+ ///\r
+ EFI_SMI_CPU_SAVE_STATE Ia32SaveState;\r
+ ///\r
+ /// Note: Inconsistency with the Framework SMM CIS spec - Itanium save state not included.\r
+ ///\r
+ /// The processor save-state information for Itanium processors.\r
+ ///\r
+ /// EFI_PMI_SYSTEM_CONTEXT ItaniumSaveState;\r
+ } EFI_SMM_CPU_SAVE_STATE;\r
+\r
##\r
# Mismatch with Intel Platform Innovation Framework for EFI S3 Resume Boot Path Specification (Version 0.9)\r
##\r
projects / mirror_edk2.git / blobdiff