/** @file\r
- DataHubRecord.h include all data hub sub class GUID defitions.\r
+ DataHubRecord.h includes all data hub subclass GUID definitions.\r
\r
- Copyright (c) 2007, Intel Corporation\r
- All rights reserved. This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
- Module Name:\r
-\r
- @par Revision Reference:\r
- These GUID are from Cache subclass spec 0.9, DataHub SubClass spec 0.9, Memory SubClass Spec 0.9,\r
- Processor Subclass spec 0.9, Misc SubClass spec 0.9.\r
+ This file includes all data hub sub class defitions from \r
+ Cache subclass specification 0.9, DataHub SubClass specification 0.9, Memory SubClass Spec 0.9,\r
+ Processor Subclass specification 0.9, and Misc SubClass specification 0.9.\r
+ \r
+Copyright (c) 2007 - 2011, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials are licensed and made available under \r
+the terms and conditions of the BSD License that accompanies this distribution. \r
+The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php. \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
#ifndef _DATAHUB_RECORDS_GUID_H_\r
#define _DATAHUB_RECORDS_GUID_H_\r
\r
-#include <PiPei.h>\r
+//\r
+// The include is required to retrieve type EFI_EXP_BASE10_DATA\r
+//\r
+#include <Guid/StatusCodeDataTypeId.h>\r
\r
#define EFI_PROCESSOR_SUBCLASS_GUID \\r
{ 0x26fdeb7e, 0xb8af, 0x4ccf, {0xaa, 0x97, 0x02, 0x63, 0x3c, 0xe4, 0x8c, 0xa7 } }\r
\r
extern EFI_GUID gEfiCacheSubClassGuid;\r
\r
-//\r
-// The memory subclass belongs to the data class and is identified as the memory \r
-// subclass by the GUID.\r
-//\r
+///\r
+/// The memory subclass belongs to the data class and is identified as the memory \r
+/// subclass by the GUID.\r
+///\r
#define EFI_MEMORY_SUBCLASS_GUID \\r
{0x4E8F4EBB, 0x64B9, 0x4e05, {0x9B, 0x18, 0x4C, 0xFE, 0x49, 0x23, 0x50, 0x97} }\r
\r
\r
extern EFI_GUID gEfiMiscSubClassGuid;\r
\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In ProcSubclass specification 0.9, the value is 0x0100.\r
+/// Keep it unchanged from the perspective of binary consistency.\r
+///\r
+#define EFI_PROCESSOR_SUBCLASS_VERSION 0x00010000\r
+\r
+#pragma pack(1)\r
+\r
+typedef struct _USB_PORT_DEVICE_PATH {\r
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;\r
+ PCI_DEVICE_PATH PciBusDevicePath;\r
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
+} USB_PORT_DEVICE_PATH;\r
+\r
+//\r
+// IDE\r
+//\r
+typedef struct _IDE_DEVICE_PATH {\r
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;\r
+ PCI_DEVICE_PATH PciBusDevicePath;\r
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
+} IDE_DEVICE_PATH;\r
+\r
+//\r
+// RMC Connector\r
+//\r
+typedef struct _RMC_CONN_DEVICE_PATH {\r
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;\r
+ PCI_DEVICE_PATH PciBridgeDevicePath;\r
+ PCI_DEVICE_PATH PciBusDevicePath;\r
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
+} RMC_CONN_DEVICE_PATH;\r
+\r
+//\r
+// RIDE\r
+//\r
+typedef struct _RIDE_DEVICE_PATH {\r
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;\r
+ PCI_DEVICE_PATH PciBridgeDevicePath;\r
+ PCI_DEVICE_PATH PciBusDevicePath;\r
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
+} RIDE_DEVICE_PATH;\r
+\r
+//\r
+// Gigabit NIC\r
+//\r
+typedef struct _GB_NIC_DEVICE_PATH {\r
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;\r
+ PCI_DEVICE_PATH PciBridgeDevicePath;\r
+ PCI_DEVICE_PATH PciXBridgeDevicePath;\r
+ PCI_DEVICE_PATH PciXBusDevicePath;\r
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
+} GB_NIC_DEVICE_PATH;\r
+\r
+//\r
+// P/S2 Connector\r
+//\r
+typedef struct _PS2_CONN_DEVICE_PATH {\r
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;\r
+ PCI_DEVICE_PATH LpcBridgeDevicePath;\r
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;\r
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
+} PS2_CONN_DEVICE_PATH;\r
+\r
+//\r
+// Serial Port Connector\r
+//\r
+typedef struct _SERIAL_CONN_DEVICE_PATH {\r
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;\r
+ PCI_DEVICE_PATH LpcBridgeDevicePath;\r
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;\r
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
+} SERIAL_CONN_DEVICE_PATH;\r
+\r
+//\r
+// Parallel Port Connector\r
+//\r
+typedef struct _PARALLEL_CONN_DEVICE_PATH {\r
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;\r
+ PCI_DEVICE_PATH LpcBridgeDevicePath;\r
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;\r
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
+} PARALLEL_CONN_DEVICE_PATH;\r
+\r
+//\r
+// Floopy Connector\r
+//\r
+typedef struct _FLOOPY_CONN_DEVICE_PATH {\r
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;\r
+ PCI_DEVICE_PATH LpcBridgeDevicePath;\r
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;\r
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
+} FLOOPY_CONN_DEVICE_PATH;\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.\r
+/// It's implementation-specific to simplify the code logic.\r
+///\r
+typedef union _EFI_MISC_PORT_DEVICE_PATH {\r
+ USB_PORT_DEVICE_PATH UsbDevicePath;\r
+ IDE_DEVICE_PATH IdeDevicePath;\r
+ RMC_CONN_DEVICE_PATH RmcConnDevicePath;\r
+ RIDE_DEVICE_PATH RideDevicePath;\r
+ GB_NIC_DEVICE_PATH GbNicDevicePath;\r
+ PS2_CONN_DEVICE_PATH Ps2ConnDevicePath;\r
+ SERIAL_CONN_DEVICE_PATH SerialConnDevicePath;\r
+ PARALLEL_CONN_DEVICE_PATH ParallelConnDevicePath;\r
+ FLOOPY_CONN_DEVICE_PATH FloppyConnDevicePath;\r
+} EFI_MISC_PORT_DEVICE_PATH;\r
+\r
+#pragma pack()\r
+\r
+///\r
+/// String Token Definition\r
+///\r
+/// Inconsistent with specification here: \r
+/// The macro isn't defined by any specification.\r
+/// Keep it unchanged for backward compatibility.\r
+///\r
+#define EFI_STRING_TOKEN UINT16\r
+\r
+///\r
+/// Each data record that is a member of some subclass starts with a standard \r
+/// header of type EFI_SUBCLASS_TYPE1_HEADER.\r
+/// This header is only a guideline and applicable only to a data \r
+/// subclass that is producing SMBIOS data records. A subclass can start with a \r
+/// different header if needed. \r
+///\r
+typedef struct {\r
+ ///\r
+ /// The version of the specification to which a specific subclass data record adheres. \r
+ ///\r
+ UINT32 Version;\r
+ ///\r
+ /// The size in bytes of this data class header. \r
+ ///\r
+ UINT32 HeaderSize;\r
+ ///\r
+ /// The instance number of the subclass with the same ProducerName. This number is \r
+ /// applicable in cases where multiple subclass instances that were produced by the same \r
+ /// driver exist in the system. This entry is 1 based; 0 means Reserved and -1 means Not \r
+ /// Applicable. All data consumer drivers should be able to handle all the possible values \r
+ /// of Instance, including Not Applicable and Reserved. \r
+ ///\r
+ UINT16 Instance;\r
+ ///\r
+ /// The instance number of the RecordType for the same Instance. This number is \r
+ /// applicable in cases where multiple instances of the RecordType exist for a specific \r
+ /// Instance. This entry is 1 based; 0 means Reserved and -1 means Not Applicable. \r
+ /// All data consumer drivers should be able to handle all the possible values of \r
+ /// SubInstance, including Not Applicable and Reserved. \r
+ ///\r
+ UINT16 SubInstance;\r
+ ///\r
+ /// The record number for the data record being specified. The numbering scheme and \r
+ /// definition is defined in the specific subclass specification. \r
+ ///\r
+ UINT32 RecordType;\r
+} EFI_SUBCLASS_TYPE1_HEADER;\r
+\r
+///\r
+/// This structure is used to link data records in the same subclasses. A data record is \r
+/// defined as a link to another data record in the same subclass using this structure. \r
+///\r
+typedef struct {\r
+ ///\r
+ /// An EFI_GUID that identifies the component that produced this data record. Type \r
+ /// EFI_GUID is defined in InstallProtocolInterface() in the EFI 1.10 Specification. \r
+ ///\r
+ EFI_GUID ProducerName;\r
+ ///\r
+ /// The instance number of the subclass with the same ProducerName. This number is \r
+ /// applicable in cases where multiple subclass instances that were produced by the same \r
+ /// driver exist in the system. This entry is 1 based; 0 means Reserved and -1 means Not \r
+ /// Applicable. All data consumer drivers should be able to handle all the possible values \r
+ /// of Instance, including Not Applicable and Reserved. \r
+ ///\r
+ UINT16 Instance;\r
+ /// The instance number of the RecordType for the same Instance. This number is \r
+ /// applicable in cases where multiple instances of the RecordType exist for a specific \r
+ /// Instance. This entry is 1 based; 0 means Reserved and -1 means Not Applicable. \r
+ /// All data consumer drivers should be able to handle all the possible values of \r
+ /// SubInstance, including Not Applicable and Reserved. \r
+ UINT16 SubInstance;\r
+} EFI_INTER_LINK_DATA;\r
+\r
+//\r
+// EXP data\r
+//\r
+///\r
+/// This macro provides a calculation for base-10 representations. Value and Exponent are each \r
+/// INT16. It is signed to cover negative values and is 16 bits wide (15 bits for data and 1 bit\r
+/// for the sign). \r
+///\r
+typedef struct {\r
+ ///\r
+ /// The INT16 number by which to multiply the base-10 representation. \r
+ ///\r
+ UINT16 Value;\r
+ ///\r
+ /// The INT16 number by which to raise the base-10 calculation. \r
+ ///\r
+ UINT16 Exponent;\r
+} EFI_EXP_BASE2_DATA;\r
+\r
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_MAX_CORE_FREQUENCY_DATA;\r
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_MAX_FSB_FREQUENCY_DATA;\r
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_CORE_FREQUENCY_DATA;\r
+\r
+///\r
+/// This data record refers to the list of frequencies that the processor core supports. The list of \r
+/// supported frequencies is determined by the firmware based on hardware capabilities--for example, \r
+/// it could be a common subset of all processors and the chipset. The unit of measurement of this data \r
+/// record is in Hertz. For asynchronous processors, the content of this data record is zero. \r
+/// The list is terminated by -1 in the Value field of the last element. A Value field of zero means \r
+/// that the processor/driver supports automatic frequency selection. \r
+///\r
+/// Inconsistent with specification here: \r
+/// According to MiscSubclass 0.9 specification, it should be a pointer since it refers to a list of frequencies.\r
+///\r
+typedef EFI_EXP_BASE10_DATA *EFI_PROCESSOR_CORE_FREQUENCY_LIST_DATA;\r
+\r
+///\r
+/// This data record refers to the list of supported frequencies of the processor external bus. The list of \r
+/// supported frequencies is determined by the firmware based on hardware capabilities--for example, \r
+/// it could be a common subset of all processors and the chipset. The unit of measurement of this data \r
+/// record is in Hertz. For asynchronous processors, the content of this data record is NULL. \r
+/// The list is terminated by -1 in the Value field of the last element. A Value field of zero means \r
+/// that the processor/driver supports automatic frequency selection. \r
+///\r
+typedef EFI_EXP_BASE10_DATA *EFI_PROCESSOR_FSB_FREQUENCY_LIST_DATA;\r
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_FSB_FREQUENCY_DATA;\r
+typedef STRING_REF EFI_PROCESSOR_VERSION_DATA;\r
+typedef STRING_REF EFI_PROCESSOR_MANUFACTURER_DATA;\r
+typedef STRING_REF EFI_PROCESSOR_SERIAL_NUMBER_DATA;\r
+typedef STRING_REF EFI_PROCESSOR_ASSET_TAG_DATA;\r
+typedef STRING_REF EFI_PROCESSOR_PART_NUMBER_DATA;\r
+\r
+typedef struct {\r
+ UINT32 ProcessorSteppingId:4;\r
+ UINT32 ProcessorModel: 4;\r
+ UINT32 ProcessorFamily: 4;\r
+ UINT32 ProcessorType: 2;\r
+ UINT32 ProcessorReserved1: 2;\r
+ UINT32 ProcessorXModel: 4;\r
+ UINT32 ProcessorXFamily: 8;\r
+ UINT32 ProcessorReserved2: 4;\r
+} EFI_PROCESSOR_SIGNATURE;\r
+\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// The name of third field in ProcSubClass specification 0.9 is LogicalProcessorCount.\r
+/// Keep it unchanged for backward compatibility.\r
+///\r
+typedef struct {\r
+ UINT32 ProcessorBrandIndex :8;\r
+ UINT32 ProcessorClflush :8;\r
+ UINT32 ProcessorReserved :8;\r
+ UINT32 ProcessorDfltApicId :8;\r
+} EFI_PROCESSOR_MISC_INFO;\r
+\r
+typedef struct {\r
+ UINT32 ProcessorFpu: 1;\r
+ UINT32 ProcessorVme: 1;\r
+ UINT32 ProcessorDe: 1;\r
+ UINT32 ProcessorPse: 1;\r
+ UINT32 ProcessorTsc: 1;\r
+ UINT32 ProcessorMsr: 1;\r
+ UINT32 ProcessorPae: 1;\r
+ UINT32 ProcessorMce: 1;\r
+ UINT32 ProcessorCx8: 1;\r
+ UINT32 ProcessorApic: 1;\r
+ UINT32 ProcessorReserved1: 1;\r
+ UINT32 ProcessorSep: 1;\r
+ UINT32 ProcessorMtrr: 1;\r
+ UINT32 ProcessorPge: 1;\r
+ UINT32 ProcessorMca: 1;\r
+ UINT32 ProcessorCmov: 1;\r
+ UINT32 ProcessorPat: 1;\r
+ UINT32 ProcessorPse36: 1;\r
+ UINT32 ProcessorPsn: 1;\r
+ UINT32 ProcessorClfsh: 1;\r
+ UINT32 ProcessorReserved2: 1;\r
+ UINT32 ProcessorDs: 1;\r
+ UINT32 ProcessorAcpi: 1;\r
+ UINT32 ProcessorMmx: 1;\r
+ UINT32 ProcessorFxsr: 1;\r
+ UINT32 ProcessorSse: 1;\r
+ UINT32 ProcessorSse2: 1;\r
+ UINT32 ProcessorSs: 1;\r
+ UINT32 ProcessorReserved3: 1;\r
+ UINT32 ProcessorTm: 1;\r
+ UINT32 ProcessorReserved4: 2;\r
+} EFI_PROCESSOR_FEATURE_FLAGS;\r
+\r
+///\r
+/// This data record refers to the unique ID that identifies a set of processors. This data record is 16 \r
+/// bytes in length. The data in this structure is processor specific and reserved values can be defined \r
+/// for future use. The consumer of this data should not make any assumption and should use this data \r
+/// with respect to the processor family defined in the Family record number. \r
+///\r
+typedef struct {\r
+ ///\r
+ /// Identifies the processor.\r
+ ///\r
+ EFI_PROCESSOR_SIGNATURE Signature;\r
+ ///\r
+ /// Provides additional processor information. \r
+ ///\r
+ EFI_PROCESSOR_MISC_INFO MiscInfo;\r
+ ///\r
+ /// Reserved for future use. \r
+ ///\r
+ UINT32 Reserved;\r
+ ///\r
+ /// Provides additional processor information. \r
+ ///\r
+ EFI_PROCESSOR_FEATURE_FLAGS FeatureFlags;\r
+} EFI_PROCESSOR_ID_DATA;\r
+\r
+///\r
+/// This data record refers to the general classification of the processor. This data record is 4 bytes in \r
+/// length. \r
+///\r
+typedef enum {\r
+ EfiProcessorOther = 1,\r
+ EfiProcessorUnknown = 2,\r
+ EfiCentralProcessor = 3,\r
+ EfiMathProcessor = 4,\r
+ EfiDspProcessor = 5,\r
+ EfiVideoProcessor = 6\r
+} EFI_PROCESSOR_TYPE_DATA;\r
+\r
+///\r
+/// This data record refers to the family of the processor as defined by the DMTF. \r
+/// This data record is 4 bytes in length. \r
+///\r
+typedef enum {\r
+ EfiProcessorFamilyOther = 0x01, \r
+ EfiProcessorFamilyUnknown = 0x02,\r
+ EfiProcessorFamily8086 = 0x03, \r
+ EfiProcessorFamily80286 = 0x04,\r
+ EfiProcessorFamilyIntel386 = 0x05, \r
+ EfiProcessorFamilyIntel486 = 0x06,\r
+ EfiProcessorFamily8087 = 0x07,\r
+ EfiProcessorFamily80287 = 0x08,\r
+ EfiProcessorFamily80387 = 0x09, \r
+ EfiProcessorFamily80487 = 0x0A,\r
+ EfiProcessorFamilyPentium = 0x0B, \r
+ EfiProcessorFamilyPentiumPro = 0x0C,\r
+ EfiProcessorFamilyPentiumII = 0x0D,\r
+ EfiProcessorFamilyPentiumMMX = 0x0E,\r
+ EfiProcessorFamilyCeleron = 0x0F,\r
+ EfiProcessorFamilyPentiumIIXeon = 0x10,\r
+ EfiProcessorFamilyPentiumIII = 0x11, \r
+ EfiProcessorFamilyM1 = 0x12,\r
+ EfiProcessorFamilyM2 = 0x13,\r
+ EfiProcessorFamilyM1Reserved2 = 0x14,\r
+ EfiProcessorFamilyM1Reserved3 = 0x15,\r
+ EfiProcessorFamilyM1Reserved4 = 0x16,\r
+ EfiProcessorFamilyM1Reserved5 = 0x17,\r
+ EfiProcessorFamilyAmdDuron = 0x18,\r
+ EfiProcessorFamilyK5 = 0x19, \r
+ EfiProcessorFamilyK6 = 0x1A,\r
+ EfiProcessorFamilyK6_2 = 0x1B,\r
+ EfiProcessorFamilyK6_3 = 0x1C,\r
+ EfiProcessorFamilyAmdAthlon = 0x1D,\r
+ EfiProcessorFamilyAmd29000 = 0x1E,\r
+ EfiProcessorFamilyK6_2Plus = 0x1F,\r
+ EfiProcessorFamilyPowerPC = 0x20,\r
+ EfiProcessorFamilyPowerPC601 = 0x21,\r
+ EfiProcessorFamilyPowerPC603 = 0x22,\r
+ EfiProcessorFamilyPowerPC603Plus = 0x23,\r
+ EfiProcessorFamilyPowerPC604 = 0x24,\r
+ EfiProcessorFamilyPowerPC620 = 0x25,\r
+ EfiProcessorFamilyPowerPCx704 = 0x26,\r
+ EfiProcessorFamilyPowerPC750 = 0x27,\r
+ EfiProcessorFamilyAlpha3 = 0x30,\r
+ EfiProcessorFamilyAlpha21064 = 0x31,\r
+ EfiProcessorFamilyAlpha21066 = 0x32,\r
+ EfiProcessorFamilyAlpha21164 = 0x33,\r
+ EfiProcessorFamilyAlpha21164PC = 0x34,\r
+ EfiProcessorFamilyAlpha21164a = 0x35,\r
+ EfiProcessorFamilyAlpha21264 = 0x36,\r
+ EfiProcessorFamilyAlpha21364 = 0x37,\r
+ EfiProcessorFamilyMips = 0x40,\r
+ EfiProcessorFamilyMIPSR4000 = 0x41,\r
+ EfiProcessorFamilyMIPSR4200 = 0x42,\r
+ EfiProcessorFamilyMIPSR4400 = 0x43,\r
+ EfiProcessorFamilyMIPSR4600 = 0x44,\r
+ EfiProcessorFamilyMIPSR10000 = 0x45,\r
+ EfiProcessorFamilySparc = 0x50,\r
+ EfiProcessorFamilySuperSparc = 0x51,\r
+ EfiProcessorFamilymicroSparcII = 0x52,\r
+ EfiProcessorFamilymicroSparcIIep = 0x53,\r
+ EfiProcessorFamilyUltraSparc = 0x54,\r
+ EfiProcessorFamilyUltraSparcII = 0x55,\r
+ EfiProcessorFamilyUltraSparcIIi = 0x56,\r
+ EfiProcessorFamilyUltraSparcIII = 0x57,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field in ProcSubClass specification 0.9 is defined as EfiProcessorFamilyUltraSparcIIi.\r
+ /// Change it to EfiProcessorFamilyUltraSparcIIIi to avoid build break.\r
+ ///\r
+ EfiProcessorFamilyUltraSparcIIIi = 0x58,\r
+ EfiProcessorFamily68040 = 0x60,\r
+ EfiProcessorFamily68xxx = 0x61,\r
+ EfiProcessorFamily68000 = 0x62,\r
+ EfiProcessorFamily68010 = 0x63,\r
+ EfiProcessorFamily68020 = 0x64,\r
+ EfiProcessorFamily68030 = 0x65,\r
+ EfiProcessorFamilyHobbit = 0x70,\r
+ EfiProcessorFamilyCrusoeTM5000 = 0x78,\r
+ EfiProcessorFamilyCrusoeTM3000 = 0x79,\r
+ EfiProcessorFamilyEfficeonTM8000 = 0x7A,\r
+ EfiProcessorFamilyWeitek = 0x80,\r
+ EfiProcessorFamilyItanium = 0x82,\r
+ EfiProcessorFamilyAmdAthlon64 = 0x83,\r
+ EfiProcessorFamilyAmdOpteron = 0x84,\r
+ EfiProcessorFamilyAmdSempron = 0x85,\r
+ EfiProcessorFamilyAmdTurion64Mobile = 0x86,\r
+ EfiProcessorFamilyDualCoreAmdOpteron = 0x87,\r
+ EfiProcessorFamilyAmdAthlon64X2DualCore = 0x88,\r
+ EfiProcessorFamilyAmdTurion64X2Mobile = 0x89,\r
+ EfiProcessorFamilyPARISC = 0x90,\r
+ EfiProcessorFamilyPaRisc8500 = 0x91,\r
+ EfiProcessorFamilyPaRisc8000 = 0x92,\r
+ EfiProcessorFamilyPaRisc7300LC = 0x93,\r
+ EfiProcessorFamilyPaRisc7200 = 0x94,\r
+ EfiProcessorFamilyPaRisc7100LC = 0x95,\r
+ EfiProcessorFamilyPaRisc7100 = 0x96,\r
+ EfiProcessorFamilyV30 = 0xA0,\r
+ EfiProcessorFamilyPentiumIIIXeon = 0xB0,\r
+ EfiProcessorFamilyPentiumIIISpeedStep = 0xB1,\r
+ EfiProcessorFamilyPentium4 = 0xB2,\r
+ EfiProcessorFamilyIntelXeon = 0xB3,\r
+ EfiProcessorFamilyAS400 = 0xB4,\r
+ EfiProcessorFamilyIntelXeonMP = 0xB5,\r
+ EfiProcessorFamilyAMDAthlonXP = 0xB6,\r
+ EfiProcessorFamilyAMDAthlonMP = 0xB7,\r
+ EfiProcessorFamilyIntelItanium2 = 0xB8,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiProcessorFamilyIntelPentiumM = 0xB9,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiProcessorFamilyIntelCeleronD = 0xBA,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiProcessorFamilyIntelPentiumD = 0xBB,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiProcessorFamilyIntelPentiumEx = 0xBC,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiProcessorFamilyIntelCoreSolo = 0xBD, \r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiProcessorFamilyReserved = 0xBE, \r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiProcessorFamilyIntelCore2 = 0xBF,\r
+ EfiProcessorFamilyIBM390 = 0xC8,\r
+ EfiProcessorFamilyG4 = 0xC9,\r
+ EfiProcessorFamilyG5 = 0xCA,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiProcessorFamilyG6 = 0xCB,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiProcessorFamilyzArchitectur = 0xCC,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiProcessorFamilyViaC7M = 0xD2,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiProcessorFamilyViaC7D = 0xD3,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiProcessorFamilyViaC7 = 0xD4,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiProcessorFamilyViaEden = 0xD5,\r
+ EfiProcessorFamilyi860 = 0xFA,\r
+ EfiProcessorFamilyi960 = 0xFB,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiProcessorFamilyIndicatorFamily2 = 0xFE,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiProcessorFamilyReserved1 = 0xFF\r
+} EFI_PROCESSOR_FAMILY_DATA;\r
+\r
+typedef enum {\r
+ EfiProcessorFamilySh3 = 0x104,\r
+ EfiProcessorFamilySh4 = 0x105,\r
+ EfiProcessorFamilyArm = 0x118,\r
+ EfiProcessorFamilyStrongArm = 0x119,\r
+ EfiProcessorFamily6x86 = 0x12C,\r
+ EfiProcessorFamilyMediaGx = 0x12D,\r
+ EfiProcessorFamilyMii = 0x12E,\r
+ EfiProcessorFamilyWinChip = 0x140,\r
+ EfiProcessorFamilyDsp = 0x15E,\r
+ EfiProcessorFamilyVideo = 0x1F4\r
+} EFI_PROCESSOR_FAMILY2_DATA;\r
+\r
+///\r
+/// This data record refers to the core voltage of the processor being defined. The unit of measurement \r
+/// of this data record is in volts. \r
+///\r
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_VOLTAGE_DATA;\r
+\r
+///\r
+/// This data record refers to the base address of the APIC of the processor being defined. This data \r
+/// record is a physical address location. \r
+///\r
+typedef EFI_PHYSICAL_ADDRESS EFI_PROCESSOR_APIC_BASE_ADDRESS_DATA;\r
+\r
+///\r
+/// This data record refers to the ID of the APIC of the processor being defined. This data record is a \r
+/// 4-byte entry. \r
+///\r
+typedef UINT32 EFI_PROCESSOR_APIC_ID_DATA;\r
+\r
+///\r
+/// This data record refers to the version number of the APIC of the processor being defined. This data \r
+/// record is a 4-byte entry. \r
+///\r
+typedef UINT32 EFI_PROCESSOR_APIC_VERSION_NUMBER_DATA;\r
+\r
+typedef enum {\r
+ EfiProcessorIa32Microcode = 1,\r
+ EfiProcessorIpfPalAMicrocode = 2,\r
+ EfiProcessorIpfPalBMicrocode = 3\r
+} EFI_PROCESSOR_MICROCODE_TYPE;\r
+\r
+///\r
+/// This data record refers to the revision of the processor microcode that is loaded in the processor. \r
+/// This data record is a 4-byte entry. \r
+///\r
+typedef struct {\r
+ ///\r
+ /// Identifies what type of microcode the data is. \r
+ /// \r
+ EFI_PROCESSOR_MICROCODE_TYPE ProcessorMicrocodeType;\r
+ ///\r
+ /// Indicates the revision number of this microcode. \r
+ ///\r
+ UINT32 ProcessorMicrocodeRevisionNumber;\r
+} EFI_PROCESSOR_MICROCODE_REVISION_DATA;\r
+\r
+///\r
+/// This data record refers to the status of the processor.\r
+///\r
+typedef struct {\r
+ UINT32 CpuStatus :3; ///< Indicates the status of the processor. \r
+ UINT32 Reserved1 :3; ///< Reserved for future use. Should be set to zero. \r
+ UINT32 SocketPopulated :1; ///< Indicates if the processor is socketed or not. \r
+ UINT32 Reserved2 :1; ///< Reserved for future use. Should be set to zero. \r
+ UINT32 ApicEnable :1; ///< Indicates if the APIC is enabled or not. \r
+ UINT32 BootApplicationProcessor :1; ///< Indicates if this processor is the boot processor. \r
+ UINT32 Reserved3 :22;///< Reserved for future use. Should be set to zero. \r
+} EFI_PROCESSOR_STATUS_DATA;\r
+\r
+typedef enum {\r
+ EfiCpuStatusUnknown = 0,\r
+ EfiCpuStatusEnabled = 1,\r
+ EfiCpuStatusDisabledByUser = 2,\r
+ EfiCpuStatusDisabledbyBios = 3,\r
+ EfiCpuStatusIdle = 4,\r
+ EfiCpuStatusOther = 7\r
+} EFI_CPU_STATUS;\r
+\r
+typedef enum {\r
+ EfiProcessorSocketOther = 1,\r
+ EfiProcessorSocketUnknown = 2,\r
+ EfiProcessorSocketDaughterBoard = 3,\r
+ EfiProcessorSocketZIF = 4,\r
+ EfiProcessorSocketReplacePiggyBack = 5,\r
+ EfiProcessorSocketNone = 6,\r
+ EfiProcessorSocketLIF = 7,\r
+ EfiProcessorSocketSlot1 = 8,\r
+ EfiProcessorSocketSlot2 = 9,\r
+ EfiProcessorSocket370Pin = 0xA,\r
+ EfiProcessorSocketSlotA = 0xB,\r
+ EfiProcessorSocketSlotM = 0xC,\r
+ EfiProcessorSocket423 = 0xD,\r
+ EfiProcessorSocketA462 = 0xE,\r
+ EfiProcessorSocket478 = 0xF,\r
+ EfiProcessorSocket754 = 0x10,\r
+ EfiProcessorSocket940 = 0x11,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiProcessorSocket939 = 0x12,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiProcessorSocketmPGA604 = 0x13,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiProcessorSocketLGA771 = 0x14,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiProcessorSocketLGA775 = 0x15\r
+\r
+} EFI_PROCESSOR_SOCKET_TYPE_DATA;\r
+\r
+typedef STRING_REF EFI_PROCESSOR_SOCKET_NAME_DATA;\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In ProcSubclass specification 0.9, the naming is EFI_PROCESSOR_CACHE_ASSOCIATION_DATA.\r
+/// Keep it unchanged for backward compatibilty.\r
+///\r
+typedef EFI_INTER_LINK_DATA EFI_CACHE_ASSOCIATION_DATA;\r
+\r
+///\r
+/// This data record refers to the health status of the processor. \r
+///\r
+/// Inconsistent with specification here: \r
+/// In ProcSubclass specification 0.9, the naming is EFI_PROCESSOR_HEALTH_STATUS_DATA.\r
+/// Keep it unchanged for backward compatibilty.\r
+///\r
+typedef enum {\r
+ EfiProcessorHealthy = 1,\r
+ EfiProcessorPerfRestricted = 2,\r
+ EfiProcessorFuncRestricted = 3 \r
+} EFI_PROCESSOR_HEALTH_STATUS;\r
+\r
+///\r
+/// This data record refers to the package number of this processor. Multiple logical processors can \r
+/// exist in a system and each logical processor can be correlated to the physical processor using this \r
+/// record type. \r
+///\r
+typedef UINTN EFI_PROCESSOR_PACKAGE_NUMBER_DATA;\r
+\r
+typedef UINT8 EFI_PROCESSOR_CORE_COUNT_DATA;\r
+typedef UINT8 EFI_PROCESSOR_ENABLED_CORE_COUNT_DATA;\r
+typedef UINT8 EFI_PROCESSOR_THREAD_COUNT_DATA;\r
+\r
+typedef struct {\r
+ UINT16 Reserved :1;\r
+ UINT16 Unknown :1;\r
+ UINT16 Capable64Bit :1;\r
+ UINT16 Reserved2 :13;\r
+} EFI_PROCESSOR_CHARACTERISTICS_DATA;\r
+\r
+///\r
+/// Inconsistent with specification here:\r
+/// In ProcSubclass specification 0.9, the enumeration type data structure is NOT defined.\r
+/// The equivalent in specification is \r
+/// #define EFI_PROCESSOR_FREQUENCY_RECORD_NUMBER 0x00000001\r
+/// #define EFI_PROCESSOR_BUS_FREQUENCY_RECORD_NUMBER 0x00000002\r
+/// #define EFI_PROCESSOR_VERSION_RECORD_NUMBER 0x00000003\r
+/// #define EFI_PROCESSOR_MANUFACTURER_RECORD_NUMBER 0x00000004\r
+/// #define EFI_PROCESSOR_SERIAL_NUMBER_RECORD_NUMBER 0x00000005\r
+/// #define EFI_PROCESSOR_ID_RECORD_NUMBER 0x00000006\r
+/// #define EFI_PROCESSOR_TYPE_RECORD_NUMBER 0x00000007\r
+/// #define EFI_PROCESSOR_FAMILY_RECORD_NUMBER 0x00000008\r
+/// #define EFI_PROCESSOR_VOLTAGE_RECORD_NUMBER 0x00000009\r
+/// #define EFI_PROCESSOR_APIC_BASE_ADDRESS_RECORD_NUMBER 0x0000000A\r
+/// #define EFI_PROCESSOR_APIC_ID_RECORD_NUMBER 0x0000000B\r
+/// #define EFI_PROCESSOR_APIC_VER_NUMBER_RECORD_NUMBER 0x0000000C\r
+/// #define EFI_PROCESSOR_MICROCODE_REVISION_RECORD_NUMBER 0x0000000D\r
+/// #define EFI_PROCESSOR_STATUS_RECORD_NUMBER 0x0000000E\r
+/// #define EFI_PROCESSOR_SOCKET_TYPE_RECORD_NUMBER 0x0000000F\r
+/// #define EFI_PROCESSOR_SOCKET_NAME_RECORD_NUMBER 0x00000010\r
+/// #define EFI_PROCESSOR_CACHE_ASSOCIATION_RECORD_NUMBER 0x00000011\r
+/// #define EFI_PROCESSOR_MAX_FREQUENCY_RECORD_NUMBER 0x00000012\r
+/// #define EFI_PROCESSOR_ASSET_TAG_RECORD_NUMBER 0x00000013\r
+/// #define EFI_PROCESSOR_MAX_FSB_FREQUENCY_RECORD_NUMBER 0x00000014\r
+/// #define EFI_PROCESSOR_PACKAGE_NUMBER_RECORD_NUMBER 0x00000015\r
+/// #define EFI_PROCESSOR_FREQUENCY_LIST_RECORD_NUMBER 0x00000016\r
+/// #define EFI_PROCESSOR_FSB_FREQUENCY_LIST_RECORD_NUMBER 0x00000017\r
+/// #define EFI_PROCESSOR_HEALTH_STATUS_RECORD_NUMBER 0x00000018\r
+///\r
+/// Keep the definition unchanged for backward compatibility.\r
+typedef enum {\r
+ ProcessorCoreFrequencyRecordType = 1,\r
+ ProcessorFsbFrequencyRecordType = 2,\r
+ ProcessorVersionRecordType = 3,\r
+ ProcessorManufacturerRecordType = 4,\r
+ ProcessorSerialNumberRecordType = 5,\r
+ ProcessorIdRecordType = 6,\r
+ ProcessorTypeRecordType = 7,\r
+ ProcessorFamilyRecordType = 8,\r
+ ProcessorVoltageRecordType = 9,\r
+ ProcessorApicBaseAddressRecordType = 10,\r
+ ProcessorApicIdRecordType = 11,\r
+ ProcessorApicVersionNumberRecordType = 12,\r
+ CpuUcodeRevisionDataRecordType = 13,\r
+ ProcessorStatusRecordType = 14,\r
+ ProcessorSocketTypeRecordType = 15,\r
+ ProcessorSocketNameRecordType = 16,\r
+ CacheAssociationRecordType = 17,\r
+ ProcessorMaxCoreFrequencyRecordType = 18,\r
+ ProcessorAssetTagRecordType = 19,\r
+ ProcessorMaxFsbFrequencyRecordType = 20,\r
+ ProcessorPackageNumberRecordType = 21,\r
+ ProcessorCoreFrequencyListRecordType = 22,\r
+ ProcessorFsbFrequencyListRecordType = 23,\r
+ ProcessorHealthStatusRecordType = 24,\r
+ ProcessorCoreCountRecordType = 25,\r
+ ProcessorEnabledCoreCountRecordType = 26,\r
+ ProcessorThreadCountRecordType = 27,\r
+ ProcessorCharacteristicsRecordType = 28,\r
+ ProcessorFamily2RecordType = 29,\r
+ ProcessorPartNumberRecordType = 30,\r
+} EFI_CPU_VARIABLE_RECORD_TYPE;\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In ProcSubclass specification 0.9, the union type data structure is NOT defined.\r
+/// It's implementation-specific to simplify the code logic.\r
+///\r
+typedef union {\r
+ EFI_PROCESSOR_CORE_FREQUENCY_LIST_DATA ProcessorCoreFrequencyList;\r
+ EFI_PROCESSOR_FSB_FREQUENCY_LIST_DATA ProcessorFsbFrequencyList;\r
+ EFI_PROCESSOR_SERIAL_NUMBER_DATA ProcessorSerialNumber;\r
+ EFI_PROCESSOR_CORE_FREQUENCY_DATA ProcessorCoreFrequency;\r
+ EFI_PROCESSOR_FSB_FREQUENCY_DATA ProcessorFsbFrequency;\r
+ EFI_PROCESSOR_MAX_CORE_FREQUENCY_DATA ProcessorMaxCoreFrequency;\r
+ EFI_PROCESSOR_MAX_FSB_FREQUENCY_DATA ProcessorMaxFsbFrequency;\r
+ EFI_PROCESSOR_VERSION_DATA ProcessorVersion;\r
+ EFI_PROCESSOR_MANUFACTURER_DATA ProcessorManufacturer;\r
+ EFI_PROCESSOR_ID_DATA ProcessorId;\r
+ EFI_PROCESSOR_TYPE_DATA ProcessorType;\r
+ EFI_PROCESSOR_FAMILY_DATA ProcessorFamily;\r
+ EFI_PROCESSOR_VOLTAGE_DATA ProcessorVoltage;\r
+ EFI_PROCESSOR_APIC_BASE_ADDRESS_DATA ProcessorApicBase;\r
+ EFI_PROCESSOR_APIC_ID_DATA ProcessorApicId;\r
+ EFI_PROCESSOR_APIC_VERSION_NUMBER_DATA ProcessorApicVersionNumber;\r
+ EFI_PROCESSOR_MICROCODE_REVISION_DATA CpuUcodeRevisionData;\r
+ EFI_PROCESSOR_STATUS_DATA ProcessorStatus;\r
+ EFI_PROCESSOR_SOCKET_TYPE_DATA ProcessorSocketType;\r
+ EFI_PROCESSOR_SOCKET_NAME_DATA ProcessorSocketName;\r
+ EFI_PROCESSOR_ASSET_TAG_DATA ProcessorAssetTag;\r
+ EFI_PROCESSOR_PART_NUMBER_DATA ProcessorPartNumber;\r
+ EFI_PROCESSOR_HEALTH_STATUS ProcessorHealthStatus;\r
+ EFI_PROCESSOR_PACKAGE_NUMBER_DATA ProcessorPackageNumber;\r
+ EFI_PROCESSOR_CORE_COUNT_DATA ProcessorCoreCount;\r
+ EFI_PROCESSOR_ENABLED_CORE_COUNT_DATA ProcessorEnabledCoreCount;\r
+ EFI_PROCESSOR_THREAD_COUNT_DATA ProcessorThreadCount;\r
+ EFI_PROCESSOR_CHARACTERISTICS_DATA ProcessorCharacteristics;\r
+ EFI_PROCESSOR_FAMILY2_DATA ProcessorFamily2;\r
+} EFI_CPU_VARIABLE_RECORD;\r
+\r
+typedef struct {\r
+ EFI_SUBCLASS_TYPE1_HEADER DataRecordHeader;\r
+ EFI_CPU_VARIABLE_RECORD VariableRecord;\r
+} EFI_CPU_DATA_RECORD;\r
+\r
+#define EFI_CACHE_SUBCLASS_VERSION 0x00010000\r
+\r
+typedef EFI_EXP_BASE2_DATA EFI_CACHE_SIZE_DATA;\r
+///\r
+/// Inconsistent with specification here: \r
+/// In CacheSubclass specification 0.9, the naming is EFI_CACHE_MAXIMUM_SIZE_DATA.\r
+/// Keep it unchanged for backward compatibilty.\r
+///\r
+typedef EFI_EXP_BASE2_DATA EFI_MAXIMUM_CACHE_SIZE_DATA;\r
+typedef EFI_EXP_BASE10_DATA EFI_CACHE_SPEED_DATA;\r
+typedef STRING_REF EFI_CACHE_SOCKET_DATA;\r
+\r
+typedef struct {\r
+ UINT32 Other :1;\r
+ UINT32 Unknown :1;\r
+ UINT32 NonBurst :1;\r
+ UINT32 Burst :1;\r
+ UINT32 PipelineBurst :1;\r
+ UINT32 Asynchronous :1;\r
+ UINT32 Synchronous :1;\r
+ UINT32 Reserved :25;\r
+} EFI_CACHE_SRAM_TYPE_DATA;\r
+\r
+typedef EFI_CACHE_SRAM_TYPE_DATA EFI_CACHE_SRAM_INSTALL_DATA;\r
+\r
+typedef enum {\r
+ EfiCacheErrorOther = 1,\r
+ EfiCacheErrorUnknown = 2,\r
+ EfiCacheErrorNone = 3,\r
+ EfiCacheErrorParity = 4,\r
+ EfiCacheErrorSingleBit = 5,\r
+ EfiCacheErrorMultiBit = 6\r
+} EFI_CACHE_ERROR_TYPE_DATA;\r
+\r
+typedef enum {\r
+ EfiCacheTypeOther = 1,\r
+ EfiCacheTypeUnknown = 2,\r
+ EfiCacheTypeInstruction = 3,\r
+ EfiCacheTypeData = 4,\r
+ EfiCacheTypeUnified = 5\r
+} EFI_CACHE_TYPE_DATA;\r
+\r
+typedef enum {\r
+ EfiCacheAssociativityOther = 1,\r
+ EfiCacheAssociativityUnknown = 2,\r
+ EfiCacheAssociativityDirectMapped = 3,\r
+ EfiCacheAssociativity2Way = 4,\r
+ EfiCacheAssociativity4Way = 5,\r
+ EfiCacheAssociativityFully = 6,\r
+ EfiCacheAssociativity8Way = 7,\r
+ EfiCacheAssociativity16Way = 8\r
+} EFI_CACHE_ASSOCIATIVITY_DATA;\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In CacheSubclass 0.9 specification. It defines the field type as UINT16.\r
+/// In fact, it should be UINT32 type because it refers to a 32bit width data.\r
+///\r
+typedef struct {\r
+ UINT32 Level :3;\r
+ UINT32 Socketed :1;\r
+ UINT32 Reserved2 :1;\r
+ UINT32 Location :2;\r
+ UINT32 Enable :1;\r
+ UINT32 OperationalMode :2;\r
+ UINT32 Reserved1 :22;\r
+} EFI_CACHE_CONFIGURATION_DATA;\r
+\r
+#define EFI_CACHE_L1 1\r
+#define EFI_CACHE_L2 2\r
+#define EFI_CACHE_L3 3\r
+#define EFI_CACHE_L4 4\r
+#define EFI_CACHE_LMAX EFI_CACHE_L4\r
+\r
+#define EFI_CACHE_SOCKETED 1\r
+#define EFI_CACHE_NOT_SOCKETED 0\r
+\r
+typedef enum {\r
+ EfiCacheInternal = 0,\r
+ EfiCacheExternal = 1,\r
+ EfiCacheReserved = 2,\r
+ EfiCacheUnknown = 3\r
+} EFI_CACHE_LOCATION;\r
+\r
+#define EFI_CACHE_ENABLED 1\r
+#define EFI_CACHE_DISABLED 0\r
+\r
+typedef enum {\r
+ EfiCacheWriteThrough = 0,\r
+ EfiCacheWriteBack = 1,\r
+ EfiCacheDynamicMode = 2,\r
+ EfiCacheUnknownMode = 3\r
+} EFI_CACHE_OPERATIONAL_MODE;\r
+\r
+\r
+///\r
+/// Inconsistent with specification here:\r
+/// In CacheSubclass specification 0.9, the enumeration type data structure is NOT defined.\r
+/// The equivalent in specification is \r
+/// #define EFI_CACHE_SIZE_RECORD_NUMBER 0x00000001\r
+/// #define EFI_CACHE_MAXIMUM_SIZE_RECORD_NUMBER 0x00000002\r
+/// #define EFI_CACHE_SPEED_RECORD_NUMBER 0x00000003\r
+/// #define EFI_CACHE_SOCKET_RECORD_NUMBER 0x00000004\r
+/// #define EFI_CACHE_SRAM_SUPPORT_RECORD_NUMBER 0x00000005 \r
+/// #define EFI_CACHE_SRAM_INSTALL_RECORD_NUMBER 0x00000006 \r
+/// #define EFI_CACHE_ERROR_SUPPORT_RECORD_NUMBER 0x00000007\r
+/// #define EFI_CACHE_TYPE_RECORD_NUMBER 0x00000008\r
+/// #define EFI_CACHE_ASSOCIATIVITY_RECORD_NUMBER 0x00000009\r
+/// #define EFI_CACHE_CONFIGURATION_RECORD_NUMBER 0x0000000A\r
+/// Keep the definition unchanged for backward compatibility.\r
+///\r
+typedef enum {\r
+ CacheSizeRecordType = 1,\r
+ MaximumSizeCacheRecordType = 2,\r
+ CacheSpeedRecordType = 3,\r
+ CacheSocketRecordType = 4,\r
+ CacheSramTypeRecordType = 5,\r
+ CacheInstalledSramTypeRecordType = 6,\r
+ CacheErrorTypeRecordType = 7,\r
+ CacheTypeRecordType = 8,\r
+ CacheAssociativityRecordType = 9,\r
+ CacheConfigRecordType = 10\r
+} EFI_CACHE_VARIABLE_RECORD_TYPE;\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In CacheSubclass specification 0.9, the union type data structure is NOT defined.\r
+/// It's implementation-specific to simplify the code logic.\r
+///\r
+typedef union {\r
+ EFI_CACHE_SIZE_DATA CacheSize;\r
+ EFI_MAXIMUM_CACHE_SIZE_DATA MaximumCacheSize;\r
+ EFI_CACHE_SPEED_DATA CacheSpeed;\r
+ EFI_CACHE_SOCKET_DATA CacheSocket;\r
+ EFI_CACHE_SRAM_TYPE_DATA CacheSramType;\r
+ EFI_CACHE_SRAM_TYPE_DATA CacheInstalledSramType;\r
+ EFI_CACHE_ERROR_TYPE_DATA CacheErrorType;\r
+ EFI_CACHE_TYPE_DATA CacheType;\r
+ EFI_CACHE_ASSOCIATIVITY_DATA CacheAssociativity;\r
+ EFI_CACHE_CONFIGURATION_DATA CacheConfig;\r
+ EFI_CACHE_ASSOCIATION_DATA CacheAssociation;\r
+} EFI_CACHE_VARIABLE_RECORD;\r
+\r
+typedef struct {\r
+ EFI_SUBCLASS_TYPE1_HEADER DataRecordHeader;\r
+ EFI_CACHE_VARIABLE_RECORD VariableRecord;\r
+} EFI_CACHE_DATA_RECORD;\r
+\r
+#define EFI_MEMORY_SUBCLASS_VERSION 0x0100\r
+#define EFI_MEMORY_SIZE_RECORD_NUMBER 0x00000001\r
+\r
+typedef enum _EFI_MEMORY_REGION_TYPE {\r
+ EfiMemoryRegionMemory = 0x01,\r
+ EfiMemoryRegionReserved = 0x02,\r
+ EfiMemoryRegionAcpi = 0x03,\r
+ EfiMemoryRegionNvs = 0x04\r
+} EFI_MEMORY_REGION_TYPE;\r
+\r
+///\r
+/// This data record refers to the size of a memory region. The regions that are \r
+/// described can refer to physical memory, memory-mapped I/O, or reserved BIOS memory regions. \r
+/// The unit of measurement of this data record is in bytes. \r
+///\r
+typedef struct {\r
+ ///\r
+ /// A zero-based value that indicates which processor(s) can access the memory region. \r
+ /// A value of 0xFFFF indicates the region is accessible by all processors. \r
+ ///\r
+ UINT32 ProcessorNumber;\r
+ ///\r
+ /// A zero-based value that indicates the starting bus that can access the memory region. \r
+ ///\r
+ UINT16 StartBusNumber;\r
+ ///\r
+ /// A zero-based value that indicates the ending bus that can access the memory region. \r
+ /// A value of 0xFF for a PCI system indicates the region is accessible by all buses and \r
+ /// is global in scope. An example of the EndBusNumber not being 0xFF is a system \r
+ /// with two or more peer-to-host PCI bridges. \r
+ ///\r
+ UINT16 EndBusNumber;\r
+ ///\r
+ /// The type of memory region from the operating system's point of view. \r
+ /// MemoryRegionType values are equivalent to the legacy INT 15 AX = E820 BIOS \r
+ /// command values. \r
+ ///\r
+ EFI_MEMORY_REGION_TYPE MemoryRegionType;\r
+ ///\r
+ /// The size of the memory region in bytes. \r
+ ///\r
+ EFI_EXP_BASE2_DATA MemorySize;\r
+ ///\r
+ /// The starting physical address of the memory region. \r
+ ///\r
+ EFI_PHYSICAL_ADDRESS MemoryStartAddress;\r
+} EFI_MEMORY_SIZE_DATA;\r
+\r
+\r
+#define EFI_MEMORY_ARRAY_LOCATION_RECORD_NUMBER 0x00000002\r
+\r
+typedef enum _EFI_MEMORY_ARRAY_LOCATION {\r
+ EfiMemoryArrayLocationOther = 0x01,\r
+ EfiMemoryArrayLocationUnknown = 0x02,\r
+ EfiMemoryArrayLocationSystemBoard = 0x03,\r
+ EfiMemoryArrayLocationIsaAddonCard = 0x04,\r
+ EfiMemoryArrayLocationEisaAddonCard = 0x05,\r
+ EfiMemoryArrayLocationPciAddonCard = 0x06,\r
+ EfiMemoryArrayLocationMcaAddonCard = 0x07,\r
+ EfiMemoryArrayLocationPcmciaAddonCard = 0x08,\r
+ EfiMemoryArrayLocationProprietaryAddonCard = 0x09,\r
+ EfiMemoryArrayLocationNuBus = 0x0A,\r
+ EfiMemoryArrayLocationPc98C20AddonCard = 0xA0,\r
+ EfiMemoryArrayLocationPc98C24AddonCard = 0xA1,\r
+ EfiMemoryArrayLocationPc98EAddonCard = 0xA2,\r
+ EfiMemoryArrayLocationPc98LocalBusAddonCard = 0xA3\r
+} EFI_MEMORY_ARRAY_LOCATION;\r
+\r
+typedef enum _EFI_MEMORY_ARRAY_USE {\r
+ EfiMemoryArrayUseOther = 0x01,\r
+ EfiMemoryArrayUseUnknown = 0x02,\r
+ EfiMemoryArrayUseSystemMemory = 0x03,\r
+ EfiMemoryArrayUseVideoMemory = 0x04,\r
+ EfiMemoryArrayUseFlashMemory = 0x05,\r
+ EfiMemoryArrayUseNonVolatileRam = 0x06,\r
+ EfiMemoryArrayUseCacheMemory = 0x07\r
+} EFI_MEMORY_ARRAY_USE;\r
+\r
+typedef enum _EFI_MEMORY_ERROR_CORRECTION {\r
+ EfiMemoryErrorCorrectionOther = 0x01,\r
+ EfiMemoryErrorCorrectionUnknown = 0x02,\r
+ EfiMemoryErrorCorrectionNone = 0x03,\r
+ EfiMemoryErrorCorrectionParity = 0x04,\r
+ EfiMemoryErrorCorrectionSingleBitEcc = 0x05,\r
+ EfiMemoryErrorCorrectionMultiBitEcc = 0x06,\r
+ EfiMemoryErrorCorrectionCrc = 0x07\r
+} EFI_MEMORY_ERROR_CORRECTION;\r
+\r
+///\r
+/// This data record refers to the physical memory array. This data record is a structure. \r
+/// The type definition structure for EFI_MEMORY_ARRAY_LOCATION_DATA is in SMBIOS 2.3.4: \r
+/// - Table 3.3.17.1, Type 16, Offset 0x4 \r
+/// - Table 3.3.17.2, Type 16, Offset 0x5 \r
+/// - Table 3.3.17.3, Type 16, with the following offsets: \r
+/// -- Offset 0x6 \r
+/// -- Offset 0x7 \r
+/// -- Offset 0xB \r
+/// -- Offset 0xD \r
+/// \r
+typedef struct {\r
+ ///\r
+ /// The physical location of the memory array. \r
+ ///\r
+ EFI_MEMORY_ARRAY_LOCATION MemoryArrayLocation;\r
+ ///\r
+ /// The memory array usage.\r
+ ///\r
+ EFI_MEMORY_ARRAY_USE MemoryArrayUse;\r
+ ///\r
+ /// The primary error correction or detection supported by this memory array.\r
+ ///\r
+ EFI_MEMORY_ERROR_CORRECTION MemoryErrorCorrection;\r
+ ///\r
+ /// The maximum memory capacity size in kilobytes. If capacity is unknown, then \r
+ /// values of MaximumMemoryCapacity.Value = 0x00 and \r
+ /// MaximumMemoryCapacity.Exponent = 0x8000 are used.\r
+ ///\r
+ EFI_EXP_BASE2_DATA MaximumMemoryCapacity;\r
+ ///\r
+ /// The number of memory slots or sockets that are available for memory devices \r
+ /// in this array. \r
+ ///\r
+ UINT16 NumberMemoryDevices;\r
+} EFI_MEMORY_ARRAY_LOCATION_DATA;\r
+\r
+\r
+#define EFI_MEMORY_ARRAY_LINK_RECORD_NUMBER 0x00000003\r
+\r
+typedef enum _EFI_MEMORY_FORM_FACTOR {\r
+ EfiMemoryFormFactorOther = 0x01,\r
+ EfiMemoryFormFactorUnknown = 0x02,\r
+ EfiMemoryFormFactorSimm = 0x03,\r
+ EfiMemoryFormFactorSip = 0x04,\r
+ EfiMemoryFormFactorChip = 0x05,\r
+ EfiMemoryFormFactorDip = 0x06,\r
+ EfiMemoryFormFactorZip = 0x07,\r
+ EfiMemoryFormFactorProprietaryCard = 0x08,\r
+ EfiMemoryFormFactorDimm = 0x09,\r
+ EfiMemoryFormFactorTsop = 0x0A,\r
+ EfiMemoryFormFactorRowOfChips = 0x0B,\r
+ EfiMemoryFormFactorRimm = 0x0C,\r
+ EfiMemoryFormFactorSodimm = 0x0D,\r
+ EfiMemoryFormFactorSrimm = 0x0E,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in MemSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiMemoryFormFactorFbDimm = 0x0F\r
+} EFI_MEMORY_FORM_FACTOR;\r
+\r
+typedef enum _EFI_MEMORY_ARRAY_TYPE {\r
+ EfiMemoryTypeOther = 0x01,\r
+ EfiMemoryTypeUnknown = 0x02,\r
+ EfiMemoryTypeDram = 0x03,\r
+ EfiMemoryTypeEdram = 0x04,\r
+ EfiMemoryTypeVram = 0x05,\r
+ EfiMemoryTypeSram = 0x06,\r
+ EfiMemoryTypeRam = 0x07,\r
+ EfiMemoryTypeRom = 0x08,\r
+ EfiMemoryTypeFlash = 0x09,\r
+ EfiMemoryTypeEeprom = 0x0A,\r
+ EfiMemoryTypeFeprom = 0x0B,\r
+ EfiMemoryTypeEprom = 0x0C,\r
+ EfiMemoryTypeCdram = 0x0D,\r
+ EfiMemoryType3Dram = 0x0E,\r
+ EfiMemoryTypeSdram = 0x0F,\r
+ EfiMemoryTypeSgram = 0x10,\r
+ EfiMemoryTypeRdram = 0x11,\r
+ EfiMemoryTypeDdr = 0x12,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in MemSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiMemoryTypeDdr2 = 0x13,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in MemSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiMemoryTypeDdr2FbDimm = 0x14\r
+} EFI_MEMORY_ARRAY_TYPE;\r
+\r
+typedef struct {\r
+ UINT32 Reserved :1;\r
+ UINT32 Other :1;\r
+ UINT32 Unknown :1;\r
+ UINT32 FastPaged :1;\r
+ UINT32 StaticColumn :1;\r
+ UINT32 PseudoStatic :1;\r
+ UINT32 Rambus :1;\r
+ UINT32 Synchronous :1;\r
+ UINT32 Cmos :1;\r
+ UINT32 Edo :1;\r
+ UINT32 WindowDram :1;\r
+ UINT32 CacheDram :1;\r
+ UINT32 Nonvolatile :1;\r
+ UINT32 Reserved1 :19;\r
+} EFI_MEMORY_TYPE_DETAIL;\r
+\r
+typedef enum {\r
+ EfiMemoryStateEnabled = 0,\r
+ EfiMemoryStateUnknown = 1,\r
+ EfiMemoryStateUnsupported = 2,\r
+ EfiMemoryStateError = 3,\r
+ EfiMemoryStateAbsent = 4,\r
+ EfiMemoryStateDisabled = 5,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// This field is NOT defined in MemSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
+ ///\r
+ EfiMemoryStatePartial = 6\r
+} EFI_MEMORY_STATE;\r
+\r
+///\r
+/// This data record describes a memory device. This data record is a structure. \r
+/// The type definition structure for EFI_MEMORY_ARRAY_LINK_DATA is in SMBIOS 2.3.4.\r
+///\r
+typedef struct {\r
+ ///\r
+ /// A string that identifies the physically labeled socket or board position where the \r
+ /// memory device is located.\r
+ ///\r
+ STRING_REF MemoryDeviceLocator;\r
+ ///\r
+ /// A string denoting the physically labeled bank where the memory device is located. \r
+ ///\r
+ STRING_REF MemoryBankLocator;\r
+ ///\r
+ /// A string denoting the memory manufacturer. \r
+ /// \r
+ STRING_REF MemoryManufacturer;\r
+ ///\r
+ /// A string denoting the serial number of the memory device. \r
+ ///\r
+ STRING_REF MemorySerialNumber;\r
+ ///\r
+ /// The asset tag of the memory device. \r
+ ///\r
+ STRING_REF MemoryAssetTag;\r
+ ///\r
+ /// A string denoting the part number of the memory device. \r
+ ///\r
+ STRING_REF MemoryPartNumber;\r
+ ///\r
+ /// A link to a memory array structure set. \r
+ ///\r
+ EFI_INTER_LINK_DATA MemoryArrayLink;\r
+ ///\r
+ /// A link to a memory array structure set.\r
+ ///\r
+ EFI_INTER_LINK_DATA MemorySubArrayLink;\r
+ ///\r
+ /// The total width in bits of this memory device. If there are no error correcting bits, \r
+ /// then the total width equals the data width. If the width is unknown, then set the field \r
+ /// to 0xFFFF. \r
+ ///\r
+ UINT16 MemoryTotalWidth;\r
+ ///\r
+ /// The data width in bits of the memory device. A data width of 0x00 and a total width \r
+ /// of 0x08 indicate that the device is used solely for error correction. \r
+ ///\r
+ UINT16 MemoryDataWidth;\r
+ ///\r
+ /// The size in bytes of the memory device. A value of 0x00 denotes that no device is \r
+ /// installed, while a value of all Fs denotes that the size is not known.\r
+ ///\r
+ EFI_EXP_BASE2_DATA MemoryDeviceSize;\r
+ ///\r
+ /// The form factor of the memory device. \r
+ ///\r
+ EFI_MEMORY_FORM_FACTOR MemoryFormFactor;\r
+ ///\r
+ /// A memory device set that must be populated with all devices of the same type and \r
+ /// size. A value of 0x00 indicates that the device is not part of any set. A value of 0xFF \r
+ /// indicates that the attribute is unknown. Any other value denotes the set number. \r
+ ///\r
+ UINT8 MemoryDeviceSet;\r
+ ///\r
+ /// The memory type in the socket. \r
+ ///\r
+ EFI_MEMORY_ARRAY_TYPE MemoryType;\r
+ ///\r
+ /// The memory type details. \r
+ ///\r
+ EFI_MEMORY_TYPE_DETAIL MemoryTypeDetail;\r
+ ///\r
+ /// The memory speed in megahertz (MHz). A value of 0x00 denotes that \r
+ /// the speed is unknown.\r
+ /// Inconsistent with specification here: \r
+ /// In MemSubclass specification 0.9, the naming is MemoryTypeSpeed.\r
+ /// Keep it unchanged for backward compatibilty.\r
+ ///\r
+ EFI_EXP_BASE10_DATA MemorySpeed;\r
+ ///\r
+ /// The memory state. \r
+ ///\r
+ EFI_MEMORY_STATE MemoryState;\r
+} EFI_MEMORY_ARRAY_LINK_DATA;\r
+\r
+\r
+#define EFI_MEMORY_ARRAY_START_ADDRESS_RECORD_NUMBER 0x00000004\r
+\r
+///\r
+/// This data record refers to a specified physical memory array associated with \r
+/// a given memory range. \r
+/// \r
+typedef struct {\r
+ ///\r
+ /// The starting physical address in bytes of memory mapped to a specified physical \r
+ /// memory array. \r
+ ///\r
+ EFI_PHYSICAL_ADDRESS MemoryArrayStartAddress;\r
+ ///\r
+ /// The last physical address in bytes of memory mapped to a specified physical memory \r
+ /// array. \r
+ ///\r
+ EFI_PHYSICAL_ADDRESS MemoryArrayEndAddress;\r
+ ///\r
+ /// See Physical Memory Array (Type 16) for physical memory array structures.\r
+ ///\r
+ EFI_INTER_LINK_DATA PhysicalMemoryArrayLink;\r
+ ///\r
+ /// The number of memory devices that form a single row of memory for the address \r
+ /// partition. \r
+ ///\r
+ UINT16 MemoryArrayPartitionWidth;\r
+} EFI_MEMORY_ARRAY_START_ADDRESS_DATA;\r
+\r
+\r
+#define EFI_MEMORY_DEVICE_START_ADDRESS_RECORD_NUMBER 0x00000005\r
+\r
+///\r
+/// This data record refers to a physical memory device that is associated with \r
+/// a given memory range.\r
+/// \r
+typedef struct {\r
+ ///\r
+ /// The starting physical address that is associated with the device. \r
+ ///\r
+ EFI_PHYSICAL_ADDRESS MemoryDeviceStartAddress;\r
+ ///\r
+ /// The ending physical address that is associated with the device. \r
+ ///\r
+ EFI_PHYSICAL_ADDRESS MemoryDeviceEndAddress;\r
+ ///\r
+ /// A link to the memory device data structure. \r
+ ///\r
+ EFI_INTER_LINK_DATA PhysicalMemoryDeviceLink;\r
+ /// \r
+ /// A link to the memory array data structure. \r
+ ///\r
+ EFI_INTER_LINK_DATA PhysicalMemoryArrayLink;\r
+ ///\r
+ /// The position of the memory device in a row. A value of 0x00 is reserved and a value \r
+ /// of 0xFF indicates that the position is unknown. \r
+ ///\r
+ UINT8 MemoryDevicePartitionRowPosition;\r
+ ///\r
+ /// The position of the device in an interleave. \r
+ ///\r
+ UINT8 MemoryDeviceInterleavePosition;\r
+ ///\r
+ /// The maximum number of consecutive rows from the device that are accessed in a \r
+ /// single interleave transfer. A value of 0x00 indicates that the device is not interleaved \r
+ /// and a value of 0xFF indicates that the interleave configuration is unknown. \r
+ ///\r
+ UINT8 MemoryDeviceInterleaveDataDepth;\r
+} EFI_MEMORY_DEVICE_START_ADDRESS_DATA;\r
+\r
+\r
+//\r
+// Memory. Channel Device Type - SMBIOS Type 37\r
+//\r
+\r
+#define EFI_MEMORY_CHANNEL_TYPE_RECORD_NUMBER 0x00000006\r
+\r
+typedef enum _EFI_MEMORY_CHANNEL_TYPE {\r
+ EfiMemoryChannelTypeOther = 1,\r
+ EfiMemoryChannelTypeUnknown = 2,\r
+ EfiMemoryChannelTypeRambus = 3,\r
+ EfiMemoryChannelTypeSyncLink = 4\r
+} EFI_MEMORY_CHANNEL_TYPE;\r
+\r
+///\r
+/// This data record refers the type of memory that is associated with the channel. This data record is a \r
+/// structure. \r
+/// The type definition structure for EFI_MEMORY_CHANNEL_TYPE_DATA is in SMBIOS 2.3.4, \r
+/// Table 3.3.38, Type 37, with the following offsets: \r
+/// - Offset 0x4 \r
+/// - Offset 0x5 \r
+/// - Offset 0x6\r
+/// \r
+typedef struct {\r
+ ///\r
+ /// The type of memory that is associated with the channel. \r
+ /// \r
+ EFI_MEMORY_CHANNEL_TYPE MemoryChannelType;\r
+ ///\r
+ /// The maximum load that is supported by the channel.\r
+ ///\r
+ UINT8 MemoryChannelMaximumLoad;\r
+ ///\r
+ /// The number of memory devices on this channel. \r
+ ///\r
+ UINT8 MemoryChannelDeviceCount;\r
+} EFI_MEMORY_CHANNEL_TYPE_DATA;\r
+\r
+#define EFI_MEMORY_CHANNEL_DEVICE_RECORD_NUMBER 0x00000007\r
+\r
+///\r
+/// This data record refers to the memory device that is associated with the memory channel. This data \r
+/// record is a structure. \r
+/// The type definition structure for EFI_MEMORY_CHANNEL_DEVICE_DATA is in SMBIOS 2.3.4, \r
+/// Table 3.3.38, Type 37, with the following offsets: \r
+/// - Offset 0x7 \r
+/// - Offset 0x8\r
+///\r
+typedef struct {\r
+ ///\r
+ /// A number between one and MemoryChannelDeviceCount plus an arbitrary base. \r
+ /// \r
+ UINT8 DeviceId;\r
+ ///\r
+ /// The Link of the associated memory device. See Memory Device (Type 17) for \r
+ /// memory devices. \r
+ ///\r
+ EFI_INTER_LINK_DATA DeviceLink;\r
+ ///\r
+ /// The number of load units that this device consumes. \r
+ ///\r
+ UINT8 MemoryChannelDeviceLoad;\r
+} EFI_MEMORY_CHANNEL_DEVICE_DATA;\r
+\r
+//\r
+// Memory. Controller Information - SMBIOS Type 5\r
+//\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 type 5.\r
+///\r
+#define EFI_MEMORY_CONTROLLER_INFORMATION_RECORD_NUMBER 0x00000008\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 type 5.\r
+///\r
+typedef enum { \r
+ EfiErrorDetectingMethodOther = 1,\r
+ EfiErrorDetectingMethodUnknown = 2,\r
+ EfiErrorDetectingMethodNone = 3,\r
+ EfiErrorDetectingMethodParity = 4,\r
+ EfiErrorDetectingMethod32Ecc = 5,\r
+ EfiErrorDetectingMethod64Ecc = 6,\r
+ EfiErrorDetectingMethod128Ecc = 7,\r
+ EfiErrorDetectingMethodCrc = 8\r
+} EFI_MEMORY_ERROR_DETECT_METHOD_TYPE;\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 type 5.\r
+///\r
+typedef struct {\r
+ UINT8 Other :1;\r
+ UINT8 Unknown :1;\r
+ UINT8 None :1;\r
+ UINT8 SingleBitErrorCorrect :1;\r
+ UINT8 DoubleBitErrorCorrect :1;\r
+ UINT8 ErrorScrubbing :1;\r
+ UINT8 Reserved :2;\r
+} EFI_MEMORY_ERROR_CORRECT_CAPABILITY;\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 type 5.\r
+///\r
+typedef enum { \r
+ EfiMemoryInterleaveOther = 1,\r
+ EfiMemoryInterleaveUnknown = 2,\r
+ EfiMemoryInterleaveOneWay = 3,\r
+ EfiMemoryInterleaveTwoWay = 4,\r
+ EfiMemoryInterleaveFourWay = 5,\r
+ EfiMemoryInterleaveEightWay = 6,\r
+ EfiMemoryInterleaveSixteenWay = 7\r
+} EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE;\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 type 5.\r
+///\r
+typedef struct {\r
+ UINT16 Other :1;\r
+ UINT16 Unknown :1;\r
+ UINT16 SeventyNs:1;\r
+ UINT16 SixtyNs :1;\r
+ UINT16 FiftyNs :1;\r
+ UINT16 Reserved :11;\r
+} EFI_MEMORY_SPEED_TYPE;\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 type 5.\r
+///\r
+typedef struct {\r
+ UINT16 Other :1;\r
+ UINT16 Unknown :1;\r
+ UINT16 Standard :1;\r
+ UINT16 FastPageMode:1;\r
+ UINT16 EDO :1;\r
+ UINT16 Parity :1;\r
+ UINT16 ECC :1;\r
+ UINT16 SIMM :1;\r
+ UINT16 DIMM :1;\r
+ UINT16 BurstEdo :1;\r
+ UINT16 SDRAM :1;\r
+ UINT16 Reserved :5;\r
+} EFI_MEMORY_SUPPORTED_TYPE;\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 type 5.\r
+///\r
+typedef struct {\r
+ UINT8 Five :1;\r
+ UINT8 Three :1;\r
+ UINT8 Two :1;\r
+ UINT8 Reserved:5;\r
+} EFI_MEMORY_MODULE_VOLTAGE_TYPE;\r
+\r
+///\r
+/// EFI_MEMORY_CONTROLLER_INFORMATION is obsolete\r
+/// Use EFI_MEMORY_CONTROLLER_INFORMATION_DATA instead\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 type 5.\r
+///\r
+typedef struct {\r
+ EFI_MEMORY_ERROR_DETECT_METHOD_TYPE ErrorDetectingMethod;\r
+ EFI_MEMORY_ERROR_CORRECT_CAPABILITY ErrorCorrectingCapability;\r
+ EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemorySupportedInterleave;\r
+ EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemoryCurrentInterleave;\r
+ UINT8 MaxMemoryModuleSize;\r
+ EFI_MEMORY_SPEED_TYPE MemorySpeedType;\r
+ EFI_MEMORY_SUPPORTED_TYPE MemorySupportedType;\r
+ EFI_MEMORY_MODULE_VOLTAGE_TYPE MemoryModuleVoltage;\r
+ UINT8 NumberofMemorySlot;\r
+ EFI_MEMORY_ERROR_CORRECT_CAPABILITY EnabledCorrectingCapability;\r
+ UINT16 *MemoryModuleConfigHandles;\r
+} EFI_MEMORY_CONTROLLER_INFORMATION;\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 type 5.\r
+///\r
+typedef struct {\r
+ EFI_MEMORY_ERROR_DETECT_METHOD_TYPE ErrorDetectingMethod;\r
+ EFI_MEMORY_ERROR_CORRECT_CAPABILITY ErrorCorrectingCapability;\r
+ EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemorySupportedInterleave;\r
+ EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemoryCurrentInterleave;\r
+ UINT8 MaxMemoryModuleSize;\r
+ EFI_MEMORY_SPEED_TYPE MemorySpeedType;\r
+ EFI_MEMORY_SUPPORTED_TYPE MemorySupportedType;\r
+ EFI_MEMORY_MODULE_VOLTAGE_TYPE MemoryModuleVoltage;\r
+ UINT8 NumberofMemorySlot;\r
+ EFI_MEMORY_ERROR_CORRECT_CAPABILITY EnabledCorrectingCapability;\r
+ EFI_INTER_LINK_DATA MemoryModuleConfig[1];\r
+} EFI_MEMORY_CONTROLLER_INFORMATION_DATA;\r
+\r
+///\r
+/// Memory. Error Information - SMBIOS Type 18\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 type 18.\r
+///\r
+#define EFI_MEMORY_32BIT_ERROR_INFORMATION_RECORD_NUMBER 0x00000009\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 type 18.\r
+///\r
+typedef enum { \r
+ EfiMemoryErrorOther = 1,\r
+ EfiMemoryErrorUnknown = 2,\r
+ EfiMemoryErrorOk = 3,\r
+ EfiMemoryErrorBadRead = 4,\r
+ EfiMemoryErrorParity = 5,\r
+ EfiMemoryErrorSigleBit = 6,\r
+ EfiMemoryErrorDoubleBit = 7,\r
+ EfiMemoryErrorMultiBit = 8,\r
+ EfiMemoryErrorNibble = 9,\r
+ EfiMemoryErrorChecksum = 10,\r
+ EfiMemoryErrorCrc = 11,\r
+ EfiMemoryErrorCorrectSingleBit = 12,\r
+ EfiMemoryErrorCorrected = 13,\r
+ EfiMemoryErrorUnCorrectable = 14\r
+} EFI_MEMORY_ERROR_TYPE;\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 type 18.\r
+///\r
+typedef enum { \r
+ EfiMemoryGranularityOther = 1,\r
+ EfiMemoryGranularityOtherUnknown = 2,\r
+ EfiMemoryGranularityDeviceLevel = 3,\r
+ EfiMemoryGranularityMemPartitionLevel = 4\r
+} EFI_MEMORY_ERROR_GRANULARITY_TYPE;\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 type 18.\r
+///\r
+typedef enum { \r
+ EfiMemoryErrorOperationOther = 1,\r
+ EfiMemoryErrorOperationUnknown = 2,\r
+ EfiMemoryErrorOperationRead = 3,\r
+ EfiMemoryErrorOperationWrite = 4,\r
+ EfiMemoryErrorOperationPartialWrite = 5\r
+} EFI_MEMORY_ERROR_OPERATION_TYPE;\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 type 18.\r
+///\r
+typedef struct {\r
+ EFI_MEMORY_ERROR_TYPE MemoryErrorType;\r
+ EFI_MEMORY_ERROR_GRANULARITY_TYPE MemoryErrorGranularity;\r
+ EFI_MEMORY_ERROR_OPERATION_TYPE MemoryErrorOperation;\r
+ UINT32 VendorSyndrome;\r
+ UINT32 MemoryArrayErrorAddress;\r
+ UINT32 DeviceErrorAddress;\r
+ UINT32 DeviceErrorResolution;\r
+} EFI_MEMORY_32BIT_ERROR_INFORMATION;\r
+\r
+///\r
+/// Memory. Error Information - SMBIOS Type 33.\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 type 33.\r
+///\r
+#define EFI_MEMORY_64BIT_ERROR_INFORMATION_RECORD_NUMBER 0x0000000A\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 type 33.\r
+///\r
+typedef struct {\r
+ EFI_MEMORY_ERROR_TYPE MemoryErrorType;\r
+ EFI_MEMORY_ERROR_GRANULARITY_TYPE MemoryErrorGranularity;\r
+ EFI_MEMORY_ERROR_OPERATION_TYPE MemoryErrorOperation;\r
+ UINT32 VendorSyndrome;\r
+ UINT64 MemoryArrayErrorAddress;\r
+ UINT64 DeviceErrorAddress;\r
+ UINT32 DeviceErrorResolution;\r
+} EFI_MEMORY_64BIT_ERROR_INFORMATION;\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It is implementation-specific to simplify the code logic.\r
+///\r
+typedef union _EFI_MEMORY_SUBCLASS_RECORDS {\r
+ EFI_MEMORY_SIZE_DATA SizeData;\r
+ EFI_MEMORY_ARRAY_LOCATION_DATA ArrayLocationData;\r
+ EFI_MEMORY_ARRAY_LINK_DATA ArrayLink;\r
+ EFI_MEMORY_ARRAY_START_ADDRESS_DATA ArrayStartAddress;\r
+ EFI_MEMORY_DEVICE_START_ADDRESS_DATA DeviceStartAddress;\r
+ EFI_MEMORY_CHANNEL_TYPE_DATA ChannelTypeData;\r
+ EFI_MEMORY_CHANNEL_DEVICE_DATA ChannelDeviceData;\r
+ EFI_MEMORY_CONTROLLER_INFORMATION MemoryControllerInfo;\r
+ EFI_MEMORY_32BIT_ERROR_INFORMATION Memory32bitErrorInfo;\r
+ EFI_MEMORY_64BIT_ERROR_INFORMATION Memory64bitErrorInfo;\r
+} EFI_MEMORY_SUBCLASS_RECORDS;\r
+\r
+typedef struct {\r
+ EFI_SUBCLASS_TYPE1_HEADER Header;\r
+ EFI_MEMORY_SUBCLASS_RECORDS Record;\r
+} EFI_MEMORY_SUBCLASS_DRIVER_DATA;\r
+\r
+#define EFI_MISC_SUBCLASS_VERSION 0x0100\r
+\r
+#pragma pack(1)\r
+\r
+//\r
+// Last PCI Bus Number\r
+//\r
+#define EFI_MISC_LAST_PCI_BUS_RECORD_NUMBER 0x00000001\r
+\r
+typedef struct {\r
+ UINT8 LastPciBus;\r
+} EFI_MISC_LAST_PCI_BUS_DATA;\r
+\r
+//\r
+// Misc. BIOS Vendor - SMBIOS Type 0\r
+//\r
+#define EFI_MISC_BIOS_VENDOR_RECORD_NUMBER 0x00000002\r
+\r
+typedef struct {\r
+ UINT64 Reserved1 :2;\r
+ UINT64 Unknown :1;\r
+ UINT64 BiosCharacteristicsNotSupported :1;\r
+ UINT64 IsaIsSupported :1;\r
+ UINT64 McaIsSupported :1;\r
+ UINT64 EisaIsSupported :1;\r
+ UINT64 PciIsSupported :1;\r
+ UINT64 PcmciaIsSupported :1;\r
+ UINT64 PlugAndPlayIsSupported :1;\r
+ UINT64 ApmIsSupported :1;\r
+ UINT64 BiosIsUpgradable :1;\r
+ UINT64 BiosShadowingAllowed :1;\r
+ UINT64 VlVesaIsSupported :1;\r
+ UINT64 EscdSupportIsAvailable :1;\r
+ UINT64 BootFromCdIsSupported :1;\r
+ UINT64 SelectableBootIsSupported :1;\r
+ UINT64 RomBiosIsSocketed :1;\r
+ UINT64 BootFromPcmciaIsSupported :1;\r
+ UINT64 EDDSpecificationIsSupported :1;\r
+ UINT64 JapaneseNecFloppyIsSupported :1;\r
+ UINT64 JapaneseToshibaFloppyIsSupported :1;\r
+ UINT64 Floppy525_360IsSupported :1;\r
+ UINT64 Floppy525_12IsSupported :1;\r
+ UINT64 Floppy35_720IsSupported :1;\r
+ UINT64 Floppy35_288IsSupported :1;\r
+ UINT64 PrintScreenIsSupported :1;\r
+ UINT64 Keyboard8042IsSupported :1;\r
+ UINT64 SerialIsSupported :1;\r
+ UINT64 PrinterIsSupported :1;\r
+ UINT64 CgaMonoIsSupported :1;\r
+ UINT64 NecPc98 :1;\r
+ UINT64 AcpiIsSupported :1;\r
+ UINT64 UsbLegacyIsSupported :1;\r
+ UINT64 AgpIsSupported :1;\r
+ UINT64 I20BootIsSupported :1;\r
+ UINT64 Ls120BootIsSupported :1;\r
+ UINT64 AtapiZipDriveBootIsSupported :1;\r
+ UINT64 Boot1394IsSupported :1;\r
+ UINT64 SmartBatteryIsSupported :1;\r
+ UINT64 BiosBootSpecIsSupported :1;\r
+ UINT64 FunctionKeyNetworkBootIsSupported :1;\r
+ UINT64 Reserved :22;\r
+} EFI_MISC_BIOS_CHARACTERISTICS;\r
+\r
+typedef struct {\r
+ UINT64 BiosReserved :16;\r
+ UINT64 SystemReserved:16;\r
+ UINT64 Reserved :32;\r
+} EFI_MISC_BIOS_CHARACTERISTICS_EXTENSION;\r
+\r
+typedef struct {\r
+ STRING_REF BiosVendor;\r
+ STRING_REF BiosVersion;\r
+ STRING_REF BiosReleaseDate;\r
+ EFI_PHYSICAL_ADDRESS BiosStartingAddress;\r
+ EFI_EXP_BASE2_DATA BiosPhysicalDeviceSize;\r
+ EFI_MISC_BIOS_CHARACTERISTICS BiosCharacteristics1;\r
+ EFI_MISC_BIOS_CHARACTERISTICS_EXTENSION \r
+ BiosCharacteristics2;\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.\r
+ /// It's introduced for SmBios 2.6 specification type 0.\r
+ ///\r
+ UINT8 BiosMajorRelease;\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.\r
+ /// It's introduced for SmBios 2.6 specification type 0.\r
+ ///\r
+ UINT8 BiosMinorRelease;\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.\r
+ /// It's introduced for SmBios 2.6 specification type 0.\r
+ ///\r
+ UINT8 BiosEmbeddedFirmwareMajorRelease;\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.\r
+ /// It's introduced for SmBios 2.6 specification type 0.\r
+ ///\r
+ UINT8 BiosEmbeddedFirmwareMinorRelease;\r
+} EFI_MISC_BIOS_VENDOR_DATA;\r
+\r
+//\r
+// Misc. System Manufacturer - SMBIOS Type 1\r
+//\r
+#define EFI_MISC_SYSTEM_MANUFACTURER_RECORD_NUMBER 0x00000003\r
+\r
+typedef enum {\r
+ EfiSystemWakeupTypeReserved = 0,\r
+ EfiSystemWakeupTypeOther = 1,\r
+ EfiSystemWakeupTypeUnknown = 2,\r
+ EfiSystemWakeupTypeApmTimer = 3,\r
+ EfiSystemWakeupTypeModemRing = 4,\r
+ EfiSystemWakeupTypeLanRemote = 5,\r
+ EfiSystemWakeupTypePowerSwitch = 6,\r
+ EfiSystemWakeupTypePciPme = 7,\r
+ EfiSystemWakeupTypeAcPowerRestored = 8\r
+} EFI_MISC_SYSTEM_WAKEUP_TYPE;\r
+\r
+typedef struct {\r
+ STRING_REF SystemManufacturer;\r
+ STRING_REF SystemProductName;\r
+ STRING_REF SystemVersion;\r
+ STRING_REF SystemSerialNumber;\r
+ EFI_GUID SystemUuid;\r
+ EFI_MISC_SYSTEM_WAKEUP_TYPE SystemWakeupType;\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.\r
+ /// It's introduced for SmBios 2.6 specification type 1.\r
+ ///\r
+ STRING_REF SystemSKUNumber;\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.\r
+ /// It's introduced for SmBios 2.6 specification type 1.\r
+ ///\r
+ STRING_REF SystemFamily;\r
+} EFI_MISC_SYSTEM_MANUFACTURER_DATA;\r
+\r
+//\r
+// Misc. Base Board Manufacturer - SMBIOS Type 2\r
+//\r
+#define EFI_MISC_BASE_BOARD_MANUFACTURER_RECORD_NUMBER 0x00000004\r
+\r
+typedef struct {\r
+ UINT32 Motherboard :1;\r
+ UINT32 RequiresDaughterCard :1;\r
+ UINT32 Removable :1;\r
+ UINT32 Replaceable :1;\r
+ UINT32 HotSwappable :1;\r
+ UINT32 Reserved :27;\r
+} EFI_BASE_BOARD_FEATURE_FLAGS;\r
+\r
+typedef enum {\r
+ EfiBaseBoardTypeUnknown = 1,\r
+ EfiBaseBoardTypeOther = 2,\r
+ EfiBaseBoardTypeServerBlade = 3,\r
+ EfiBaseBoardTypeConnectivitySwitch = 4,\r
+ EfiBaseBoardTypeSystemManagementModule = 5,\r
+ EfiBaseBoardTypeProcessorModule = 6,\r
+ EfiBaseBoardTypeIOModule = 7,\r
+ EfiBaseBoardTypeMemoryModule = 8,\r
+ EfiBaseBoardTypeDaughterBoard = 9,\r
+ EfiBaseBoardTypeMotherBoard = 0xA,\r
+ EfiBaseBoardTypeProcessorMemoryModule = 0xB,\r
+ EfiBaseBoardTypeProcessorIOModule = 0xC,\r
+ EfiBaseBoardTypeInterconnectBoard = 0xD\r
+} EFI_BASE_BOARD_TYPE;\r
+\r
+typedef struct {\r
+ STRING_REF BaseBoardManufacturer;\r
+ STRING_REF BaseBoardProductName;\r
+ STRING_REF BaseBoardVersion;\r
+ STRING_REF BaseBoardSerialNumber;\r
+ STRING_REF BaseBoardAssetTag;\r
+ STRING_REF BaseBoardChassisLocation;\r
+ EFI_BASE_BOARD_FEATURE_FLAGS BaseBoardFeatureFlags;\r
+ EFI_BASE_BOARD_TYPE BaseBoardType;\r
+ EFI_INTER_LINK_DATA BaseBoardChassisLink;\r
+ UINT32 BaseBoardNumberLinks;\r
+ EFI_INTER_LINK_DATA LinkN;\r
+} EFI_MISC_BASE_BOARD_MANUFACTURER_DATA;\r
+\r
+//\r
+// Misc. System/Chassis Enclosure - SMBIOS Type 3\r
+//\r
+#define EFI_MISC_CHASSIS_MANUFACTURER_RECORD_NUMBER 0x00000005\r
+\r
+typedef enum {\r
+ EfiMiscChassisTypeOther = 0x1,\r
+ EfiMiscChassisTypeUnknown = 0x2,\r
+ EfiMiscChassisTypeDeskTop = 0x3,\r
+ EfiMiscChassisTypeLowProfileDesktop = 0x4,\r
+ EfiMiscChassisTypePizzaBox = 0x5,\r
+ EfiMiscChassisTypeMiniTower = 0x6,\r
+ EfiMiscChassisTypeTower = 0x7,\r
+ EfiMiscChassisTypePortable = 0x8,\r
+ EfiMiscChassisTypeLapTop = 0x9,\r
+ EfiMiscChassisTypeNotebook = 0xA,\r
+ EfiMiscChassisTypeHandHeld = 0xB,\r
+ EfiMiscChassisTypeDockingStation = 0xC,\r
+ EfiMiscChassisTypeAllInOne = 0xD,\r
+ EfiMiscChassisTypeSubNotebook = 0xE,\r
+ EfiMiscChassisTypeSpaceSaving = 0xF,\r
+ EfiMiscChassisTypeLunchBox = 0x10,\r
+ EfiMiscChassisTypeMainServerChassis = 0x11,\r
+ EfiMiscChassisTypeExpansionChassis = 0x12,\r
+ EfiMiscChassisTypeSubChassis = 0x13,\r
+ EfiMiscChassisTypeBusExpansionChassis = 0x14,\r
+ EfiMiscChassisTypePeripheralChassis = 0x15,\r
+ EfiMiscChassisTypeRaidChassis = 0x16,\r
+ EfiMiscChassisTypeRackMountChassis = 0x17,\r
+ EfiMiscChassisTypeSealedCasePc = 0x18,\r
+ EfiMiscChassisMultiSystemChassis = 0x19\r
+} EFI_MISC_CHASSIS_TYPE;\r
+\r
+typedef struct {\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// In MiscSubclass 0.9 specification, it has the incorrect field name "EFI_MISC_CHASSIS_TYPE".\r
+ /// Change it to "ChassisType" to pass build.\r
+ ///\r
+ UINT32 ChassisType :16;\r
+ UINT32 ChassisLockPresent:1;\r
+ UINT32 Reserved :15;\r
+} EFI_MISC_CHASSIS_STATUS;\r
+\r
+typedef enum {\r
+ EfiChassisStateOther = 0x01,\r
+ EfiChassisStateUnknown = 0x02,\r
+ EfiChassisStateSafe = 0x03,\r
+ EfiChassisStateWarning = 0x04,\r
+ EfiChassisStateCritical = 0x05,\r
+ EfiChassisStateNonRecoverable = 0x06\r
+} EFI_MISC_CHASSIS_STATE;\r
+\r
+typedef enum {\r
+ EfiChassisSecurityStatusOther = 0x01,\r
+ EfiChassisSecurityStatusUnknown = 0x02,\r
+ EfiChassisSecurityStatusNone = 0x03,\r
+ EfiChassisSecurityStatusExternalInterfaceLockedOut = 0x04,\r
+ EfiChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05\r
+} EFI_MISC_CHASSIS_SECURITY_STATE;\r
+\r
+typedef struct {\r
+ UINT32 RecordType :1;\r
+ UINT32 Type :7;\r
+ UINT32 Reserved :24;\r
+} EFI_MISC_ELEMENT_TYPE;\r
+\r
+typedef struct {\r
+ EFI_MISC_ELEMENT_TYPE ChassisElementType;\r
+ EFI_INTER_LINK_DATA ChassisElementStructure;\r
+ EFI_BASE_BOARD_TYPE ChassisBaseBoard;\r
+ UINT32 ChassisElementMinimum;\r
+ UINT32 ChassisElementMaximum;\r
+} EFI_MISC_ELEMENTS;\r
+\r
+typedef struct {\r
+ STRING_REF ChassisManufacturer;\r
+ STRING_REF ChassisVersion;\r
+ STRING_REF ChassisSerialNumber;\r
+ STRING_REF ChassisAssetTag;\r
+ EFI_MISC_CHASSIS_STATUS ChassisType;\r
+ EFI_MISC_CHASSIS_STATE ChassisBootupState;\r
+ EFI_MISC_CHASSIS_STATE ChassisPowerSupplyState;\r
+ EFI_MISC_CHASSIS_STATE ChassisThermalState;\r
+ EFI_MISC_CHASSIS_SECURITY_STATE ChassisSecurityState;\r
+ UINT32 ChassisOemDefined;\r
+ UINT32 ChassisHeight;\r
+ UINT32 ChassisNumberPowerCords;\r
+ UINT32 ChassisElementCount;\r
+ UINT32 ChassisElementRecordLength;\r
+ EFI_MISC_ELEMENTS ChassisElements;\r
+} EFI_MISC_CHASSIS_MANUFACTURER_DATA;\r
+\r
+//\r
+// Misc. Port Connector Information - SMBIOS Type 8\r
+//\r
+#define EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_RECORD_NUMBER 0x00000006\r
+\r
+typedef enum {\r
+ EfiPortConnectorTypeNone = 0x00,\r
+ EfiPortConnectorTypeCentronics = 0x01,\r
+ EfiPortConnectorTypeMiniCentronics = 0x02,\r
+ EfiPortConnectorTypeProprietary = 0x03,\r
+ EfiPortConnectorTypeDB25Male = 0x04,\r
+ EfiPortConnectorTypeDB25Female = 0x05,\r
+ EfiPortConnectorTypeDB15Male = 0x06,\r
+ EfiPortConnectorTypeDB15Female = 0x07,\r
+ EfiPortConnectorTypeDB9Male = 0x08,\r
+ EfiPortConnectorTypeDB9Female = 0x09,\r
+ EfiPortConnectorTypeRJ11 = 0x0A,\r
+ EfiPortConnectorTypeRJ45 = 0x0B,\r
+ EfiPortConnectorType50PinMiniScsi = 0x0C,\r
+ EfiPortConnectorTypeMiniDin = 0x0D,\r
+ EfiPortConnectorTypeMicriDin = 0x0E,\r
+ EfiPortConnectorTypePS2 = 0x0F,\r
+ EfiPortConnectorTypeInfrared = 0x10,\r
+ EfiPortConnectorTypeHpHil = 0x11,\r
+ EfiPortConnectorTypeUsb = 0x12,\r
+ EfiPortConnectorTypeSsaScsi = 0x13,\r
+ EfiPortConnectorTypeCircularDin8Male = 0x14,\r
+ EfiPortConnectorTypeCircularDin8Female = 0x15,\r
+ EfiPortConnectorTypeOnboardIde = 0x16,\r
+ EfiPortConnectorTypeOnboardFloppy = 0x17,\r
+ EfiPortConnectorType9PinDualInline = 0x18,\r
+ EfiPortConnectorType25PinDualInline = 0x19,\r
+ EfiPortConnectorType50PinDualInline = 0x1A,\r
+ EfiPortConnectorType68PinDualInline = 0x1B,\r
+ EfiPortConnectorTypeOnboardSoundInput = 0x1C,\r
+ EfiPortConnectorTypeMiniCentronicsType14 = 0x1D,\r
+ EfiPortConnectorTypeMiniCentronicsType26 = 0x1E,\r
+ EfiPortConnectorTypeHeadPhoneMiniJack = 0x1F,\r
+ EfiPortConnectorTypeBNC = 0x20,\r
+ EfiPortConnectorType1394 = 0x21,\r
+ EfiPortConnectorTypePC98 = 0xA0,\r
+ EfiPortConnectorTypePC98Hireso = 0xA1,\r
+ EfiPortConnectorTypePCH98 = 0xA2,\r
+ EfiPortConnectorTypePC98Note = 0xA3,\r
+ EfiPortConnectorTypePC98Full = 0xA4,\r
+ EfiPortConnectorTypeOther = 0xFF\r
+} EFI_MISC_PORT_CONNECTOR_TYPE;\r
+\r
+typedef enum {\r
+ EfiPortTypeNone = 0x00,\r
+ EfiPortTypeParallelXtAtCompatible = 0x01,\r
+ EfiPortTypeParallelPortPs2 = 0x02,\r
+ EfiPortTypeParallelPortEcp = 0x03,\r
+ EfiPortTypeParallelPortEpp = 0x04,\r
+ EfiPortTypeParallelPortEcpEpp = 0x05,\r
+ EfiPortTypeSerialXtAtCompatible = 0x06,\r
+ EfiPortTypeSerial16450Compatible = 0x07,\r
+ EfiPortTypeSerial16550Compatible = 0x08,\r
+ EfiPortTypeSerial16550ACompatible = 0x09,\r
+ EfiPortTypeScsi = 0x0A,\r
+ EfiPortTypeMidi = 0x0B,\r
+ EfiPortTypeJoyStick = 0x0C,\r
+ EfiPortTypeKeyboard = 0x0D,\r
+ EfiPortTypeMouse = 0x0E,\r
+ EfiPortTypeSsaScsi = 0x0F,\r
+ EfiPortTypeUsb = 0x10,\r
+ EfiPortTypeFireWire = 0x11,\r
+ EfiPortTypePcmciaTypeI = 0x12,\r
+ EfiPortTypePcmciaTypeII = 0x13,\r
+ EfiPortTypePcmciaTypeIII = 0x14,\r
+ EfiPortTypeCardBus = 0x15,\r
+ EfiPortTypeAccessBusPort = 0x16,\r
+ EfiPortTypeScsiII = 0x17,\r
+ EfiPortTypeScsiWide = 0x18,\r
+ EfiPortTypePC98 = 0x19,\r
+ EfiPortTypePC98Hireso = 0x1A,\r
+ EfiPortTypePCH98 = 0x1B,\r
+ EfiPortTypeVideoPort = 0x1C,\r
+ EfiPortTypeAudioPort = 0x1D,\r
+ EfiPortTypeModemPort = 0x1E,\r
+ EfiPortTypeNetworkPort = 0x1F,\r
+ EfiPortType8251Compatible = 0xA0,\r
+ EfiPortType8251FifoCompatible = 0xA1,\r
+ EfiPortTypeOther = 0xFF\r
+} EFI_MISC_PORT_TYPE;\r
+\r
+typedef struct {\r
+ STRING_REF PortInternalConnectorDesignator;\r
+ STRING_REF PortExternalConnectorDesignator;\r
+ EFI_MISC_PORT_CONNECTOR_TYPE PortInternalConnectorType;\r
+ EFI_MISC_PORT_CONNECTOR_TYPE PortExternalConnectorType;\r
+ EFI_MISC_PORT_TYPE PortType;\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// In MiscSubclass specification 0.9, this type of field is defined as EFI_DEVICE_PATH_PROTOCOL,\r
+ /// which causes the implementation some complexity. Keep it unchanged for backward \r
+ /// compatibility.\r
+ ///\r
+ EFI_MISC_PORT_DEVICE_PATH PortPath;\r
+} EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA;\r
+\r
+//\r
+// Misc. System Slots - SMBIOS Type 9\r
+//\r
+#define EFI_MISC_SYSTEM_SLOT_DESIGNATION_RECORD_NUMBER 0x00000007\r
+\r
+typedef enum {\r
+ EfiSlotTypeOther = 0x01,\r
+ EfiSlotTypeUnknown = 0x02,\r
+ EfiSlotTypeIsa = 0x03,\r
+ EfiSlotTypeMca = 0x04,\r
+ EfiSlotTypeEisa = 0x05,\r
+ EfiSlotTypePci = 0x06,\r
+ EfiSlotTypePcmcia = 0x07,\r
+ EfiSlotTypeVlVesa = 0x08,\r
+ EfiSlotTypeProprietary = 0x09,\r
+ EfiSlotTypeProcessorCardSlot = 0x0A,\r
+ EfiSlotTypeProprietaryMemoryCardSlot = 0x0B,\r
+ EfiSlotTypeIORiserCardSlot = 0x0C,\r
+ EfiSlotTypeNuBus = 0x0D,\r
+ EfiSlotTypePci66MhzCapable = 0x0E,\r
+ EfiSlotTypeAgp = 0x0F,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// In MiscSubclass specification 0.9, its naming should be EfiSlotTypeAgp2X\r
+ /// rather than EfiSlotTypeApg2X.\r
+ ///\r
+ EfiSlotTypeAgp2X = 0x10,\r
+ EfiSlotTypeAgp4X = 0x11,\r
+ EfiSlotTypePciX = 0x12,\r
+ EfiSlotTypeAgp8x = 0x13,\r
+ EfiSlotTypePC98C20 = 0xA0,\r
+ EfiSlotTypePC98C24 = 0xA1,\r
+ EfiSlotTypePC98E = 0xA2,\r
+ EfiSlotTypePC98LocalBus = 0xA3,\r
+ EfiSlotTypePC98Card = 0xA4,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// In MiscSubclass specification 0.9, these fields aren't defined.\r
+ /// They're introduced for SmBios 2.6 specification type 9.\r
+ ///\r
+ EfiSlotTypePciExpress = 0xA5,\r
+ EfiSlotTypePciExpressX1 = 0xA6,\r
+ EfiSlotTypePciExpressX2 = 0xA7,\r
+ EfiSlotTypePciExpressX4 = 0xA8,\r
+ EfiSlotTypePciExpressX8 = 0xA9,\r
+ EfiSlotTypePciExpressX16 = 0xAA\r
+} EFI_MISC_SLOT_TYPE;\r
+\r
+typedef enum {\r
+ EfiSlotDataBusWidthOther = 0x01,\r
+ EfiSlotDataBusWidthUnknown = 0x02,\r
+ EfiSlotDataBusWidth8Bit = 0x03,\r
+ EfiSlotDataBusWidth16Bit = 0x04,\r
+ EfiSlotDataBusWidth32Bit = 0x05,\r
+ EfiSlotDataBusWidth64Bit = 0x06,\r
+ EfiSlotDataBusWidth128Bit = 0x07,\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// In MiscSubclass specification 0.9, these fields aren't defined.\r
+ /// They're introduced for SmBios 2.6 specification type 9.\r
+ ///\r
+ EfiSlotDataBusWidth1xOrx1 = 0x8,\r
+ EfiSlotDataBusWidth2xOrx2 = 0x9,\r
+ EfiSlotDataBusWidth4xOrx4 = 0xA,\r
+ EfiSlotDataBusWidth8xOrx8 = 0xB,\r
+ EfiSlotDataBusWidth12xOrx12 = 0xC,\r
+ EfiSlotDataBusWidth16xOrx16 = 0xD,\r
+ EfiSlotDataBusWidth32xOrx32 = 0xE\r
+} EFI_MISC_SLOT_DATA_BUS_WIDTH;\r
+\r
+typedef enum {\r
+ EfiSlotUsageOther = 1,\r
+ EfiSlotUsageUnknown = 2,\r
+ EfiSlotUsageAvailable = 3,\r
+ EfiSlotUsageInUse = 4\r
+} EFI_MISC_SLOT_USAGE;\r
+\r
+typedef enum {\r
+ EfiSlotLengthOther = 1,\r
+ EfiSlotLengthUnknown = 2,\r
+ EfiSlotLengthShort = 3,\r
+ EfiSlotLengthLong = 4\r
+} EFI_MISC_SLOT_LENGTH;\r
+\r
+typedef struct {\r
+ UINT32 CharacteristicsUnknown :1;\r
+ UINT32 Provides50Volts :1;\r
+ UINT32 Provides33Volts :1;\r
+ UINT32 SharedSlot :1;\r
+ UINT32 PcCard16Supported :1;\r
+ UINT32 CardBusSupported :1;\r
+ UINT32 ZoomVideoSupported :1;\r
+ UINT32 ModemRingResumeSupported:1;\r
+ UINT32 PmeSignalSupported :1;\r
+ UINT32 HotPlugDevicesSupported :1;\r
+ UINT32 SmbusSignalSupported :1;\r
+ UINT32 Reserved :21;\r
+} EFI_MISC_SLOT_CHARACTERISTICS;\r
+\r
+typedef struct {\r
+ STRING_REF SlotDesignation;\r
+ EFI_MISC_SLOT_TYPE SlotType;\r
+ EFI_MISC_SLOT_DATA_BUS_WIDTH SlotDataBusWidth;\r
+ EFI_MISC_SLOT_USAGE SlotUsage;\r
+ EFI_MISC_SLOT_LENGTH SlotLength;\r
+ UINT16 SlotId;\r
+ EFI_MISC_SLOT_CHARACTERISTICS SlotCharacteristics;\r
+ EFI_DEVICE_PATH_PROTOCOL SlotDevicePath;\r
+} EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA;\r
+\r
+//\r
+// Misc. Onboard Device - SMBIOS Type 10\r
+//\r
+#define EFI_MISC_ONBOARD_DEVICE_RECORD_NUMBER 0x00000008\r
+\r
+typedef enum {\r
+ EfiOnBoardDeviceTypeOther = 1,\r
+ EfiOnBoardDeviceTypeUnknown = 2,\r
+ EfiOnBoardDeviceTypeVideo = 3,\r
+ EfiOnBoardDeviceTypeScsiController = 4,\r
+ EfiOnBoardDeviceTypeEthernet = 5,\r
+ EfiOnBoardDeviceTypeTokenRing = 6,\r
+ EfiOnBoardDeviceTypeSound = 7\r
+} EFI_MISC_ONBOARD_DEVICE_TYPE;\r
+\r
+typedef struct {\r
+ UINT32 DeviceType :16;\r
+ UINT32 DeviceEnabled :1;\r
+ UINT32 Reserved :15;\r
+} EFI_MISC_ONBOARD_DEVICE_STATUS;\r
+\r
+typedef struct {\r
+ STRING_REF OnBoardDeviceDescription;\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// In MiscSubclass specification 0.9, the name is OnBoardDeviceType.\r
+ /// Keep it unchanged for backward compatibilty.\r
+ ///\r
+ EFI_MISC_ONBOARD_DEVICE_STATUS OnBoardDeviceStatus;\r
+ EFI_DEVICE_PATH_PROTOCOL OnBoardDevicePath;\r
+} EFI_MISC_ONBOARD_DEVICE_DATA;\r
+\r
+//\r
+// Misc. BIOS Language Information - SMBIOS Type 11\r
+//\r
+#define EFI_MISC_OEM_STRING_RECORD_NUMBER 0x00000009\r
+\r
+typedef struct {\r
+ STRING_REF OemStringRef[1];\r
+} EFI_MISC_OEM_STRING_DATA;\r
+\r
+//\r
+// Misc. System Options - SMBIOS Type 12\r
+//\r
+typedef struct {\r
+ STRING_REF SystemOptionStringRef[1];\r
+} EFI_MISC_SYSTEM_OPTION_STRING_DATA;\r
+\r
+#define EFI_MISC_SYSTEM_OPTION_STRING_RECORD_NUMBER 0x0000000A\r
+\r
+//\r
+// Misc. Number of Installable Languages - SMBIOS Type 13\r
+//\r
+#define EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_RECORD_NUMBER 0x0000000B\r
+\r
+typedef struct {\r
+ UINT32 AbbreviatedLanguageFormat :1;\r
+ UINT32 Reserved :31;\r
+} EFI_MISC_LANGUAGE_FLAGS;\r
+\r
+typedef struct {\r
+ UINT16 NumberOfInstallableLanguages;\r
+ EFI_MISC_LANGUAGE_FLAGS LanguageFlags;\r
+ UINT16 CurrentLanguageNumber;\r
+} EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA;\r
+\r
+//\r
+// Misc. System Language String\r
+//\r
+#define EFI_MISC_SYSTEM_LANGUAGE_STRING_RECORD_NUMBER 0x0000000C\r
+\r
+typedef struct {\r
+ UINT16 LanguageId;\r
+ STRING_REF SystemLanguageString;\r
+} EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA;\r
+\r
+//\r
+// Group Associations - SMBIOS Type 14\r
+//\r
+#define EFI_MISC_GROUP_NAME_RECORD_NUMBER 0x0000000D\r
+\r
+typedef struct {\r
+ STRING_REF GroupName;\r
+ UINT16 NumberGroupItems;\r
+ UINT16 GroupId;\r
+} EFI_MISC_GROUP_NAME_DATA;\r
+\r
+//\r
+// Group Item Set Element\r
+//\r
+#define EFI_MISC_GROUP_ITEM_SET_RECORD_NUMBER 0x0000000E\r
+\r
+typedef struct {\r
+ EFI_GUID SubClass;\r
+ EFI_INTER_LINK_DATA GroupLink;\r
+ UINT16 GroupId;\r
+ UINT16 GroupElementId;\r
+} EFI_MISC_GROUP_ITEM_SET_DATA;\r
+\r
+//\r
+// Misc. Pointing Device Type - SMBIOS Type 21\r
+//\r
+#define EFI_MISC_POINTING_DEVICE_TYPE_RECORD_NUMBER 0x0000000F\r
+\r
+typedef enum {\r
+ EfiPointingDeviceTypeOther = 0x01,\r
+ EfiPointingDeviceTypeUnknown = 0x02,\r
+ EfiPointingDeviceTypeMouse = 0x03,\r
+ EfiPointingDeviceTypeTrackBall = 0x04,\r
+ EfiPointingDeviceTypeTrackPoint = 0x05,\r
+ EfiPointingDeviceTypeGlidePoint = 0x06,\r
+ EfiPointingDeviceTouchPad = 0x07,\r
+ EfiPointingDeviceTouchScreen = 0x08,\r
+ EfiPointingDeviceOpticalSensor = 0x09\r
+} EFI_MISC_POINTING_DEVICE_TYPE;\r
+\r
+typedef enum {\r
+ EfiPointingDeviceInterfaceOther = 0x01,\r
+ EfiPointingDeviceInterfaceUnknown = 0x02,\r
+ EfiPointingDeviceInterfaceSerial = 0x03,\r
+ EfiPointingDeviceInterfacePs2 = 0x04,\r
+ EfiPointingDeviceInterfaceInfrared = 0x05,\r
+ EfiPointingDeviceInterfaceHpHil = 0x06,\r
+ EfiPointingDeviceInterfaceBusMouse = 0x07,\r
+ EfiPointingDeviceInterfaceADB = 0x08,\r
+ EfiPointingDeviceInterfaceBusMouseDB9 = 0xA0,\r
+ EfiPointingDeviceInterfaceBusMouseMicroDin = 0xA1,\r
+ EfiPointingDeviceInterfaceUsb = 0xA2\r
+} EFI_MISC_POINTING_DEVICE_INTERFACE;\r
+\r
+typedef struct {\r
+ EFI_MISC_POINTING_DEVICE_TYPE PointingDeviceType;\r
+ EFI_MISC_POINTING_DEVICE_INTERFACE PointingDeviceInterface;\r
+ UINT16 NumberPointingDeviceButtons;\r
+ EFI_DEVICE_PATH_PROTOCOL PointingDevicePath;\r
+} EFI_MISC_POINTING_DEVICE_TYPE_DATA;\r
+\r
+//\r
+// Portable Battery - SMBIOS Type 22\r
+//\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MiscSubclass specification 0.9, the name is EFI_MISC_BATTERY_LOCATION_RECORD_NUMBER.\r
+/// Keep it unchanged for backward compatibilty.\r
+///\r
+#define EFI_MISC_PORTABLE_BATTERY_RECORD_NUMBER 0x00000010\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MiscSubclass specification 0.9, the structure name is EFI_MISC_BATTERY_DEVICE_CHEMISTRY.\r
+/// And all field namings are also different with specification.\r
+/// Keep it unchanged for backward compatibilty.\r
+///\r
+typedef enum { \r
+ EfiPortableBatteryDeviceChemistryOther = 1,\r
+ EfiPortableBatteryDeviceChemistryUnknown = 2,\r
+ EfiPortableBatteryDeviceChemistryLeadAcid = 3,\r
+ EfiPortableBatteryDeviceChemistryNickelCadmium = 4,\r
+ EfiPortableBatteryDeviceChemistryNickelMetalHydride = 5,\r
+ EfiPortableBatteryDeviceChemistryLithiumIon = 6,\r
+ EfiPortableBatteryDeviceChemistryZincAir = 7,\r
+ EfiPortableBatteryDeviceChemistryLithiumPolymer = 8\r
+} EFI_MISC_PORTABLE_BATTERY_DEVICE_CHEMISTRY;\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MiscSubclass specification 0.9, the structure name is EFI_MISC_BATTERY_LOCATION_DATA.\r
+/// Also, the name and the order of the fields vary with specifications.\r
+/// Keep it unchanged for backward compatibilty.\r
+///\r
+typedef struct {\r
+ STRING_REF Location;\r
+ STRING_REF Manufacturer;\r
+ STRING_REF ManufactureDate;\r
+ STRING_REF SerialNumber;\r
+ STRING_REF DeviceName;\r
+ EFI_MISC_PORTABLE_BATTERY_DEVICE_CHEMISTRY \r
+ DeviceChemistry;\r
+ UINT16 DesignCapacity;\r
+ UINT16 DesignVoltage;\r
+ STRING_REF SBDSVersionNumber;\r
+ UINT8 MaximumError;\r
+ UINT16 SBDSSerialNumber;\r
+ UINT16 SBDSManufactureDate;\r
+ STRING_REF SBDSDeviceChemistry;\r
+ UINT8 DesignCapacityMultiplier;\r
+ UINT32 OEMSpecific; \r
+ UINT8 BatteryNumber; // Temporary \r
+ BOOLEAN Valid; // Is entry valid - Temporary\r
+} EFI_MISC_PORTABLE_BATTERY;\r
+\r
+\r
+//\r
+// Misc. Reset Capabilities - SMBIOS Type 23\r
+//\r
+#define EFI_MISC_RESET_CAPABILITIES_RECORD_NUMBER 0x00000011\r
+\r
+typedef struct {\r
+ UINT32 Status :1;\r
+ UINT32 BootOption :2;\r
+ UINT32 BootOptionOnLimit :2;\r
+ UINT32 WatchdogTimerPresent:1;\r
+ UINT32 Reserved :26;\r
+} EFI_MISC_RESET_CAPABILITIES_TYPE;\r
+\r
+typedef struct {\r
+ EFI_MISC_RESET_CAPABILITIES_TYPE ResetCapabilities;\r
+ UINT16 ResetCount;\r
+ UINT16 ResetLimit;\r
+ UINT16 ResetTimerInterval;\r
+ UINT16 ResetTimeout;\r
+} EFI_MISC_RESET_CAPABILITIES;\r
+\r
+typedef struct {\r
+ EFI_MISC_RESET_CAPABILITIES ResetCapabilities;\r
+ UINT16 ResetCount;\r
+ UINT16 ResetLimit;\r
+ UINT16 ResetTimerInterval;\r
+ UINT16 ResetTimeout;\r
+} EFI_MISC_RESET_CAPABILITIES_DATA;\r
+\r
+//\r
+// Misc. Hardware Security - SMBIOS Type 24\r
+//\r
+#define EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA_RECORD_NUMBER 0x00000012\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// The MiscSubclass specification 0.9 only mentions the possible value of each field in\r
+/// EFI_MISC_HARDWARE_SECURITY_SETTINGS. \r
+/// It's implementation-specific in order to to simplify the code logic.\r
+///\r
+typedef enum {\r
+ EfiHardwareSecurityStatusDisabled = 0,\r
+ EfiHardwareSecurityStatusEnabled = 1,\r
+ EfiHardwareSecurityStatusNotImplemented = 2,\r
+ EfiHardwareSecurityStatusUnknown = 3\r
+} EFI_MISC_HARDWARE_SECURITY_STATUS;\r
+\r
+typedef struct {\r
+ UINT32 FrontPanelResetStatus :2;\r
+ UINT32 AdministratorPasswordStatus :2;\r
+ UINT32 KeyboardPasswordStatus :2;\r
+ UINT32 PowerOnPasswordStatus :2;\r
+ UINT32 Reserved :24;\r
+} EFI_MISC_HARDWARE_SECURITY_SETTINGS;\r
+\r
+typedef struct {\r
+ EFI_MISC_HARDWARE_SECURITY_SETTINGS HardwareSecuritySettings;\r
+} EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA;\r
+\r
+//\r
+// System Power Controls - SMBIOS Type 25\r
+//\r
+#define EFI_MISC_SCHEDULED_POWER_ON_MONTH_RECORD_NUMBER 0x00000013\r
+\r
+typedef struct {\r
+ UINT16 ScheduledPoweronMonth;\r
+ UINT16 ScheduledPoweronDayOfMonth;\r
+ UINT16 ScheduledPoweronHour;\r
+ UINT16 ScheduledPoweronMinute;\r
+ UINT16 ScheduledPoweronSecond;\r
+} EFI_MISC_SCHEDULED_POWER_ON_MONTH_DATA;\r
+\r
+//\r
+// Voltage Probe - SMBIOS Type 26\r
+//\r
+#define EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000014\r
+\r
+typedef struct {\r
+ UINT32 VoltageProbeSite :5;\r
+ UINT32 VoltageProbeStatus :3;\r
+ UINT32 Reserved :24;\r
+} EFI_MISC_VOLTAGE_PROBE_LOCATION;\r
+\r
+typedef struct {\r
+ STRING_REF VoltageProbeDescription;\r
+ EFI_MISC_VOLTAGE_PROBE_LOCATION VoltageProbeLocation;\r
+ EFI_EXP_BASE10_DATA VoltageProbeMaximumValue;\r
+ EFI_EXP_BASE10_DATA VoltageProbeMinimumValue;\r
+ EFI_EXP_BASE10_DATA VoltageProbeResolution;\r
+ EFI_EXP_BASE10_DATA VoltageProbeTolerance;\r
+ EFI_EXP_BASE10_DATA VoltageProbeAccuracy;\r
+ EFI_EXP_BASE10_DATA VoltageProbeNominalValue;\r
+ EFI_EXP_BASE10_DATA MDLowerNoncriticalThreshold;\r
+ EFI_EXP_BASE10_DATA MDUpperNoncriticalThreshold;\r
+ EFI_EXP_BASE10_DATA MDLowerCriticalThreshold;\r
+ EFI_EXP_BASE10_DATA MDUpperCriticalThreshold;\r
+ EFI_EXP_BASE10_DATA MDLowerNonrecoverableThreshold;\r
+ EFI_EXP_BASE10_DATA MDUpperNonrecoverableThreshold;\r
+ UINT32 VoltageProbeOemDefined;\r
+} EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_DATA;\r
+\r
+//\r
+// Cooling Device - SMBIOS Type 27\r
+//\r
+#define EFI_MISC_COOLING_DEVICE_TEMP_LINK_RECORD_NUMBER 0x00000015\r
+\r
+typedef struct {\r
+ UINT32 CoolingDevice :5;\r
+ UINT32 CoolingDeviceStatus :3;\r
+ UINT32 Reserved :24;\r
+} EFI_MISC_COOLING_DEVICE_TYPE;\r
+\r
+typedef struct {\r
+ EFI_MISC_COOLING_DEVICE_TYPE CoolingDeviceType;\r
+ EFI_INTER_LINK_DATA CoolingDeviceTemperatureLink;\r
+ UINT8 CoolingDeviceUnitGroup;\r
+ UINT16 CoolingDeviceNominalSpeed;\r
+ UINT32 CoolingDeviceOemDefined;\r
+} EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA;\r
+\r
+//\r
+// Temperature Probe - SMBIOS Type 28\r
+//\r
+#define EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000016\r
+\r
+typedef struct {\r
+ UINT32 TemperatureProbeSite :5;\r
+ UINT32 TemperatureProbeStatus :3;\r
+ UINT32 Reserved :24;\r
+} EFI_MISC_TEMPERATURE_PROBE_LOCATION;\r
+\r
+typedef struct {\r
+ STRING_REF TemperatureProbeDescription;\r
+ EFI_MISC_TEMPERATURE_PROBE_LOCATION\r
+ TemperatureProbeLocation;\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// MiscSubclass 0.9 specification defines the fields type as EFI_EXP_BASE10_DATA.\r
+ /// In fact, they should be UINT16 type because they refer to 16bit width data.\r
+ /// Keeping this inconsistency for backward compatibility.\r
+ ///\r
+ UINT16 TemperatureProbeMaximumValue;\r
+ UINT16 TemperatureProbeMinimumValue;\r
+ UINT16 TemperatureProbeResolution;\r
+ UINT16 TemperatureProbeTolerance;\r
+ UINT16 TemperatureProbeAccuracy;\r
+ UINT16 TemperatureProbeNominalValue;\r
+ UINT16 MDLowerNoncriticalThreshold;\r
+ UINT16 MDUpperNoncriticalThreshold;\r
+ UINT16 MDLowerCriticalThreshold;\r
+ UINT16 MDUpperCriticalThreshold;\r
+ UINT16 MDLowerNonrecoverableThreshold;\r
+ UINT16 MDUpperNonrecoverableThreshold;\r
+ UINT32 TemperatureProbeOemDefined;\r
+} EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA;\r
+\r
+//\r
+// Electrical Current Probe - SMBIOS Type 29\r
+//\r
+\r
+#define EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000017\r
+\r
+typedef struct {\r
+ UINT32 ElectricalCurrentProbeSite :5;\r
+ UINT32 ElectricalCurrentProbeStatus :3;\r
+ UINT32 Reserved :24;\r
+} EFI_MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;\r
+\r
+typedef struct {\r
+ STRING_REF ElectricalCurrentProbeDescription;\r
+ EFI_MISC_ELECTRICAL_CURRENT_PROBE_LOCATION\r
+ ElectricalCurrentProbeLocation;\r
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeMaximumValue;\r
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeMinimumValue;\r
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeResolution;\r
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeTolerance;\r
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeAccuracy;\r
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeNominalValue;\r
+ EFI_EXP_BASE10_DATA MDLowerNoncriticalThreshold;\r
+ EFI_EXP_BASE10_DATA MDUpperNoncriticalThreshold;\r
+ EFI_EXP_BASE10_DATA MDLowerCriticalThreshold;\r
+ EFI_EXP_BASE10_DATA MDUpperCriticalThreshold;\r
+ EFI_EXP_BASE10_DATA MDLowerNonrecoverableThreshold;\r
+ EFI_EXP_BASE10_DATA MDUpperNonrecoverableThreshold;\r
+ UINT32 ElectricalCurrentProbeOemDefined;\r
+} EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_DATA;\r
+\r
+//\r
+// Out-of-Band Remote Access - SMBIOS Type 30\r
+//\r
+\r
+#define EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_RECORD_NUMBER 0x00000018\r
+\r
+typedef struct {\r
+ UINT32 InboundConnectionEnabled :1;\r
+ UINT32 OutboundConnectionEnabled :1;\r
+ UINT32 Reserved :30;\r
+} EFI_MISC_REMOTE_ACCESS_CONNECTIONS;\r
+\r
+typedef struct {\r
+ STRING_REF RemoteAccessManufacturerNameDescription;\r
+ EFI_MISC_REMOTE_ACCESS_CONNECTIONS RemoteAccessConnections;\r
+} EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_DATA;\r
+\r
+//\r
+// Misc. BIS Entry Point - SMBIOS Type 31\r
+//\r
+#define EFI_MISC_BIS_ENTRY_POINT_RECORD_NUMBER 0x00000019\r
+\r
+typedef struct {\r
+ EFI_PHYSICAL_ADDRESS BisEntryPoint;\r
+} EFI_MISC_BIS_ENTRY_POINT_DATA;\r
+\r
+//\r
+// Misc. Boot Information - SMBIOS Type 32\r
+//\r
+#define EFI_MISC_BOOT_INFORMATION_STATUS_RECORD_NUMBER 0x0000001A\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MiscSubclass specification 0.9, the structure name is EFI_MISC_BOOT_INFORMATION_STATUS_TYPE.\r
+/// Keep it unchanged for backward compatibilty.\r
+///\r
+typedef enum {\r
+ EfiBootInformationStatusNoError = 0x00,\r
+ EfiBootInformationStatusNoBootableMedia = 0x01,\r
+ EfiBootInformationStatusNormalOSFailedLoading = 0x02,\r
+ EfiBootInformationStatusFirmwareDetectedFailure = 0x03,\r
+ EfiBootInformationStatusOSDetectedFailure = 0x04,\r
+ EfiBootInformationStatusUserRequestedBoot = 0x05,\r
+ EfiBootInformationStatusSystemSecurityViolation = 0x06,\r
+ EfiBootInformationStatusPreviousRequestedImage = 0x07,\r
+ EfiBootInformationStatusWatchdogTimerExpired = 0x08,\r
+ EfiBootInformationStatusStartReserved = 0x09,\r
+ EfiBootInformationStatusStartOemSpecific = 0x80,\r
+ EfiBootInformationStatusStartProductSpecific = 0xC0\r
+} EFI_MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;\r
+\r
+typedef struct {\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// In MiscSubclass specification 0.9, the field name is EFI_MISC_BOOT_INFORMATION_STATUS_TYPE.\r
+ /// Keep it unchanged for backward compatibilty.\r
+ ///\r
+ EFI_MISC_BOOT_INFORMATION_STATUS_DATA_TYPE BootInformationStatus;\r
+ UINT8 BootInformationData[9];\r
+} EFI_MISC_BOOT_INFORMATION_STATUS_DATA;\r
+\r
+//\r
+// Management Device - SMBIOS Type 34\r
+//\r
+#define EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_RECORD_NUMBER 0x0000001B\r
+\r
+typedef enum {\r
+ EfiManagementDeviceTypeOther = 0x01,\r
+ EfiManagementDeviceTypeUnknown = 0x02,\r
+ EfiManagementDeviceTypeLm75 = 0x03,\r
+ EfiManagementDeviceTypeLm78 = 0x04,\r
+ EfiManagementDeviceTypeLm79 = 0x05,\r
+ EfiManagementDeviceTypeLm80 = 0x06,\r
+ EfiManagementDeviceTypeLm81 = 0x07,\r
+ EfiManagementDeviceTypeAdm9240 = 0x08,\r
+ EfiManagementDeviceTypeDs1780 = 0x09,\r
+ EfiManagementDeviceTypeMaxim1617 = 0x0A,\r
+ EfiManagementDeviceTypeGl518Sm = 0x0B,\r
+ EfiManagementDeviceTypeW83781D = 0x0C,\r
+ EfiManagementDeviceTypeHt82H791 = 0x0D\r
+} EFI_MISC_MANAGEMENT_DEVICE_TYPE;\r
+\r
+typedef enum {\r
+ EfiManagementDeviceAddressTypeOther = 1,\r
+ EfiManagementDeviceAddressTypeUnknown = 2,\r
+ EfiManagementDeviceAddressTypeIOPort = 3,\r
+ EfiManagementDeviceAddressTypeMemory = 4,\r
+ EfiManagementDeviceAddressTypeSmbus = 5\r
+} EFI_MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;\r
+\r
+typedef struct {\r
+ STRING_REF ManagementDeviceDescription;\r
+ EFI_MISC_MANAGEMENT_DEVICE_TYPE ManagementDeviceType;\r
+ UINTN ManagementDeviceAddress;\r
+ EFI_MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE\r
+ ManagementDeviceAddressType;\r
+} EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_DATA;\r
+\r
+//\r
+// Management Device Component - SMBIOS Type 35\r
+//\r
+\r
+#define EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_RECORD_NUMBER 0x0000001C\r
+\r
+typedef struct {\r
+ STRING_REF ManagementDeviceComponentDescription;\r
+ EFI_INTER_LINK_DATA ManagementDeviceLink;\r
+ EFI_INTER_LINK_DATA ManagementDeviceComponentLink;\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// In MiscSubclass specification 0.9, this field is NOT defined.\r
+ /// It's introduced for SmBios 2.6 specification type 35.\r
+ ///\r
+ EFI_INTER_LINK_DATA ManagementDeviceThresholdLink;\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// In MiscSubclass specification 0.9, this field is NOT defined.\r
+ /// It's implementation-specific to simplify the code logic.\r
+ ///\r
+ UINT8 ComponentType;\r
+} EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA;\r
+\r
+//\r
+// IPMI Data Record - SMBIOS Type 38\r
+//\r
+typedef enum {\r
+ EfiIpmiOther = 0,\r
+ EfiIpmiKcs = 1,\r
+ EfiIpmiSmic = 2,\r
+ EfiIpmiBt = 3\r
+} EFI_MISC_IPMI_INTERFACE_TYPE;\r
+\r
+typedef struct {\r
+ UINT16 IpmiSpecLeastSignificantDigit:4;\r
+ UINT16 IpmiSpecMostSignificantDigit: 4;\r
+ UINT16 Reserved: 8;\r
+} EFI_MISC_IPMI_SPECIFICATION_REVISION;\r
+\r
+typedef struct {\r
+ EFI_MISC_IPMI_INTERFACE_TYPE IpmiInterfaceType;\r
+ EFI_MISC_IPMI_SPECIFICATION_REVISION \r
+ IpmiSpecificationRevision;\r
+ UINT16 IpmiI2CSlaveAddress;\r
+ UINT16 IpmiNvDeviceAddress;\r
+ UINT64 IpmiBaseAddress;\r
+ EFI_DEVICE_PATH_PROTOCOL IpmiDevicePath;\r
+} EFI_MISC_IPMI_INTERFACE_TYPE_DATA;\r
+\r
+#define EFI_MISC_IPMI_INTERFACE_TYPE_RECORD_NUMBER 0x0000001D\r
+///\r
+/// The definition above is *NOT* defined in MiscSubclass specifications 0.9.\r
+/// It's defined for backward compatibility.\r
+///\r
+#define EFI_MISC_IPMI_INTERFACE_TYPE_DATA_RECORD_NUMBER EFI_MISC_IPMI_INTERFACE_TYPE_RECORD_NUMBER\r
+\r
+///\r
+/// System Power supply Record - SMBIOS Type 39\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MiscSubclass specification 0.9, the type of all fields are UINT32.\r
+/// Keep it unchanged for backward compatibilty.\r
+///\r
+typedef struct {\r
+ UINT16 PowerSupplyHotReplaceable:1;\r
+ UINT16 PowerSupplyPresent :1;\r
+ UINT16 PowerSupplyUnplugged :1;\r
+ UINT16 InputVoltageRangeSwitch :4;\r
+ UINT16 PowerSupplyStatus :3;\r
+ UINT16 PowerSupplyType :4;\r
+ UINT16 Reserved :2;\r
+} EFI_MISC_POWER_SUPPLY_CHARACTERISTICS;\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MiscSubclass specification 0.9, the structure name is EFI_MISC_POWER_SUPPLY_UNIT_GROUP_DATA.\r
+/// Keep it unchanged for backward compatibilty.\r
+///\r
+typedef struct {\r
+ UINT16 PowerUnitGroup;\r
+ STRING_REF PowerSupplyLocation;\r
+ STRING_REF PowerSupplyDeviceName;\r
+ STRING_REF PowerSupplyManufacturer;\r
+ STRING_REF PowerSupplySerialNumber;\r
+ STRING_REF PowerSupplyAssetTagNumber;\r
+ STRING_REF PowerSupplyModelPartNumber;\r
+ STRING_REF PowerSupplyRevisionLevel;\r
+ UINT16 PowerSupplyMaxPowerCapacity;\r
+ EFI_MISC_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;\r
+ EFI_INTER_LINK_DATA PowerSupplyInputVoltageProbeLink;\r
+ EFI_INTER_LINK_DATA PowerSupplyCoolingDeviceLink;\r
+ EFI_INTER_LINK_DATA PowerSupplyInputCurrentProbeLink;\r
+} EFI_MISC_SYSTEM_POWER_SUPPLY_DATA;\r
+\r
+#define EFI_MISC_SYSTEM_POWER_SUPPLY_RECORD_NUMBER 0x0000001E\r
+\r
+///\r
+/// OEM Data Record - SMBIOS Type 0x80-0xFF\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MiscSubclass specification 0.9, the structure name is EFI_SMBIOS_STRUCTURE_HDR.\r
+/// Due to this, the structure is commonly used by vendors to construct SmBios type 0x80~0xFF table,\r
+/// Keep it unchanged for backward compatibilty.\r
+///\r
+typedef struct {\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT16 Handle;\r
+} SMBIOS_STRUCTURE_HDR;\r
+\r
+typedef struct {\r
+ ///\r
+ /// Inconsistent with specification here: \r
+ /// In MiscSubclass specification 0.9, the field name is EFI_SMBIOS_STRUCTURE_HDR.\r
+ /// Keep it unchanged for backward compatibilty.\r
+ ///\r
+ SMBIOS_STRUCTURE_HDR Header;\r
+ UINT8 RawData[1];\r
+} EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA;\r
+\r
+#define EFI_MISC_SMBIOS_STRUCT_ENCAP_RECORD_NUMBER 0x0000001F\r
+\r
+///\r
+/// Misc. System Event Log - SMBIOS Type 15\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MiscSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 specification type 15.\r
+///\r
+#define EFI_MISC_SYSTEM_EVENT_LOG_RECORD_NUMBER 0x00000020\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MiscSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 specification type 15.\r
+///\r
+typedef struct {\r
+ UINT16 LogAreaLength;\r
+ UINT16 LogHeaderStartOffset;\r
+ UINT16 LogDataStartOffset;\r
+ UINT8 AccessMethod;\r
+ UINT8 LogStatus;\r
+ UINT32 LogChangeToken;\r
+ UINT32 AccessMethodAddress;\r
+ UINT8 LogHeaderFormat;\r
+ UINT8 NumberOfSupportedLogType;\r
+ UINT8 LengthOfLogDescriptor;\r
+} EFI_MISC_SYSTEM_EVENT_LOG_DATA;\r
+\r
+//\r
+// Access Method.\r
+// 0x00~0x04: as following definition\r
+// 0x05~0x7f: Available for future assignment.\r
+// 0x80~0xff: BIOS Vendor/OEM-specific.\r
+// \r
+#define ACCESS_INDEXIO_1INDEX8BIT_DATA8BIT 0x00\r
+#define ACCESS_INDEXIO_2INDEX8BIT_DATA8BIT 0X01\r
+#define ACCESS_INDEXIO_1INDEX16BIT_DATA8BIT 0X02\r
+#define ACCESS_MEMORY_MAPPED 0x03\r
+#define ACCESS_GPNV 0x04\r
+\r
+///\r
+/// Management Device Threshold Data Record - SMBIOS Type 36\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MiscSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 specification type 36.\r
+///\r
+#define EFI_MISC_MANAGEMENT_DEVICE_THRESHOLD_RECORD_NUMBER 0x00000021\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MiscSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It's introduced for SmBios 2.6 specification type 36.\r
+///\r
+typedef struct {\r
+ UINT16 LowerThresNonCritical;\r
+ UINT16 UpperThresNonCritical;\r
+ UINT16 LowerThresCritical;\r
+ UINT16 UpperThresCritical;\r
+ UINT16 LowerThresNonRecover;\r
+ UINT16 UpperThresNonRecover;\r
+} EFI_MISC_MANAGEMENT_DEVICE_THRESHOLD;\r
+\r
+//\r
+// Declare the following strutures alias to use them more conviniently.\r
+//\r
+typedef EFI_MISC_LAST_PCI_BUS_DATA EFI_MISC_LAST_PCI_BUS;\r
+typedef EFI_MISC_BIOS_VENDOR_DATA EFI_MISC_BIOS_VENDOR;\r
+typedef EFI_MISC_SYSTEM_MANUFACTURER_DATA EFI_MISC_SYSTEM_MANUFACTURER;\r
+typedef EFI_MISC_BASE_BOARD_MANUFACTURER_DATA EFI_MISC_BASE_BOARD_MANUFACTURER;\r
+typedef EFI_MISC_CHASSIS_MANUFACTURER_DATA EFI_MISC_CHASSIS_MANUFACTURER;\r
+typedef EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR;\r
+typedef EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA EFI_MISC_SYSTEM_SLOT_DESIGNATION;\r
+typedef EFI_MISC_ONBOARD_DEVICE_DATA EFI_MISC_ONBOARD_DEVICE;\r
+typedef EFI_MISC_POINTING_DEVICE_TYPE_DATA EFI_MISC_ONBOARD_DEVICE_TYPE_DATA;\r
+typedef EFI_MISC_OEM_STRING_DATA EFI_MISC_OEM_STRING;\r
+typedef EFI_MISC_SYSTEM_OPTION_STRING_DATA EFI_MISC_SYSTEM_OPTION_STRING;\r
+typedef EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES;\r
+typedef EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA EFI_MISC_SYSTEM_LANGUAGE_STRING;\r
+typedef EFI_MISC_SYSTEM_EVENT_LOG_DATA EFI_MISC_SYSTEM_EVENT_LOG;\r
+typedef EFI_MISC_BIS_ENTRY_POINT_DATA EFI_MISC_BIS_ENTRY_POINT;\r
+typedef EFI_MISC_BOOT_INFORMATION_STATUS_DATA EFI_MISC_BOOT_INFORMATION_STATUS;\r
+typedef EFI_MISC_SYSTEM_POWER_SUPPLY_DATA EFI_MISC_SYSTEM_POWER_SUPPLY;\r
+typedef EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION;\r
+typedef EFI_MISC_SCHEDULED_POWER_ON_MONTH_DATA EFI_MISC_SCHEDULED_POWER_ON_MONTH;\r
+typedef EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_DATA EFI_MISC_VOLTAGE_PROBE_DESCRIPTION;\r
+typedef EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA EFI_MISC_COOLING_DEVICE_TEMP_LINK;\r
+typedef EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION;\r
+typedef EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_DATA \r
+ EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION;\r
+typedef EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_DATA EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION;\r
+typedef EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_DATA EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION;\r
+typedef EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA\r
+ EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION;\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It is implementation-specific to simplify the code logic.\r
+///\r
+typedef union {\r
+ EFI_MISC_LAST_PCI_BUS_DATA LastPciBus;\r
+ EFI_MISC_BIOS_VENDOR_DATA MiscBiosVendor;\r
+ EFI_MISC_SYSTEM_MANUFACTURER_DATA MiscSystemManufacturer;\r
+ EFI_MISC_BASE_BOARD_MANUFACTURER_DATA MiscBaseBoardManufacturer;\r
+ EFI_MISC_CHASSIS_MANUFACTURER_DATA MiscChassisManufacturer;\r
+ EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA MiscPortInternalConnectorDesignator;\r
+ EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA MiscSystemSlotDesignation;\r
+ EFI_MISC_ONBOARD_DEVICE_DATA MiscOnboardDevice;\r
+ EFI_MISC_OEM_STRING_DATA MiscOemString;\r
+ EFI_MISC_SYSTEM_OPTION_STRING_DATA MiscOptionString;\r
+ EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA NumberOfInstallableLanguages;\r
+ EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA MiscSystemLanguageString;\r
+ EFI_MISC_SYSTEM_EVENT_LOG_DATA MiscSystemEventLog;\r
+ EFI_MISC_GROUP_NAME_DATA MiscGroupNameData;\r
+ EFI_MISC_GROUP_ITEM_SET_DATA MiscGroupItemSetData;\r
+ EFI_MISC_POINTING_DEVICE_TYPE_DATA MiscPointingDeviceTypeData;\r
+ EFI_MISC_RESET_CAPABILITIES_DATA MiscResetCapablilitiesData;\r
+ EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA MiscHardwareSecuritySettingsData;\r
+ EFI_MISC_SCHEDULED_POWER_ON_MONTH_DATA MiscScheduledPowerOnMonthData;\r
+ EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_DATA MiscVoltagePorbeDescriptionData;\r
+ EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA MiscCoolingDeviceTempLinkData;\r
+ EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA MiscTemperatureProbeDescriptionData;\r
+ EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_DATA MiscElectricalCurrentProbeDescriptionData;\r
+ EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_DATA\r
+ MiscRemoteAccessManufacturerDescriptionData;\r
+ EFI_MISC_BIS_ENTRY_POINT_DATA MiscBisEntryPoint;\r
+ EFI_MISC_BOOT_INFORMATION_STATUS_DATA MiscBootInformationStatus;\r
+ EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_DATA MiscMangementDeviceDescriptionData;\r
+ EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA\r
+ MiscmangementDeviceComponentDescriptionData;\r
+ EFI_MISC_IPMI_INTERFACE_TYPE_DATA MiscIpmiInterfaceTypeData;\r
+ EFI_MISC_SYSTEM_POWER_SUPPLY_DATA MiscPowerSupplyInfo;\r
+ EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA MiscSmbiosStructEncapsulation;\r
+ EFI_MISC_MANAGEMENT_DEVICE_THRESHOLD MiscManagementDeviceThreshold;\r
+} EFI_MISC_SUBCLASS_RECORDS;\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
+/// It is implementation-specific to simplify the code logic.\r
+///\r
+typedef struct {\r
+ EFI_SUBCLASS_TYPE1_HEADER Header;\r
+ EFI_MISC_SUBCLASS_RECORDS Record;\r
+} EFI_MISC_SUBCLASS_DRIVER_DATA;\r
+#pragma pack()\r
+\r
+///\r
+/// Inconsistent with specification here: \r
+/// In DataHubSubclass specification 0.9 page 16, the following symbol is NOT defined.\r
+/// But value is meaningful, 0 means Reserved.\r
+///\r
+#define EFI_SUBCLASS_INSTANCE_RESERVED 0\r
+///\r
+/// Inconsistent with specification here: \r
+/// In DataHubSubclass specification 0.9 page 16, the following symbol is NOT defined.\r
+/// But value is meaningful, -1 means Not Applicable.\r
+///\r
+#define EFI_SUBCLASS_INSTANCE_NON_APPLICABLE 0xFFFF\r
+\r
#endif\r
projects / mirror_edk2.git / blobdiff