/** @file\r
The EFI Legacy BIOS Protocol is used to abstract legacy Option ROM usage\r
- under EFI and Legacy OS boot.\r
+ under EFI and Legacy OS boot. This file also includes all the related\r
+ COMPATIBILIY16 structures and defintions.\r
\r
Note: The names for EFI_IA32_REGISTER_SET elements were picked to follow\r
well known naming conventions.\r
\r
- Thunk - A thunk is a transition from one processor mode to another. A Thunk\r
- is a transition from native EFI mode to 16-bit mode. A reverse thunk\r
- would be a transition from 16-bit mode to native EFI mode.\r
+ Thunk is the code that switches from 32-bit protected environment into the 16-bit real-mode\r
+ environment. Reverse thunk is the code that does the opposite.\r
\r
- You most likely should not use this protocol! Find the EFI way to solve the\r
- problem to make your code portable\r
-\r
- Copyright (c) 2007, Intel Corporation\r
- All rights reserved. This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
- Module Name: LegacyBios.h\r
+Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials are licensed and made available under \r
+the terms and conditions of the BSD License that accompanies this distribution. \r
+The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php. \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
@par Revision Reference:\r
This protocol is defined in Framework for EFI Compatibility Support Module spec\r
- Version 0.97.\r
+ Version 0.98.\r
\r
**/\r
\r
#ifndef _EFI_LEGACY_BIOS_H_\r
#define _EFI_LEGACY_BIOS_H_\r
\r
-#include <FrameworkDxe.h>\r
+///\r
+/// \r
+///\r
+#pragma pack(1)\r
+\r
+typedef UINT8 SERIAL_MODE;\r
+typedef UINT8 PARALLEL_MODE;\r
+\r
+#define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$')\r
+\r
+///\r
+/// There is a table located within the traditional BIOS in either the 0xF000:xxxx or 0xE000:xxxx\r
+/// physical address range. It is located on a 16-byte boundary and provides the physical address of the\r
+/// entry point for the Compatibility16 functions. These functions provide the platform-specific\r
+/// information that is required by the generic EfiCompatibility code. The functions are invoked via\r
+/// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit physical\r
+/// entry point.\r
+///\r
+typedef struct {\r
+ ///\r
+ /// The string "$EFI" denotes the start of the EfiCompatibility table. Byte 0 is "I," byte\r
+ /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.\r
+ ///\r
+ UINT32 Signature;\r
+ \r
+ ///\r
+ /// The value required such that byte checksum of TableLength equals zero.\r
+ ///\r
+ UINT8 TableChecksum;\r
+ \r
+ ///\r
+ /// The length of this table.\r
+ ///\r
+ UINT8 TableLength;\r
+ \r
+ ///\r
+ /// The major EFI revision for which this table was generated.\r
+ /// \r
+ UINT8 EfiMajorRevision;\r
+ \r
+ ///\r
+ /// The minor EFI revision for which this table was generated.\r
+ ///\r
+ UINT8 EfiMinorRevision;\r
+ \r
+ ///\r
+ /// The major revision of this table.\r
+ ///\r
+ UINT8 TableMajorRevision;\r
+ \r
+ ///\r
+ /// The minor revision of this table.\r
+ ///\r
+ UINT8 TableMinorRevision;\r
+ \r
+ ///\r
+ /// Reserved for future usage.\r
+ ///\r
+ UINT16 Reserved;\r
+ \r
+ ///\r
+ /// The segment of the entry point within the traditional BIOS for Compatibility16 functions.\r
+ ///\r
+ UINT16 Compatibility16CallSegment;\r
+ \r
+ ///\r
+ /// The offset of the entry point within the traditional BIOS for Compatibility16 functions.\r
+ ///\r
+ UINT16 Compatibility16CallOffset;\r
+ \r
+ ///\r
+ /// The segment of the entry point within the traditional BIOS for EfiCompatibility \r
+ /// to invoke the PnP installation check.\r
+ ///\r
+ UINT16 PnPInstallationCheckSegment;\r
+ \r
+ ///\r
+ /// The Offset of the entry point within the traditional BIOS for EfiCompatibility \r
+ /// to invoke the PnP installation check.\r
+ ///\r
+ UINT16 PnPInstallationCheckOffset;\r
+ \r
+ ///\r
+ /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform \r
+ ///Innovation Framework for EFI Driver Execution Environment Core Interface Specification (DXE CIS).\r
+ ///\r
+ UINT32 EfiSystemTable; \r
+ \r
+ ///\r
+ /// The address of an OEM-provided identifier string. The string is null terminated.\r
+ ///\r
+ UINT32 OemIdStringPointer;\r
+ \r
+ ///\r
+ /// The 32-bit physical address where ACPI RSD PTR is stored within the traditional\r
+ /// BIOS. The remained of the ACPI tables are located at their EFI addresses. The size\r
+ /// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill in the ACPI\r
+ /// RSD PTR with either the ACPI 1.0b or 2.0 values.\r
+ ///\r
+ UINT32 AcpiRsdPtrPointer;\r
+ \r
+ ///\r
+ /// The OEM revision number. Usage is undefined but provided for OEM module usage.\r
+ ///\r
+ UINT16 OemRevision;\r
+ \r
+ ///\r
+ /// The 32-bit physical address where INT15 E820 data is stored within the traditional\r
+ /// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the\r
+ /// data to the indicated area.\r
+ ///\r
+ UINT32 E820Pointer;\r
+ \r
+ ///\r
+ /// The length of the E820 data and is filled in by the EfiCompatibility code.\r
+ ///\r
+ UINT32 E820Length;\r
+ \r
+ ///\r
+ /// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.\r
+ /// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and\r
+ /// copy the data to the indicated area.\r
+ ///\r
+ UINT32 IrqRoutingTablePointer;\r
+ \r
+ ///\r
+ /// The length of the $PIR table and is filled in by the EfiCompatibility code.\r
+ ///\r
+ UINT32 IrqRoutingTableLength;\r
+ \r
+ ///\r
+ /// The 32-bit physical address where the MP table is stored in the traditional BIOS.\r
+ /// The EfiCompatibility code will fill in the MpTablePtr value and copy the data \r
+ /// to the indicated area.\r
+ ///\r
+ UINT32 MpTablePtr;\r
+ \r
+ ///\r
+ /// The length of the MP table and is filled in by the EfiCompatibility code.\r
+ ///\r
+ UINT32 MpTableLength;\r
+ \r
+ ///\r
+ /// The segment of the OEM-specific INT table/code.\r
+ /// \r
+ UINT16 OemIntSegment;\r
+ \r
+ ///\r
+ /// The offset of the OEM-specific INT table/code.\r
+ ///\r
+ UINT16 OemIntOffset;\r
+ \r
+ ///\r
+ /// The segment of the OEM-specific 32-bit table/code.\r
+ ///\r
+ UINT16 Oem32Segment;\r
+ \r
+ ///\r
+ /// The offset of the OEM-specific 32-bit table/code.\r
+ ///\r
+ UINT16 Oem32Offset;\r
+ \r
+ ///\r
+ /// The segment of the OEM-specific 16-bit table/code.\r
+ ///\r
+ UINT16 Oem16Segment;\r
+ \r
+ ///\r
+ /// The offset of the OEM-specific 16-bit table/code.\r
+ ///\r
+ UINT16 Oem16Offset;\r
+ \r
+ ///\r
+ /// The segment of the TPM binary passed to 16-bit CSM.\r
+ ///\r
+ UINT16 TpmSegment;\r
+ \r
+ ///\r
+ /// The offset of the TPM binary passed to 16-bit CSM.\r
+ ///\r
+ UINT16 TpmOffset;\r
+ \r
+ ///\r
+ /// A pointer to a string identifying the independent BIOS vendor.\r
+ ///\r
+ UINT32 IbvPointer;\r
+ \r
+ ///\r
+ /// This field is NULL for all systems not supporting PCI Express. This field is the base\r
+ /// value of the start of the PCI Express memory-mapped configuration registers and\r
+ /// must be filled in prior to EfiCompatibility code issuing the Compatibility16 function\r
+ /// Compatibility16InitializeYourself().\r
+ /// Compatibility16InitializeYourself() is defined in Compatability16\r
+ /// Functions.\r
+ ///\r
+ UINT32 PciExpressBase;\r
+ \r
+ ///\r
+ /// Maximum PCI bus number assigned.\r
+ ///\r
+ UINT8 LastPciBus;\r
+\r
+ ///\r
+ /// Start Address of Upper Memory Area (UMA) to be set as Read/Write. If\r
+ /// UmaAddress is a valid address in the shadow RAM, it also indicates that the region\r
+ /// from 0xC0000 to (UmaAddress - 1) can be used for Option ROM.\r
+ ///\r
+ UINT32 UmaAddress;\r
+\r
+ ///\r
+ /// Upper Memory Area size in bytes to be set as Read/Write. If zero, no UMA region\r
+ /// will be set as Read/Write (i.e. all Shadow RAM is set as Read-Only).\r
+ ///\r
+ UINT32 UmaSize;\r
+\r
+ ///\r
+ /// Start Address of high memory that can be used for permanent allocation. If zero,\r
+ /// high memory is not available for permanent allocation.\r
+ ///\r
+ UINT32 HiPermanentMemoryAddress;\r
+\r
+ ///\r
+ /// Size of high memory that can be used for permanent allocation in bytes. If zero,\r
+ /// high memory is not available for permanent allocation.\r
+ ///\r
+ UINT32 HiPermanentMemorySize;\r
+} EFI_COMPATIBILITY16_TABLE;\r
+\r
+///\r
+/// Functions provided by the CSM binary which communicate between the EfiCompatibility \r
+/// and Compatability16 code.\r
+///\r
+/// Inconsistent with the specification here: \r
+/// The member's name started with "Compatibility16" [defined in Intel Framework \r
+/// Compatibility Support Module Specification / 0.97 version] \r
+/// has been changed to "Legacy16" since keeping backward compatible.\r
+///\r
+typedef enum {\r
+ ///\r
+ /// Causes the Compatibility16 code to do any internal initialization required.\r
+ /// Input:\r
+ /// AX = Compatibility16InitializeYourself\r
+ /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_INIT_TABLE\r
+ /// Return:\r
+ /// AX = Return Status codes\r
+ ///\r
+ Legacy16InitializeYourself = 0x0000,\r
+ \r
+ ///\r
+ /// Causes the Compatibility16 BIOS to perform any drive number translations to match the boot sequence.\r
+ /// Input:\r
+ /// AX = Compatibility16UpdateBbs\r
+ /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE\r
+ /// Return:\r
+ /// AX = Returned status codes\r
+ ///\r
+ Legacy16UpdateBbs = 0x0001,\r
+ \r
+ ///\r
+ /// Allows the Compatibility16 code to perform any final actions before booting. The Compatibility16\r
+ /// code is read/write.\r
+ /// Input:\r
+ /// AX = Compatibility16PrepareToBoot\r
+ /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure \r
+ /// Return:\r
+ /// AX = Returned status codes\r
+ ///\r
+ Legacy16PrepareToBoot = 0x0002,\r
+ \r
+ ///\r
+ /// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is Read/Only.\r
+ /// Input:\r
+ /// AX = Compatibility16Boot\r
+ /// Output:\r
+ /// AX = Returned status codes\r
+ ///\r
+ Legacy16Boot = 0x0003,\r
+ \r
+ ///\r
+ /// Allows the Compatibility16 code to get the last device from which a boot was attempted. This is\r
+ /// stored in CMOS and is the priority number of the last attempted boot device.\r
+ /// Input:\r
+ /// AX = Compatibility16RetrieveLastBootDevice\r
+ /// Output:\r
+ /// AX = Returned status codes\r
+ /// BX = Priority number of the boot device.\r
+ ///\r
+ Legacy16RetrieveLastBootDevice = 0x0004,\r
+ \r
+ ///\r
+ /// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 after dispatching a legacy OpROM.\r
+ /// Input:\r
+ /// AX = Compatibility16DispatchOprom\r
+ /// ES:BX = Pointer to EFI_DISPATCH_OPROM_TABLE\r
+ /// Output:\r
+ /// AX = Returned status codes\r
+ /// BX = Number of non-BBS-compliant devices found. Equals 0 if BBS compliant.\r
+ ///\r
+ Legacy16DispatchOprom = 0x0005,\r
+ \r
+ ///\r
+ /// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified length and returns the address\r
+ /// of that region.\r
+ /// Input:\r
+ /// AX = Compatibility16GetTableAddress\r
+ /// BX = Allocation region\r
+ /// 00 = Allocate from either 0xE0000 or 0xF0000 64 KB blocks.\r
+ /// Bit 0 = 1 Allocate from 0xF0000 64 KB block\r
+ /// Bit 1 = 1 Allocate from 0xE0000 64 KB block\r
+ /// CX = Requested length in bytes.\r
+ /// DX = Required address alignment. Bit mapped. First non-zero bit from the right is the alignment.\r
+ /// Output:\r
+ /// AX = Returned status codes\r
+ /// DS:BX = Address of the region\r
+ ///\r
+ Legacy16GetTableAddress = 0x0006,\r
+ \r
+ ///\r
+ /// Enables the EfiCompatibility module to do any nonstandard processing of keyboard LEDs or state.\r
+ /// Input:\r
+ /// AX = Compatibility16SetKeyboardLeds\r
+ /// CL = LED status.\r
+ /// Bit 0 Scroll Lock 0 = Off\r
+ /// Bit 1 NumLock\r
+ /// Bit 2 Caps Lock\r
+ /// Output:\r
+ /// AX = Returned status codes\r
+ ///\r
+ Legacy16SetKeyboardLeds = 0x0007,\r
+ \r
+ ///\r
+ /// Enables the EfiCompatibility module to install an interrupt handler for PCI mass media devices that\r
+ /// do not have an OpROM associated with them. An example is SATA.\r
+ /// Input:\r
+ /// AX = Compatibility16InstallPciHandler\r
+ /// ES:BX = Pointer to EFI_LEGACY_INSTALL_PCI_HANDLER structure\r
+ /// Output:\r
+ /// AX = Returned status codes\r
+ ///\r
+ Legacy16InstallPciHandler = 0x0008\r
+} EFI_COMPATIBILITY_FUNCTIONS;\r
+\r
+\r
+///\r
+/// EFI_DISPATCH_OPROM_TABLE\r
+///\r
+typedef struct {\r
+ UINT16 PnPInstallationCheckSegment; ///< A pointer to the PnpInstallationCheck data structure.\r
+ UINT16 PnPInstallationCheckOffset; ///< A pointer to the PnpInstallationCheck data structure.\r
+ UINT16 OpromSegment; ///< The segment where the OpROM was placed. Offset is assumed to be 3.\r
+ UINT8 PciBus; ///< The PCI bus.\r
+ UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI function.\r
+ UINT8 NumberBbsEntries; ///< The number of valid BBS table entries upon entry and exit. The IBV code may\r
+ ///< increase this number, if BBS-compliant devices also hook INTs in order to force the\r
+ ///< OpROM BIOS Setup to be executed.\r
+ UINT32 BbsTablePointer; ///< A pointer to the BBS table.\r
+ UINT16 RuntimeSegment; ///< The segment where the OpROM can be relocated to. If this value is 0x0000, this\r
+ ///< means that the relocation of this run time code is not supported.\r
+ ///< Inconsistent with specification here: \r
+ ///< The member's name "OpromDestinationSegment" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version] \r
+ ///< has been changed to "RuntimeSegment" since keeping backward compatible.\r
+\r
+} EFI_DISPATCH_OPROM_TABLE;\r
+\r
+///\r
+/// EFI_TO_COMPATIBILITY16_INIT_TABLE\r
+///\r
+typedef struct {\r
+ ///\r
+ /// Starting address of memory under 1 MB. The ending address is assumed to be 640 KB or 0x9FFFF.\r
+ ///\r
+ UINT32 BiosLessThan1MB;\r
+ \r
+ ///\r
+ /// The starting address of the high memory block.\r
+ ///\r
+ UINT32 HiPmmMemory;\r
+ \r
+ ///\r
+ /// The length of high memory block.\r
+ ///\r
+ UINT32 HiPmmMemorySizeInBytes;\r
+ \r
+ ///\r
+ /// The segment of the reverse thunk call code.\r
+ ///\r
+ UINT16 ReverseThunkCallSegment;\r
+ \r
+ ///\r
+ /// The offset of the reverse thunk call code.\r
+ ///\r
+ UINT16 ReverseThunkCallOffset;\r
+ \r
+ ///\r
+ /// The number of E820 entries copied to the Compatibility16 BIOS.\r
+ ///\r
+ UINT32 NumberE820Entries;\r
+ \r
+ ///\r
+ /// The amount of usable memory above 1 MB, e.g., E820 type 1 memory.\r
+ ///\r
+ UINT32 OsMemoryAbove1Mb;\r
+ \r
+ ///\r
+ /// The start of thunk code in main memory. Memory cannot be used by BIOS or PMM.\r
+ ///\r
+ UINT32 ThunkStart;\r
+ \r
+ ///\r
+ /// The size of the thunk code.\r
+ ///\r
+ UINT32 ThunkSizeInBytes;\r
+ \r
+ ///\r
+ /// Starting address of memory under 1 MB.\r
+ ///\r
+ UINT32 LowPmmMemory;\r
+ \r
+ ///\r
+ /// The length of low Memory block.\r
+ ///\r
+ UINT32 LowPmmMemorySizeInBytes;\r
+} EFI_TO_COMPATIBILITY16_INIT_TABLE;\r
+\r
+///\r
+/// DEVICE_PRODUCER_SERIAL.\r
+///\r
+typedef struct {\r
+ UINT16 Address; ///< I/O address assigned to the serial port.\r
+ UINT8 Irq; ///< IRQ assigned to the serial port.\r
+ SERIAL_MODE Mode; ///< Mode of serial port. Values are defined below.\r
+} DEVICE_PRODUCER_SERIAL;\r
+\r
+///\r
+/// DEVICE_PRODUCER_SERIAL's modes.\r
+///@{\r
+#define DEVICE_SERIAL_MODE_NORMAL 0x00\r
+#define DEVICE_SERIAL_MODE_IRDA 0x01\r
+#define DEVICE_SERIAL_MODE_ASK_IR 0x02\r
+#define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00\r
+#define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10\r
+///@)\r
+\r
+///\r
+/// DEVICE_PRODUCER_PARALLEL.\r
+///\r
+typedef struct {\r
+ UINT16 Address; ///< I/O address assigned to the parallel port.\r
+ UINT8 Irq; ///< IRQ assigned to the parallel port.\r
+ UINT8 Dma; ///< DMA assigned to the parallel port.\r
+ PARALLEL_MODE Mode; ///< Mode of the parallel port. Values are defined below.\r
+} DEVICE_PRODUCER_PARALLEL;\r
+\r
+///\r
+/// DEVICE_PRODUCER_PARALLEL's modes.\r
+///@{\r
+#define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00\r
+#define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01\r
+#define DEVICE_PARALLEL_MODE_MODE_EPP 0x02\r
+#define DEVICE_PARALLEL_MODE_MODE_ECP 0x03\r
+///@}\r
+\r
+///\r
+/// DEVICE_PRODUCER_FLOPPY\r
+///\r
+typedef struct {\r
+ UINT16 Address; ///< I/O address assigned to the floppy.\r
+ UINT8 Irq; ///< IRQ assigned to the floppy.\r
+ UINT8 Dma; ///< DMA assigned to the floppy.\r
+ UINT8 NumberOfFloppy; ///< Number of floppies in the system.\r
+} DEVICE_PRODUCER_FLOPPY;\r
+\r
+///\r
+/// LEGACY_DEVICE_FLAGS\r
+///\r
+typedef struct {\r
+ UINT32 A20Kybd : 1; ///< A20 controller by keyboard controller.\r
+ UINT32 A20Port90 : 1; ///< A20 controlled by port 0x92.\r
+ UINT32 Reserved : 30; ///< Reserved for future usage.\r
+} LEGACY_DEVICE_FLAGS;\r
+\r
+///\r
+/// DEVICE_PRODUCER_DATA_HEADER\r
+///\r
+typedef struct {\r
+ DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial port x. Type DEVICE_PRODUCER_SERIAL is defined below.\r
+ DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel port x. Type DEVICE_PRODUCER_PARALLEL is defined below.\r
+ DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. Type DEVICE_PRODUCER_FLOPPY is defined below.\r
+ UINT8 MousePresent; ///< Flag to indicate if mouse is present.\r
+ LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boolean state information passed to CSM.\r
+} DEVICE_PRODUCER_DATA_HEADER;\r
+\r
+///\r
+/// ATAPI_IDENTIFY\r
+///\r
+typedef struct {\r
+ UINT16 Raw[256]; ///< Raw data from the IDE IdentifyDrive command.\r
+} ATAPI_IDENTIFY;\r
+\r
+///\r
+/// HDD_INFO\r
+///\r
+typedef struct {\r
+ ///\r
+ /// Status of IDE device. Values are defined below. There is one HDD_INFO structure\r
+ /// per IDE controller. The IdentifyDrive is per drive. Index 0 is master and index\r
+ /// 1 is slave.\r
+ ///\r
+ UINT16 Status; \r
+ \r
+ ///\r
+ /// PCI bus of IDE controller.\r
+ ///\r
+ UINT32 Bus;\r
+ \r
+ ///\r
+ /// PCI device of IDE controller.\r
+ ///\r
+ UINT32 Device;\r
+ \r
+ ///\r
+ /// PCI function of IDE controller.\r
+ ///\r
+ UINT32 Function;\r
+ \r
+ ///\r
+ /// Command ports base address.\r
+ ///\r
+ UINT16 CommandBaseAddress;\r
+ \r
+ ///\r
+ /// Control ports base address.\r
+ ///\r
+ UINT16 ControlBaseAddress;\r
+ \r
+ ///\r
+ /// Bus master address.\r
+ ///\r
+ UINT16 BusMasterAddress;\r
+ \r
+ UINT8 HddIrq;\r
+ \r
+ ///\r
+ /// Data that identifies the drive data; one per possible attached drive.\r
+ ///\r
+ ATAPI_IDENTIFY IdentifyDrive[2];\r
+} HDD_INFO;\r
+\r
+///\r
+/// HDD_INFO status bits\r
+///\r
+#define HDD_PRIMARY 0x01\r
+#define HDD_SECONDARY 0x02\r
+#define HDD_MASTER_ATAPI_CDROM 0x04\r
+#define HDD_SLAVE_ATAPI_CDROM 0x08\r
+#define HDD_MASTER_IDE 0x20\r
+#define HDD_SLAVE_IDE 0x40\r
+#define HDD_MASTER_ATAPI_ZIPDISK 0x10\r
+#define HDD_SLAVE_ATAPI_ZIPDISK 0x80\r
+\r
+///\r
+/// BBS_STATUS_FLAGS;\.\r
+///\r
+typedef struct {\r
+ UINT16 OldPosition : 4; ///< Prior priority.\r
+ UINT16 Reserved1 : 4; ///< Reserved for future use.\r
+ UINT16 Enabled : 1; ///< If 0, ignore this entry.\r
+ UINT16 Failed : 1; ///< 0 = Not known if boot failure occurred.\r
+ ///< 1 = Boot attempted failed.\r
+ \r
+ ///\r
+ /// State of media present.\r
+ /// 00 = No bootable media is present in the device.\r
+ /// 01 = Unknown if a bootable media present.\r
+ /// 10 = Media is present and appears bootable.\r
+ /// 11 = Reserved.\r
+ ///\r
+ UINT16 MediaPresent : 2;\r
+ UINT16 Reserved2 : 4; ///< Reserved for future use.\r
+} BBS_STATUS_FLAGS;\r
+\r
+///\r
+/// BBS_TABLE, device type values & boot priority values.\r
+///\r
+typedef struct {\r
+ ///\r
+ /// The boot priority for this boot device. Values are defined below.\r
+ ///\r
+ UINT16 BootPriority;\r
+ \r
+ ///\r
+ /// The PCI bus for this boot device.\r
+ ///\r
+ UINT32 Bus;\r
+ \r
+ ///\r
+ /// The PCI device for this boot device.\r
+ ///\r
+ UINT32 Device;\r
+ \r
+ ///\r
+ /// The PCI function for the boot device.\r
+ ///\r
+ UINT32 Function;\r
+ \r
+ ///\r
+ /// The PCI class for this boot device.\r
+ ///\r
+ UINT8 Class;\r
+ \r
+ ///\r
+ /// The PCI Subclass for this boot device.\r
+ ///\r
+ UINT8 SubClass;\r
+ \r
+ ///\r
+ /// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r
+ ///\r
+ UINT16 MfgStringOffset;\r
+ \r
+ ///\r
+ /// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r
+ /// \r
+ UINT16 MfgStringSegment;\r
+ \r
+ ///\r
+ /// BBS device type. BBS device types are defined below.\r
+ ///\r
+ UINT16 DeviceType;\r
+ \r
+ ///\r
+ /// Status of this boot device. Type BBS_STATUS_FLAGS is defined below.\r
+ ///\r
+ BBS_STATUS_FLAGS StatusFlags;\r
+ \r
+ ///\r
+ /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r
+ /// BCV devices.\r
+ ///\r
+ UINT16 BootHandlerOffset;\r
+ \r
+ ///\r
+ /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r
+ /// BCV devices.\r
+ /// \r
+ UINT16 BootHandlerSegment;\r
+ \r
+ ///\r
+ /// Segment:offset address of an ASCIIZ description string describing this device.\r
+ ///\r
+ UINT16 DescStringOffset;\r
+\r
+ ///\r
+ /// Segment:offset address of an ASCIIZ description string describing this device.\r
+ ///\r
+ UINT16 DescStringSegment;\r
+ \r
+ ///\r
+ /// Reserved.\r
+ ///\r
+ UINT32 InitPerReserved;\r
+ \r
+ ///\r
+ /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
+ /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
+ /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
+ ///\r
+ UINT32 AdditionalIrq13Handler;\r
+ \r
+ ///\r
+ /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
+ /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
+ /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
+ /// \r
+ UINT32 AdditionalIrq18Handler;\r
+ \r
+ ///\r
+ /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
+ /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
+ /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
+ /// \r
+ UINT32 AdditionalIrq19Handler;\r
+ \r
+ ///\r
+ /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
+ /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
+ /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
+ /// \r
+ UINT32 AdditionalIrq40Handler;\r
+ UINT8 AssignedDriveNumber;\r
+ UINT32 AdditionalIrq41Handler;\r
+ UINT32 AdditionalIrq46Handler;\r
+ UINT32 IBV1;\r
+ UINT32 IBV2;\r
+} BBS_TABLE;\r
+\r
+///\r
+/// BBS device type values\r
+///@{\r
+#define BBS_FLOPPY 0x01\r
+#define BBS_HARDDISK 0x02\r
+#define BBS_CDROM 0x03\r
+#define BBS_PCMCIA 0x04\r
+#define BBS_USB 0x05\r
+#define BBS_EMBED_NETWORK 0x06\r
+#define BBS_BEV_DEVICE 0x80\r
+#define BBS_UNKNOWN 0xff\r
+///@}\r
+\r
+///\r
+/// BBS boot priority values\r
+///@{\r
+#define BBS_DO_NOT_BOOT_FROM 0xFFFC\r
+#define BBS_LOWEST_PRIORITY 0xFFFD\r
+#define BBS_UNPRIORITIZED_ENTRY 0xFFFE\r
+#define BBS_IGNORE_ENTRY 0xFFFF\r
+///@}\r
+\r
+///\r
+/// SMM_ATTRIBUTES\r
+///\r
+typedef struct {\r
+ ///\r
+ /// Access mechanism used to generate the soft SMI. Defined types are below. The other\r
+ /// values are reserved for future usage.\r
+ ///\r
+ UINT16 Type : 3;\r
+ \r
+ ///\r
+ /// The size of "port" in bits. Defined values are below.\r
+ ///\r
+ UINT16 PortGranularity : 3;\r
+ \r
+ ///\r
+ /// The size of data in bits. Defined values are below.\r
+ ///\r
+ UINT16 DataGranularity : 3;\r
+ \r
+ ///\r
+ /// Reserved for future use.\r
+ ///\r
+ UINT16 Reserved : 7;\r
+} SMM_ATTRIBUTES;\r
+\r
+///\r
+/// SMM_ATTRIBUTES type values.\r
+///@{\r
+#define STANDARD_IO 0x00\r
+#define STANDARD_MEMORY 0x01\r
+///@}\r
+\r
+///\r
+/// SMM_ATTRIBUTES port size constants.\r
+///@{\r
+#define PORT_SIZE_8 0x00\r
+#define PORT_SIZE_16 0x01\r
+#define PORT_SIZE_32 0x02\r
+#define PORT_SIZE_64 0x03\r
+///@}\r
+\r
+///\r
+/// SMM_ATTRIBUTES data size constants.\r
+///@{\r
+#define DATA_SIZE_8 0x00\r
+#define DATA_SIZE_16 0x01\r
+#define DATA_SIZE_32 0x02\r
+#define DATA_SIZE_64 0x03\r
+///@}\r
+\r
+///\r
+/// SMM_FUNCTION & relating constants.\r
+///\r
+typedef struct {\r
+ UINT16 Function : 15;\r
+ UINT16 Owner : 1;\r
+} SMM_FUNCTION;\r
+\r
+///\r
+/// SMM_FUNCTION Function constants.\r
+///@{\r
+#define INT15_D042 0x0000\r
+#define GET_USB_BOOT_INFO 0x0001\r
+#define DMI_PNP_50_57 0x0002\r
+///@}\r
+\r
+///\r
+/// SMM_FUNCTION Owner constants.\r
+///@{\r
+#define STANDARD_OWNER 0x0\r
+#define OEM_OWNER 0x1\r
+///@}\r
+\r
+///\r
+/// This structure assumes both port and data sizes are 1. SmmAttribute must be\r
+/// properly to reflect that assumption.\r
+///\r
+typedef struct {\r
+ ///\r
+ /// Describes the access mechanism, SmmPort, and SmmData sizes. Type\r
+ /// SMM_ATTRIBUTES is defined below.\r
+ ///\r
+ SMM_ATTRIBUTES SmmAttributes;\r
+ \r
+ ///\r
+ /// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below.\r
+ ///\r
+ SMM_FUNCTION SmmFunction;\r
+ \r
+ ///\r
+ /// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16 bytes.\r
+ ///\r
+ UINT8 SmmPort;\r
+ \r
+ ///\r
+ /// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16 bytes.\r
+ ///\r
+ UINT8 SmmData;\r
+} SMM_ENTRY;\r
+\r
+///\r
+/// SMM_TABLE\r
+///\r
+typedef struct {\r
+ UINT16 NumSmmEntries; ///< Number of entries represented by SmmEntry.\r
+ SMM_ENTRY SmmEntry; ///< One entry per function. Type SMM_ENTRY is defined below.\r
+} SMM_TABLE;\r
+\r
+///\r
+/// UDC_ATTRIBUTES\r
+///\r
+typedef struct {\r
+ ///\r
+ /// This bit set indicates that the ServiceAreaData is valid.\r
+ ///\r
+ UINT8 DirectoryServiceValidity : 1;\r
+ \r
+ ///\r
+ /// This bit set indicates to use the Reserve Area Boot Code Address (RACBA) only if\r
+ /// DirectoryServiceValidity is 0.\r
+ ///\r
+ UINT8 RabcaUsedFlag : 1;\r
+ \r
+ ///\r
+ /// This bit set indicates to execute hard disk diagnostics.\r
+ ///\r
+ UINT8 ExecuteHddDiagnosticsFlag : 1;\r
+ \r
+ ///\r
+ /// Reserved for future use. Set to 0.\r
+ ///\r
+ UINT8 Reserved : 5;\r
+} UDC_ATTRIBUTES;\r
+\r
+///\r
+/// UD_TABLE\r
+///\r
+typedef struct {\r
+ ///\r
+ /// This field contains the bit-mapped attributes of the PARTIES information. Type\r
+ /// UDC_ATTRIBUTES is defined below.\r
+ ///\r
+ UDC_ATTRIBUTES Attributes;\r
+ \r
+ ///\r
+ /// This field contains the zero-based device on which the selected\r
+ /// ServiceDataArea is present. It is 0 for master and 1 for the slave device. \r
+ ///\r
+ UINT8 DeviceNumber;\r
+ \r
+ ///\r
+ /// This field contains the zero-based index into the BbsTable for the parent device.\r
+ /// This index allows the user to reference the parent device information such as PCI\r
+ /// bus, device function.\r
+ ///\r
+ UINT8 BbsTableEntryNumberForParentDevice;\r
+ \r
+ ///\r
+ /// This field contains the zero-based index into the BbsTable for the boot entry.\r
+ ///\r
+ UINT8 BbsTableEntryNumberForBoot;\r
+ \r
+ ///\r
+ /// This field contains the zero-based index into the BbsTable for the HDD diagnostics entry.\r
+ ///\r
+ UINT8 BbsTableEntryNumberForHddDiag;\r
+ \r
+ ///\r
+ /// The raw Beer data.\r
+ ///\r
+ UINT8 BeerData[128];\r
+ \r
+ ///\r
+ /// The raw data of selected service area.\r
+ ///\r
+ UINT8 ServiceAreaData[64];\r
+} UD_TABLE;\r
+\r
+#define EFI_TO_LEGACY_MAJOR_VERSION 0x02\r
+#define EFI_TO_LEGACY_MINOR_VERSION 0x00\r
+#define MAX_IDE_CONTROLLER 8\r
+\r
+///\r
+/// EFI_TO_COMPATIBILITY16_BOOT_TABLE\r
+///\r
+typedef struct {\r
+ UINT16 MajorVersion; ///< The EfiCompatibility major version number.\r
+ UINT16 MinorVersion; ///< The EfiCompatibility minor version number.\r
+ UINT32 AcpiTable; ///< The location of the RSDT ACPI table. < 4G range.\r
+ UINT32 SmbiosTable; ///< The location of the SMBIOS table in EFI memory. < 4G range.\r
+ UINT32 SmbiosTableLength;\r
+ //\r
+ // Legacy SIO state\r
+ //\r
+ DEVICE_PRODUCER_DATA_HEADER SioData; ///< Standard traditional device information.\r
+ UINT16 DevicePathType; ///< The default boot type.\r
+ UINT16 PciIrqMask; ///< Mask of which IRQs have been assigned to PCI.\r
+ UINT32 NumberE820Entries; ///< Number of E820 entries. The number can change from the\r
+ ///< Compatibility16InitializeYourself() function.\r
+ //\r
+ // Controller & Drive Identify[2] per controller information\r
+ //\r
+ HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Hard disk drive information, including raw Identify Drive data.\r
+ UINT32 NumberBbsEntries; ///< Number of entries in the BBS table\r
+ UINT32 BbsTable; ///< A pointer to the BBS table. Type BBS_TABLE is defined below.\r
+ UINT32 SmmTable; ///< A pointer to the SMM table. Type SMM_TABLE is defined below.\r
+ UINT32 OsMemoryAbove1Mb; ///< The amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can\r
+ ///< differ from the value in EFI_TO_COMPATIBILITY16_INIT_TABLE as more\r
+ ///< memory may have been discovered.\r
+ UINT32 UnconventionalDeviceTable; ///< Information to boot off an unconventional device like a PARTIES partition. Type\r
+ ///< UD_TABLE is defined below.\r
+} EFI_TO_COMPATIBILITY16_BOOT_TABLE;\r
+\r
+///\r
+/// EFI_LEGACY_INSTALL_PCI_HANDLER\r
+///\r
+typedef struct {\r
+ UINT8 PciBus; ///< The PCI bus of the device.\r
+ UINT8 PciDeviceFun; ///< The PCI device in bits 7:3 and function in bits 2:0.\r
+ UINT8 PciSegment; ///< The PCI segment of the device.\r
+ UINT8 PciClass; ///< The PCI class code of the device.\r
+ UINT8 PciSubclass; ///< The PCI subclass code of the device.\r
+ UINT8 PciInterface; ///< The PCI interface code of the device.\r
+ //\r
+ // Primary section\r
+ //\r
+ UINT8 PrimaryIrq; ///< The primary device IRQ.\r
+ UINT8 PrimaryReserved; ///< Reserved.\r
+ UINT16 PrimaryControl; ///< The primary device control I/O base.\r
+ UINT16 PrimaryBase; ///< The primary device I/O base.\r
+ UINT16 PrimaryBusMaster; ///< The primary device bus master I/O base.\r
+ //\r
+ // Secondary Section\r
+ //\r
+ UINT8 SecondaryIrq; ///< The secondary device IRQ.\r
+ UINT8 SecondaryReserved; ///< Reserved.\r
+ UINT16 SecondaryControl; ///< The secondary device control I/O base.\r
+ UINT16 SecondaryBase; ///< The secondary device I/O base.\r
+ UINT16 SecondaryBusMaster; ///< The secondary device bus master I/O base.\r
+} EFI_LEGACY_INSTALL_PCI_HANDLER;\r
+\r
+//\r
+// Restore default pack value\r
+//\r
+#pragma pack()\r
\r
#define EFI_LEGACY_BIOS_PROTOCOL_GUID \\r
{ \\r
\r
typedef struct _EFI_LEGACY_BIOS_PROTOCOL EFI_LEGACY_BIOS_PROTOCOL;\r
\r
-//\r
-// Flags returned by CheckPciRom()\r
-//\r
+///\r
+/// Flags returned by CheckPciRom().\r
+///\r
#define NO_ROM 0x00\r
#define ROM_FOUND 0x01\r
#define VALID_LEGACY_ROM 0x02\r
-#define ROM_WITH_CONFIG 0x04 // Not defined in CSM Specification0.96\r
-\r
-//\r
-/// @bug These macros appear in no specifications and are kept for backward\r
-// compatibility only.\r
-// Convert from 32-bit address (_Adr) to Segment:Offset 16-bit form\r
-//\r
+#define ROM_WITH_CONFIG 0x04 ///< Not defined in the Framework CSM Specification.\r
+\r
+///\r
+/// The following macros do not appear in the Framework CSM Specification and \r
+/// are kept for backward compatibility only. They convert 32-bit address (_Adr) \r
+/// to Segment:Offset 16-bit form.\r
+///\r
+///@{\r
#define EFI_SEGMENT(_Adr) (UINT16) ((UINT16) (((UINTN) (_Adr)) >> 4) & 0xf000)\r
#define EFI_OFFSET(_Adr) (UINT16) (((UINT16) ((UINTN) (_Adr))) & 0xffff)\r
-#define BYTE_GRANULARITY 0x01\r
-#define WORD_GRANULARITY 0x02\r
-#define DWORD_GRANULARITY 0x04\r
-#define QWORD_GRANULARITY 0x08\r
-#define PARAGRAPH_GRANULARITY 0x10\r
+///@}\r
\r
#define CARRY_FLAG 0x01\r
\r
-//*********************************************************\r
-// EFI_EFLAGS_REG\r
-//*********************************************************\r
+///\r
+/// EFI_EFLAGS_REG\r
+///\r
typedef struct {\r
UINT32 CF:1;\r
UINT32 Reserved1:1;\r
UINT32 Reserved5:14;\r
} EFI_EFLAGS_REG;\r
\r
-//*********************************************************\r
-// EFI_DWORD_REGS\r
-//*********************************************************\r
-\r
+///\r
+/// EFI_DWORD_REGS\r
+///\r
typedef struct {\r
UINT32 EAX;\r
UINT32 EBX;\r
UINT32 ESP;\r
} EFI_DWORD_REGS;\r
\r
-//*******************************************\r
-// EFI_FLAGS_REG\r
-//*******************************************\r
+///\r
+/// EFI_FLAGS_REG\r
+///\r
typedef struct {\r
UINT16 CF:1;\r
UINT16 Reserved1:1;\r
UINT16 Reserved4:1;\r
} EFI_FLAGS_REG;\r
\r
-\r
-//*********************************************************\r
-// EFI_WORD_REGS\r
-//*********************************************************\r
-\r
+///\r
+/// EFI_WORD_REGS\r
+///\r
typedef struct {\r
UINT16 AX;\r
UINT16 ReservedAX;\r
UINT16 ReservedSP;\r
} EFI_WORD_REGS;\r
\r
-//*********************************************************\r
-// EFI_BYTE_REGS\r
-//*********************************************************\r
-\r
+///\r
+/// EFI_BYTE_REGS\r
+///\r
typedef struct {\r
UINT8 AL, AH;\r
UINT16 ReservedAX;\r
UINT16 ReservedDX;\r
} EFI_BYTE_REGS;\r
\r
+///\r
+/// EFI_IA32_REGISTER_SET\r
+///\r
typedef union {\r
EFI_DWORD_REGS E;\r
EFI_WORD_REGS X;\r
of BiosInt. Regs will contain the 16-bit register context on entry and\r
exit.\r
\r
- @param This Protocol instance pointer.\r
- @param BiosInt Processor interrupt vector to invoke\r
- @param Reg Register contexted passed into (and returned) from thunk to\r
- 16-bit mode\r
-\r
- @retval FALSE Thunk completed, and there were no BIOS errors in the target code.\r
- See Regs for status.\r
- @retval TRUE There was a BIOS erro in the target code.\r
+ @param[in] This The protocol instance pointer.\r
+ @param[in] BiosInt The processor interrupt vector to invoke.\r
+ @param[in,out] Reg Register contexted passed into (and returned) from thunk to\r
+ 16-bit mode.\r
\r
+ @retval TRUE Thunk completed with no BIOS errors in the target code. See Regs for status. \r
+ @retval FALSE There was a BIOS error in the target code.\r
**/\r
typedef\r
BOOLEAN\r
(EFIAPI *EFI_LEGACY_BIOS_INT86)(\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN UINT8 BiosInt,\r
- IN OUT EFI_IA32_REGISTER_SET *Regs\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN UINT8 BiosInt,\r
+ IN OUT EFI_IA32_REGISTER_SET *Regs\r
);\r
\r
/**\r
16-bit register context on entry and exit. Arguments can be passed on\r
the Stack argument\r
\r
- @param This Protocol instance pointer.\r
- @param Segment Segemnt of 16-bit mode call\r
- @param Offset Offset of 16-bit mdoe call\r
- @param Reg Register contexted passed into (and returned) from thunk to\r
- 16-bit mode\r
- @param Stack Caller allocated stack used to pass arguments\r
- @param StackSize Size of Stack in bytes\r
-\r
- @retval FALSE Thunk completed, and there were no BIOS errors in the target code.\r
- See Regs for status.\r
- @retval TRUE There was a BIOS erro in the target code.\r
+ @param[in] This The protocol instance pointer.\r
+ @param[in] Segment The segemnt of 16-bit mode call.\r
+ @param[in] Offset The offset of 16-bit mdoe call.\r
+ @param[in] Reg Register contexted passed into (and returned) from thunk to\r
+ 16-bit mode.\r
+ @param[in] Stack The caller allocated stack used to pass arguments.\r
+ @param[in] StackSize The size of Stack in bytes.\r
\r
+ @retval FALSE Thunk completed with no BIOS errors in the target code. See Regs for status. @retval TRUE There was a BIOS error in the target code.\r
**/\r
typedef\r
BOOLEAN\r
(EFIAPI *EFI_LEGACY_BIOS_FARCALL86)(\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN UINT16 Segment,\r
- IN UINT16 Offset,\r
- IN EFI_IA32_REGISTER_SET *Regs,\r
- IN VOID *Stack,\r
- IN UINTN StackSize\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN UINT16 Segment,\r
+ IN UINT16 Offset,\r
+ IN EFI_IA32_REGISTER_SET *Regs,\r
+ IN VOID *Stack,\r
+ IN UINTN StackSize\r
);\r
\r
/**\r
Test to see if a legacy PCI ROM exists for this device. Optionally return\r
the Legacy ROM instance for this PCI device.\r
\r
- @param This Protocol instance pointer.\r
- @param PciHandle The PCI PC-AT OPROM from this devices ROM BAR will be loaded\r
- @param RomImage Return the legacy PCI ROM for this device\r
- @param RomSize Size of ROM Image\r
- @param Flags Indicates if ROM found and if PC-AT.\r
+ @param[in] This The protocol instance pointer.\r
+ @param[in] PciHandle The PCI PC-AT OPROM from this devices ROM BAR will be loaded\r
+ @param[out] RomImage Return the legacy PCI ROM for this device.\r
+ @param[out] RomSize The size of ROM Image.\r
+ @param[out] Flags Indicates if ROM found and if PC-AT. Multiple bits can be set as follows:\r
+ - 00 = No ROM.\r
+ - 01 = ROM Found.\r
+ - 02 = ROM is a valid legacy ROM.\r
\r
- @retval EFI_SUCCESS Legacy Option ROM availible for this device\r
- @retval EFI_UNSUPPORTED Legacy Option ROM not supported.\r
+ @retval EFI_SUCCESS The Legacy Option ROM available for this device\r
+ @retval EFI_UNSUPPORTED The Legacy Option ROM is not supported.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_BIOS_CHECK_ROM)(\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN EFI_HANDLE PciHandle,\r
- OUT VOID **RomImage, OPTIONAL\r
- OUT UINTN *RomSize, OPTIONAL\r
- OUT UINTN *Flags\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN EFI_HANDLE PciHandle,\r
+ OUT VOID **RomImage, OPTIONAL\r
+ OUT UINTN *RomSize, OPTIONAL\r
+ OUT UINTN *Flags\r
);\r
\r
/**\r
about how many disks were added by the OPROM and the shadow address and\r
size. DiskStart & DiskEnd are INT 13h drive letters. Thus 0x80 is C:\r
\r
- @param This Protocol instance pointer.\r
- @param PciHandle The PCI PC-AT OPROM from this devices ROM BAR will be loaded.\r
- This value is NULL if RomImage is non-NULL. This is the normal\r
- case.\r
- @param RomImage A PCI PC-AT ROM image. This argument is non-NULL if there is\r
- no hardware associated with the ROM and thus no PciHandle,\r
- otherwise is must be NULL.\r
- Example is PXE base code.\r
- @param Flags Return Status if ROM was found and if was Legacy OPROM.\r
- @param DiskStart Disk number of first device hooked by the ROM. If DiskStart\r
- is the same as DiskEnd no disked were hooked.\r
- @param DiskEnd Disk number of the last device hooked by the ROM.\r
- @param RomShadowAddress Shadow address of PC-AT ROM\r
- @param RomShadowSize Size of RomShadowAddress in bytes\r
-\r
- @retval EFI_SUCCESS Thunk completed, see Regs for status.\r
- @retval EFI_INVALID_PARAMETER PciHandle not found\r
+ @param[in] This The protocol instance pointer.\r
+ @param[in] PciHandle The PCI PC-AT OPROM from this devices ROM BAR will be loaded.\r
+ This value is NULL if RomImage is non-NULL. This is the normal\r
+ case.\r
+ @param[in] RomImage A PCI PC-AT ROM image. This argument is non-NULL if there is\r
+ no hardware associated with the ROM and thus no PciHandle,\r
+ otherwise is must be NULL.\r
+ Example is PXE base code.\r
+ @param[out] Flags The type of ROM discovered. Multiple bits can be set, as follows:\r
+ - 00 = No ROM.\r
+ - 01 = ROM found.\r
+ - 02 = ROM is a valid legacy ROM.\r
+ @param[out] DiskStart The disk number of first device hooked by the ROM. If DiskStart\r
+ is the same as DiskEnd no disked were hooked.\r
+ @param[out] DiskEnd disk number of the last device hooked by the ROM.\r
+ @param[out] RomShadowAddress Shadow address of PC-AT ROM.\r
+ @param[out] RomShadowSize Size of RomShadowAddress in bytes.\r
+\r
+ @retval EFI_SUCCESS Thunk completed, see Regs for status.\r
+ @retval EFI_INVALID_PARAMETER PciHandle not found\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_BIOS_INSTALL_ROM)(\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN EFI_HANDLE PciHandle,\r
- IN VOID **RomImage,\r
- OUT UINTN *Flags,\r
- OUT UINT8 *DiskStart, OPTIONAL\r
- OUT UINT8 *DiskEnd, OPTIONAL\r
- OUT VOID **RomShadowAddress, OPTIONAL\r
- OUT UINT32 *ShadowedRomSize OPTIONAL\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN EFI_HANDLE PciHandle,\r
+ IN VOID **RomImage,\r
+ OUT UINTN *Flags,\r
+ OUT UINT8 *DiskStart, OPTIONAL\r
+ OUT UINT8 *DiskEnd, OPTIONAL\r
+ OUT VOID **RomShadowAddress, OPTIONAL\r
+ OUT UINT32 *ShadowedRomSize OPTIONAL\r
);\r
\r
/**\r
- Attempt to legacy boot the BootOption. If the EFI contexted has been\r
- compromised this function will not return.\r
-\r
- @param This Protocol instance pointer.\r
- @param BootOption EFI Device Path from BootXXXX variable.\r
- @param LoadOptionSize Size of LoadOption in size.\r
- @param LoadOption LoadOption from BootXXXX variable\r
-\r
- @retval EFI_SUCCESS Removable media not present\r
-\r
+ This function attempts to traditionally boot the specified BootOption. If the EFI context has\r
+ been compromised, this function will not return. This procedure is not used for loading an EFI-aware\r
+ OS off a traditional device. The following actions occur:\r
+ - Get EFI SMBIOS data structures, convert them to a traditional format, and copy to\r
+ Compatibility16.\r
+ - Get a pointer to ACPI data structures and copy the Compatibility16 RSD PTR to F0000 block.\r
+ - Find the traditional SMI handler from a firmware volume and register the traditional SMI\r
+ handler with the EFI SMI handler.\r
+ - Build onboard IDE information and pass this information to the Compatibility16 code.\r
+ - Make sure all PCI Interrupt Line registers are programmed to match 8259.\r
+ - Reconfigure SIO devices from EFI mode (polled) into traditional mode (interrupt driven).\r
+ - Shadow all PCI ROMs.\r
+ - Set up BDA and EBDA standard areas before the legacy boot.\r
+ - Construct the Compatibility16 boot memory map and pass it to the Compatibility16 code.\r
+ - Invoke the Compatibility16 table function Compatibility16PrepareToBoot(). This\r
+ invocation causes a thunk into the Compatibility16 code, which sets all appropriate internal\r
+ data structures. The boot device list is a parameter.\r
+ - Invoke the Compatibility16 Table function Compatibility16Boot(). This invocation\r
+ causes a thunk into the Compatibility16 code, which does an INT19.\r
+ - If the Compatibility16Boot() function returns, then the boot failed in a graceful\r
+ manner--meaning that the EFI code is still valid. An ungraceful boot failure causes a reset because the state\r
+ of EFI code is unknown.\r
+\r
+ @param[in] This The protocol instance pointer.\r
+ @param[in] BootOption The EFI Device Path from BootXXXX variable.\r
+ @param[in] LoadOptionSize The size of LoadOption in size.\r
+ @param[in] LoadOption LThe oadOption from BootXXXX variable.\r
+\r
+ @retval EFI_DEVICE_ERROR Failed to boot from any boot device and memory is uncorrupted. Note: This function normally does not returns. It will either boot the OS or reset the system if memory has been "corrupted" by loading a boot sector and passing control to it.\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_BIOS_BOOT)(\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN BBS_BBS_DEVICE_PATH *BootOption,\r
- IN UINT32 LoadOptionsSize,\r
- IN VOID *LoadOptions\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN BBS_BBS_DEVICE_PATH *BootOption,\r
+ IN UINT32 LoadOptionsSize,\r
+ IN VOID *LoadOptions\r
);\r
\r
/**\r
- Update BDA with current Scroll, Num & Cap lock LEDS\r
+ This function takes the Leds input parameter and sets/resets the BDA accordingly. \r
+ Leds is also passed to Compatibility16 code, in case any special processing is required. \r
+ This function is normally called from EFI Setup drivers that handle user-selectable\r
+ keyboard options such as boot with NUM LOCK on/off. This function does not\r
+ touch the keyboard or keyboard LEDs but only the BDA.\r
\r
- @param This Protocol instance pointer.\r
- @param Leds Status of current Scroll, Num & Cap lock LEDS\r
- Bit 0 is Scroll Lock 0 = Not locked\r
- Bit 1 is Num Lock\r
- Bit 2 is Caps Lock\r
+ @param[in] This The protocol instance pointer.\r
+ @param[in] Leds The status of current Scroll, Num & Cap lock LEDS:\r
+ - Bit 0 is Scroll Lock 0 = Not locked.\r
+ - Bit 1 is Num Lock.\r
+ - Bit 2 is Caps Lock.\r
\r
- @retval EFI_SUCCESS Removable media not present\r
+ @retval EFI_SUCCESS The BDA was updated successfully.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_BIOS_UPDATE_KEYBOARD_LED_STATUS)(\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN UINT8 Leds\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN UINT8 Leds\r
);\r
\r
/**\r
Retrieve legacy BBS info and assign boot priority.\r
\r
- @param This Protocol instance pointer.\r
- @param HddCount Number of HDD_INFO structures\r
- @param HddInfo Onboard IDE controller information\r
- @param BbsCount Number of BBS_TABLE structures\r
- @param BbsTable List BBS entries\r
+ @param[in] This The protocol instance pointer.\r
+ @param[out] HddCount The number of HDD_INFO structures.\r
+ @param[out] HddInfo Onboard IDE controller information.\r
+ @param[out] BbsCount The number of BBS_TABLE structures.\r
+ @param[in,out] BbsTable Points to List of BBS_TABLE.\r
\r
- @retval EFI_SUCCESS Tables returned\r
+ @retval EFI_SUCCESS Tables were returned.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_BIOS_GET_BBS_INFO)(\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- OUT UINT16 *HddCount,\r
- OUT HDD_INFO **HddInfo,\r
- OUT UINT16 *BbsCount,\r
- IN OUT BBS_TABLE **BbsTable\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ OUT UINT16 *HddCount,\r
+ OUT HDD_INFO **HddInfo,\r
+ OUT UINT16 *BbsCount,\r
+ IN OUT BBS_TABLE **BbsTable\r
);\r
\r
/**\r
Assign drive number to legacy HDD drives prior to booting an EFI\r
aware OS so the OS can access drives without an EFI driver.\r
\r
- @param This Protocol instance pointer.\r
- @param BbsCount Number of BBS_TABLE structures\r
- @param BbsTable List BBS entries\r
+ @param[in] This The protocol instance pointer.\r
+ @param[out] BbsCount The number of BBS_TABLE structures\r
+ @param[out] BbsTable List of BBS entries\r
\r
- @retval EFI_SUCCESS Drive numbers assigned\r
+ @retval EFI_SUCCESS Drive numbers assigned.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_BIOS_PREPARE_TO_BOOT_EFI)(\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- OUT UINT16 *BbsCount,\r
- OUT BBS_TABLE **BbsTable\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ OUT UINT16 *BbsCount,\r
+ OUT BBS_TABLE **BbsTable\r
);\r
\r
/**\r
To boot from an unconventional device like parties and/or execute\r
HDD diagnostics.\r
\r
- @param This Protocol instance pointer.\r
- @param Attributes How to interpret the other input parameters\r
- @param BbsEntry The 0-based index into the BbsTable for the parent\r
+ @param[in] This The protocol instance pointer.\r
+ @param[in] Attributes How to interpret the other input parameters.\r
+ @param[in] BbsEntry The 0-based index into the BbsTable for the parent\r
device.\r
- @param BeerData Pointer to the 128 bytes of ram BEER data.\r
- @param ServiceAreaData Pointer to the 64 bytes of raw Service Area data. The\r
+ @param[in] BeerData A pointer to the 128 bytes of ram BEER data.\r
+ @param[in] ServiceAreaData A pointer to the 64 bytes of raw Service Area data. The\r
caller must provide a pointer to the specific Service\r
Area and not the start all Service Areas.\r
\r
- EFI_INVALID_PARAMETER if error. Does NOT return if no error.\r
+ @retval EFI_INVALID_PARAMETER If error. Does NOT return if no error.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE)(\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN UDC_ATTRIBUTES Attributes,\r
- IN UINTN BbsEntry,\r
- IN VOID *BeerData,\r
- IN VOID *ServiceAreaData\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN UDC_ATTRIBUTES Attributes,\r
+ IN UINTN BbsEntry,\r
+ IN VOID *BeerData,\r
+ IN VOID *ServiceAreaData\r
);\r
\r
/**\r
Shadow all legacy16 OPROMs that haven't been shadowed.\r
Warning: Use this with caution. This routine disconnects all EFI\r
- drivers. If used externally then caller must re-connect EFI\r
+ drivers. If used externally, then the caller must re-connect EFI\r
drivers.\r
-\r
- @retval EFI_SUCCESS OPROMs shadowed\r
+ \r
+ @param[in] This The protocol instance pointer.\r
+ \r
+ @retval EFI_SUCCESS OPROMs were shadowed.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_BIOS_SHADOW_ALL_LEGACY_OPROMS)(\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This\r
);\r
\r
/**\r
Get a region from the LegacyBios for S3 usage.\r
\r
- @param This Protocol instance pointer.\r
- @param LegacyMemorySize Size of required region\r
- @param Region Region to use.\r
- 00 = Either 0xE0000 or 0xF0000 block\r
- Bit0 = 1 0xF0000 block\r
- Bit1 = 1 0xE0000 block\r
- @param Alignment Address alignment. Bit mapped. First non-zero\r
- bit from right is alignment.\r
- @param LegacyMemoryAddress Region Assigned\r
+ @param[in] This The protocol instance pointer.\r
+ @param[in] LegacyMemorySize The size of required region.\r
+ @param[in] Region The region to use.\r
+ 00 = Either 0xE0000 or 0xF0000 block.\r
+ - Bit0 = 1 0xF0000 block.\r
+ - Bit1 = 1 0xE0000 block.\r
+ @param[in] Alignment Address alignment. Bit mapped. The first non-zero\r
+ bit from right is alignment.\r
+ @param[out] LegacyMemoryAddress The Region Assigned\r
\r
- @retval EFI_SUCCESS Region assigned\r
- @retval Other Region not assigned\r
+ @retval EFI_SUCCESS The Region was assigned.\r
+ @retval EFI_ACCESS_DENIED The function was previously invoked.\r
+ @retval Other The Region was not assigned.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_BIOS_GET_LEGACY_REGION)(\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN UINTN LegacyMemorySize,\r
- IN UINTN Region,\r
- IN UINTN Alignment,\r
- OUT VOID **LegacyMemoryAddress\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN UINTN LegacyMemorySize,\r
+ IN UINTN Region,\r
+ IN UINTN Alignment,\r
+ OUT VOID **LegacyMemoryAddress\r
);\r
\r
/**\r
Get a region from the LegacyBios for Tiano usage. Can only be invoked once.\r
\r
- @param This Protocol instance pointer.\r
- @param LegacyMemorySize Size of data to copy\r
- @param LegacyMemoryAddress Legacy Region destination address\r
- Note: must be in region assigned by\r
- LegacyBiosGetLegacyRegion\r
- @param LegacyMemorySourceAddress\r
- Source of data\r
+ @param[in] This The protocol instance pointer.\r
+ @param[in] LegacyMemorySize The size of data to copy.\r
+ @param[in] LegacyMemoryAddress The Legacy Region destination address.\r
+ Note: must be in region assigned by\r
+ LegacyBiosGetLegacyRegion.\r
+ @param[in] LegacyMemorySourceAddress The source of the data to copy.\r
\r
- @retval EFI_SUCCESS Region assigned\r
- @retval EFI_ACCESS_DENIED Destination outside assigned region\r
+ @retval EFI_SUCCESS The Region assigned.\r
+ @retval EFI_ACCESS_DENIED Destination was outside an assigned region.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_BIOS_COPY_LEGACY_REGION)(\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN UINTN LegacyMemorySize,\r
- IN VOID *LegacyMemoryAddress,\r
- IN VOID *LegacyMemorySourceAddress\r
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
+ IN UINTN LegacyMemorySize,\r
+ IN VOID *LegacyMemoryAddress,\r
+ IN VOID *LegacyMemorySourceAddress\r
);\r
\r
-/**\r
- @par Protocol Description:\r
- Abstracts the traditional BIOS from the rest of EFI. The LegacyBoot()\r
- member function allows the BDS to support booting a traditional OS.\r
- EFI thunks drivers that make EFI bindings for BIOS INT services use\r
- all the other member functions.\r
-\r
- @param Int86\r
- Performs traditional software INT. See the Int86() function description.\r
-\r
- @param FarCall86\r
- Performs a far call into Compatibility16 or traditional OpROM code.\r
-\r
- @param CheckPciRom\r
- Checks if a traditional OpROM exists for this device.\r
-\r
- @param InstallPciRom\r
- Loads a traditional OpROM in traditional OpROM address space.\r
-\r
- @param LegacyBoot\r
- Boots a traditional OS.\r
-\r
- @param UpdateKeyboardLedStatus\r
- Updates BDA to reflect the current EFI keyboard LED status.\r
-\r
- @param GetBbsInfo\r
- Allows an external agent, such as BIOS Setup, to get the BBS data.\r
-\r
- @param ShadowAllLegacyOproms\r
- Causes all legacy OpROMs to be shadowed.\r
-\r
- @param PrepareToBootEfi\r
- Performs all actions prior to boot. Used when booting an EFI-aware OS\r
- rather than a legacy OS.\r
-\r
- @param GetLegacyRegion\r
- Allows EFI to reserve an area in the 0xE0000 or 0xF0000 block.\r
-\r
- @param CopyLegacyRegion\r
- Allows EFI to copy data to the area specified by GetLegacyRegion.\r
-\r
- @param BootUnconventionalDevice\r
- Allows the user to boot off an unconventional device such as a PARTIES partition.\r
-\r
-**/\r
+///\r
+/// Abstracts the traditional BIOS from the rest of EFI. The LegacyBoot()\r
+/// member function allows the BDS to support booting a traditional OS.\r
+/// EFI thunks drivers that make EFI bindings for BIOS INT services use\r
+/// all the other member functions.\r
+///\r
struct _EFI_LEGACY_BIOS_PROTOCOL {\r
+ ///\r
+ /// Performs traditional software INT. See the Int86() function description.\r
+ ///\r
EFI_LEGACY_BIOS_INT86 Int86;\r
+ \r
+ ///\r
+ /// Performs a far call into Compatibility16 or traditional OpROM code.\r
+ ///\r
EFI_LEGACY_BIOS_FARCALL86 FarCall86;\r
+ \r
+ ///\r
+ /// Checks if a traditional OpROM exists for this device.\r
+ ///\r
EFI_LEGACY_BIOS_CHECK_ROM CheckPciRom;\r
+ \r
+ ///\r
+ /// Loads a traditional OpROM in traditional OpROM address space.\r
+ ///\r
EFI_LEGACY_BIOS_INSTALL_ROM InstallPciRom;\r
+ \r
+ ///\r
+ /// Boots a traditional OS.\r
+ ///\r
EFI_LEGACY_BIOS_BOOT LegacyBoot;\r
+ \r
+ ///\r
+ /// Updates BDA to reflect the current EFI keyboard LED status.\r
+ ///\r
EFI_LEGACY_BIOS_UPDATE_KEYBOARD_LED_STATUS UpdateKeyboardLedStatus;\r
+ \r
+ ///\r
+ /// Allows an external agent, such as BIOS Setup, to get the BBS data.\r
+ ///\r
EFI_LEGACY_BIOS_GET_BBS_INFO GetBbsInfo;\r
+ \r
+ ///\r
+ /// Causes all legacy OpROMs to be shadowed.\r
+ ///\r
EFI_LEGACY_BIOS_SHADOW_ALL_LEGACY_OPROMS ShadowAllLegacyOproms;\r
+ \r
+ ///\r
+ /// Performs all actions prior to boot. Used when booting an EFI-aware OS\r
+ /// rather than a legacy OS. \r
+ ///\r
EFI_LEGACY_BIOS_PREPARE_TO_BOOT_EFI PrepareToBootEfi;\r
+ \r
+ ///\r
+ /// Allows EFI to reserve an area in the 0xE0000 or 0xF0000 block.\r
+ ///\r
EFI_LEGACY_BIOS_GET_LEGACY_REGION GetLegacyRegion;\r
+ \r
+ ///\r
+ /// Allows EFI to copy data to the area specified by GetLegacyRegion.\r
+ ///\r
EFI_LEGACY_BIOS_COPY_LEGACY_REGION CopyLegacyRegion;\r
+ \r
+ ///\r
+ /// Allows the user to boot off an unconventional device such as a PARTIES partition.\r
+ ///\r
EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE BootUnconventionalDevice;\r
};\r
\r
+//\r
+// Legacy BIOS needs to access memory in page 0 (0-4095), which is disabled if\r
+// NULL pointer detection feature is enabled. Following macro can be used to\r
+// enable/disable page 0 before/after accessing it.\r
+//\r
+#define ACCESS_PAGE0_CODE(statements) \\r
+ do { \\r
+ EFI_STATUS Status_; \\r
+ EFI_GCD_MEMORY_SPACE_DESCRIPTOR Desc_; \\r
+ \\r
+ Desc_.Attributes = 0; \\r
+ Status_ = gDS->GetMemorySpaceDescriptor (0, &Desc_); \\r
+ ASSERT_EFI_ERROR (Status_); \\r
+ if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) { \\r
+ Status_ = gDS->SetMemorySpaceAttributes ( \\r
+ 0, \\r
+ EFI_PAGES_TO_SIZE(1), \\r
+ Desc_.Attributes & ~(UINT64)EFI_MEMORY_RP \\r
+ ); \\r
+ ASSERT_EFI_ERROR (Status_); \\r
+ } \\r
+ \\r
+ { \\r
+ statements; \\r
+ } \\r
+ \\r
+ if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) { \\r
+ Status_ = gDS->SetMemorySpaceAttributes ( \\r
+ 0, \\r
+ EFI_PAGES_TO_SIZE(1), \\r
+ Desc_.Attributes \\r
+ ); \\r
+ ASSERT_EFI_ERROR (Status_); \\r
+ } \\r
+ } while (FALSE)\r
+\r
extern EFI_GUID gEfiLegacyBiosProtocolGuid;\r
\r
#endif\r
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