the Legacy BIOS protocol is generic and consumes this protocol.\r
A driver that matches the Legacy16 produces this protocol\r
\r
-Copyright (c) 2007 - 2011, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials are licensed and made available under \r
-the terms and conditions of the BSD License that accompanies this distribution. \r
+Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials are licensed and made available under\r
+the terms and conditions of the BSD License that accompanies this distribution.\r
The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php. \r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+http://opensource.org/licenses/bsd-license.php.\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
@par Revision Reference:\r
/// Bit 1 = 1 0xE0000 64 KB block.\r
/// Multiple bits can be set.\r
///\r
- /// Alignment Bit-mapped address alignment granularity. \r
+ /// Alignment Bit-mapped address alignment granularity.\r
/// The first nonzero bit from the right is the address granularity.\r
///\r
// LegacySegment Segment in which EfiCompatibility code will place the MP table.\r
/// Bit 1 = 1 0xE0000 64 KB block.\r
/// Multiple bits can be set.\r
///\r
- /// Alignment Bit mapped address alignment granularity. \r
+ /// Alignment Bit mapped address alignment granularity.\r
/// The first nonzero bit from the right is the address granularity.\r
///\r
/// LegacySegment Segment in which EfiCompatibility code will place the table or data.\r
/// IBVs normally use this mode for nonstandard Compatibility16 runtime 16 bit routines. It\r
/// is the responsibility of this routine to coalesce multiple OEM 16 bit functions, if they\r
/// exist, into one coherent package that is understandable by the Compatibility16 code.\r
- /// \r
+ ///\r
/// Example usage: A legacy mobile BIOS that has a pre-existing runtime\r
/// interface to return the battery status to calling applications.\r
///\r
/// Bit 1 = 1 0xE0000 64 KB block.\r
/// Multiple bits can be set.\r
///\r
- /// Alignment Bit mapped address alignment granularity. \r
+ /// Alignment Bit mapped address alignment granularity.\r
/// The first nonzero bit from the right is the address granularity.\r
///\r
/// LegacySegment Segment in which EfiCompatibility code will place the table or data.\r
/// IBVs normally use this mode for nonstandard Compatibility16 runtime 32 bit routines. It\r
/// is the responsibility of this routine to coalesce multiple OEM 32 bit functions, if they\r
/// exist, into one coherent package that is understandable by the Compatibility16 code.\r
-/// \r
+///\r
/// Example usage: A legacy mobile BIOS that has a pre existing runtime\r
/// interface to return the battery status to calling applications.\r
///\r
/// This mode is invoked twice. The first invocation has LegacySegment and\r
/// LegacyOffset set to 0. The mode returns the table address in EFI memory and its size.\r
-/// \r
+///\r
/// The second invocation has LegacySegment and LegacyOffset set to the location\r
/// in the 0xF0000 or 0xE0000 block to which the table is to be copied. The second\r
/// invocation allows any table address fix ups to occur in the EFI memory copy of the table.\r
/// Bit 1 = 1 0xE0000 64 KB block.\r
/// Multiple bits can be set.\r
///\r
-/// Alignment Bit mapped address alignment granularity. \r
+/// Alignment Bit mapped address alignment granularity.\r
/// The first nonzero bit from the right is the address granularity.\r
///\r
/// LegacySegment Segment in which EfiCompatibility code will place the table or data.\r
/// Bit 1 = 1 0xE0000 64 KB block.\r
/// Multiple bits can be set.\r
///\r
- /// Alignment Bit mapped address alignment granularity. \r
+ /// Alignment Bit mapped address alignment granularity.\r
/// The first nonzero bit from the right is the address granularity.\r
///\r
/// LegacySegment Segment in which EfiCompatibility code will place the table or data.\r
/// The function parameters associated with this mode are:\r
///\r
/// System ROM image for the platform.\r
- /// \r
+ ///\r
/// TableSize Size of Table in bytes.\r
- /// \r
+ ///\r
/// Location Ignored.\r
- /// \r
+ ///\r
/// Alignment Ignored.\r
- /// \r
+ ///\r
/// LegacySegment Ignored.\r
- /// \r
+ ///\r
/// LegacyOffset Ignored.\r
///\r
/// The return values associated with this mode are:\r
///\r
/// EFI_SUCCESS ROM image found.\r
- /// \r
+ ///\r
/// EFI_NOT_FOUND ROM not found.\r
///\r
EfiGetPlatformBinarySystemRom = 5,\r
/// The function parameters associated with this mode are:\r
///\r
/// Table System ROM image for the platform.\r
- /// \r
+ ///\r
/// TableSize Size of Table in bytes.\r
- /// \r
+ ///\r
/// Location Ignored.\r
- /// \r
+ ///\r
/// Alignment Ignored.\r
- /// \r
+ ///\r
/// LegacySegment Ignored.\r
- /// \r
+ ///\r
/// LegacyOffset Ignored.\r
///\r
/// The return values associated with this mode are:\r
/// HandleCount Number of VGA handles found.\r
///\r
/// AdditionalData NULL.\r
- /// \r
+ ///\r
EfiGetPlatformVgaHandle = 0,\r
///\r
/// This mode returns the Compatibility16 policy for the device that should be the IDE\r
///\r
/// Type 0.\r
///\r
- /// DeviceHandle Handle of device OpROM is associated with. \r
+ /// DeviceHandle Handle of device OpROM is associated with.\r
///\r
/// ShadowAddress Address where OpROM is shadowed.\r
///\r
///\r
/// Type 0.\r
///\r
- /// DeviceHandle Handle of device OpROM is associated with. \r
+ /// DeviceHandle Handle of device OpROM is associated with.\r
///\r
/// ShadowAddress Address where OpROM is shadowed.\r
///\r
/// Compatibility16Table NULL.\r
///\r
/// AdditionalData NULL.\r
- /// \r
+ ///\r
EfiPlatformHookAfterRomInit = 2\r
} EFI_GET_PLATFORM_HOOK_MODE;\r
\r
#define PCI_UNUSED 0x00\r
///\r
/// This IRQ has been assigned to PCI.\r
-/// \r
+///\r
#define PCI_USED 0xFF\r
///\r
/// This IRQ has been used by an SIO legacy device and cannot be used by PCI.\r
@param This The protocol instance pointer.\r
@param Mode Specifies what data to return. See See EFI_GET_PLATFORM_INFO_MODE enum.\r
@param Table Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.\r
- @param TableSize Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.\r
- @param Location Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.\r
+ @param TableSize Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.\r
+ @param Location Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.\r
@param Alignment Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.\r
@param LegacySegment Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.\r
@param LegacyOffset Mode specific. See EFI_GET_PLATFORM_INFO_MODE enum.\r
* A list of PCI IRQs and the priority order to assign them.\r
\r
@param This The protocol instance pointer.\r
- @param RoutingTable The pointer to PCI IRQ Routing table. \r
+ @param RoutingTable The pointer to PCI IRQ Routing table.\r
This location is the $PIR table minus the header.\r
@param RoutingTableEntries The number of entries in table.\r
@param LocalPirqTable $PIR table.\r
\r
/**\r
Translates the given PIRQ accounting for bridge.\r
- This function translates the given PIRQ back through all buses, if required, \r
+ This function translates the given PIRQ back through all buses, if required,\r
and returns the true PIRQ and associated IRQ.\r
\r
@param This The protocol instance pointer.\r
///\r
/// Gets $PIR table.\r
EFI_LEGACY_BIOS_PLATFORM_GET_ROUTING_TABLE GetRoutingTable;\r
- /// \r
+ ///\r
/// Translates the given PIRQ to the final value after traversing any PCI bridges.\r
///\r
EFI_LEGACY_BIOS_PLATFORM_TRANSLATE_PIRQ TranslatePirq;\r
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