/** @file\r
I/O Library.\r
-\r
+ The implementation of I/O operation for this library instance \r
+ are based on EFI_CPU_IO_PROTOCOL.\r
+ \r
Copyright (c) 2006, Intel Corporation<BR>\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
\r
**/\r
\r
-//\r
-// Include common header file for this module.\r
-//\r
-#include "CommonHeader.h"\r
\r
#include "DxeCpuIoLibInternal.h"\r
\r
{\r
EFI_STATUS Status;\r
\r
- Status = gBS->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid, NULL, &mPciRootBridgeIo);\r
+ Status = gBS->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid, NULL, (VOID **) &mPciRootBridgeIo);\r
if (EFI_ERROR (Status)) {\r
- Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, &mCpuIo);\r
+ Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID **) &mCpuIo);\r
}\r
ASSERT_EFI_ERROR (Status);\r
\r
UINT64 Data;\r
\r
if (mPciRootBridgeIo != NULL) {\r
- Status = mPciRootBridgeIo->Io.Read (mPciRootBridgeIo, Width, Port, 1, &Data);\r
+ Status = mPciRootBridgeIo->Io.Read (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Port, 1, &Data);\r
} else {\r
Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);\r
}\r
EFI_STATUS Status;\r
\r
if (mPciRootBridgeIo != NULL) {\r
- Status = mPciRootBridgeIo->Io.Write (mPciRootBridgeIo, Width, Port, 1, &Data);\r
+ Status = mPciRootBridgeIo->Io.Write (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Port, 1, &Data);\r
} else {\r
Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);\r
}\r
UINT64 Data;\r
\r
if (mPciRootBridgeIo != NULL) {\r
- Status = mPciRootBridgeIo->Mem.Read (mPciRootBridgeIo, Width, Address, 1, &Data);\r
+ Status = mPciRootBridgeIo->Mem.Read (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Address, 1, &Data);\r
} else {\r
Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);\r
}\r
@param Address The MMIO register to read.\r
The caller is responsible for aligning the Address if required.\r
@param Width The width of the I/O operation.\r
-\r
+ @param Data The value to write to the I/O port.\r
+ \r
@return Data read from registers in the EFI system memory space.\r
\r
**/\r
EFI_STATUS Status;\r
\r
if (mPciRootBridgeIo != NULL) {\r
- Status = mPciRootBridgeIo->Mem.Write (mPciRootBridgeIo, Width, Address, 1, &Data);\r
+ Status = mPciRootBridgeIo->Mem.Write (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Address, 1, &Data);\r
} else {\r
Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);\r
}\r