/** @file\r
I/O Library.\r
-\r
- Copyright (c) 2006, Intel Corporation<BR>\r
- All rights reserved. This program and the accompanying materials\r
+ The implementation of I/O operation for this library instance \r
+ are based on EFI_CPU_IO_PROTOCOL.\r
+ \r
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+ This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
**/\r
\r
-//\r
-// Include common header file for this module.\r
-//\r
-#include "CommonHeader.h"\r
\r
#include "DxeCpuIoLibInternal.h"\r
\r
//\r
// Globle varible to cache pointer to CpuIo protocol.\r
//\r
-STATIC EFI_CPU_IO_PROTOCOL *mCpuIo = NULL;\r
-STATIC EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *mPciRootBridgeIo = NULL;\r
+EFI_CPU_IO_PROTOCOL *mCpuIo = NULL;\r
\r
/**\r
The constructor function caches the pointer to CpuIo protocol.\r
IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
- Status = gBS->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid, NULL, &mPciRootBridgeIo);\r
- if (EFI_ERROR (Status)) {\r
- Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, &mCpuIo);\r
- }\r
+ Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID **) &mCpuIo);\r
ASSERT_EFI_ERROR (Status);\r
\r
return Status;\r
UINT64\r
EFIAPI\r
IoReadWorker (\r
- IN UINTN Port,\r
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r
+ IN UINTN Port,\r
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r
)\r
{\r
EFI_STATUS Status;\r
UINT64 Data;\r
\r
- if (mPciRootBridgeIo != NULL) {\r
- Status = mPciRootBridgeIo->Io.Read (mPciRootBridgeIo, Width, Port, 1, &Data);\r
- } else {\r
- Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);\r
- }\r
+ Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);\r
ASSERT_EFI_ERROR (Status);\r
\r
return Data;\r
UINT64\r
EFIAPI\r
IoWriteWorker (\r
- IN UINTN Port,\r
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
- IN UINT64 Data\r
+ IN UINTN Port,\r
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
+ IN UINT64 Data\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
- if (mPciRootBridgeIo != NULL) {\r
- Status = mPciRootBridgeIo->Io.Write (mPciRootBridgeIo, Width, Port, 1, &Data);\r
- } else {\r
- Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);\r
- }\r
+ Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);\r
ASSERT_EFI_ERROR (Status);\r
\r
return Data;\r
UINT64\r
EFIAPI\r
MmioReadWorker (\r
- IN UINTN Address,\r
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r
+ IN UINTN Address,\r
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT64 Data;\r
+ EFI_STATUS Status;\r
+ UINT64 Data;\r
\r
- if (mPciRootBridgeIo != NULL) {\r
- Status = mPciRootBridgeIo->Mem.Read (mPciRootBridgeIo, Width, Address, 1, &Data);\r
- } else {\r
- Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);\r
- }\r
+ Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);\r
ASSERT_EFI_ERROR (Status);\r
\r
return Data;\r
@param Address The MMIO register to read.\r
The caller is responsible for aligning the Address if required.\r
@param Width The width of the I/O operation.\r
-\r
+ @param Data The value to write to the I/O port.\r
+ \r
@return Data read from registers in the EFI system memory space.\r
\r
**/\r
UINT64\r
EFIAPI\r
MmioWriteWorker (\r
- IN UINTN Address,\r
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
- IN UINT64 Data\r
+ IN UINTN Address,\r
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
+ IN UINT64 Data\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
- if (mPciRootBridgeIo != NULL) {\r
- Status = mPciRootBridgeIo->Mem.Write (mPciRootBridgeIo, Width, Address, 1, &Data);\r
- } else {\r
- Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);\r
- }\r
+ Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);\r
ASSERT_EFI_ERROR (Status);\r
\r
return Data;\r
This function must guarantee that all I/O read and write operations are\r
serialized.\r
\r
+ If Port is not aligned on a 16-bit boundary, then ASSERT().\r
+ \r
If 16-bit I/O port operations are not supported, then ASSERT().\r
\r
@param Port The I/O port to read.\r
and returns Value. This function must guarantee that all I/O read and write\r
operations are serialized.\r
\r
+ If Port is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
If 16-bit I/O port operations are not supported, then ASSERT().\r
\r
@param Port The I/O port to write.\r
Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r
This function must guarantee that all I/O read and write operations are\r
serialized.\r
+ \r
+ If Port is not aligned on a 32-bit boundary, then ASSERT().\r
\r
If 32-bit I/O port operations are not supported, then ASSERT().\r
\r
and returns Value. This function must guarantee that all I/O read and write\r
operations are serialized.\r
\r
+ If Port is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
If 32-bit I/O port operations are not supported, then ASSERT().\r
\r
@param Port The I/O port to write.\r
This function must guarantee that all I/O read and write operations are\r
serialized.\r
\r
+ If Port is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
If 64-bit I/O port operations are not supported, then ASSERT().\r
\r
@param Port The I/O port to read.\r
and returns Value. This function must guarantee that all I/O read and write\r
operations are serialized.\r
\r
+ If Port is not aligned on a 64-bit boundary, then ASSERT().\r
+ \r
If 64-bit I/O port operations are not supported, then ASSERT().\r
\r
@param Port The I/O port to write.\r
returned. This function must guarantee that all MMIO read and write\r
operations are serialized.\r
\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ \r
If 16-bit MMIO register operations are not supported, then ASSERT().\r
\r
@param Address The MMIO register to read.\r
by Value and returns Value. This function must guarantee that all MMIO read\r
and write operations are serialized.\r
\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ \r
If 16-bit MMIO register operations are not supported, then ASSERT().\r
\r
@param Address The MMIO register to write.\r
returned. This function must guarantee that all MMIO read and write\r
operations are serialized.\r
\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ \r
If 32-bit MMIO register operations are not supported, then ASSERT().\r
\r
@param Address The MMIO register to read.\r
by Value and returns Value. This function must guarantee that all MMIO read\r
and write operations are serialized.\r
\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ \r
If 32-bit MMIO register operations are not supported, then ASSERT().\r
\r
@param Address The MMIO register to write.\r
returned. This function must guarantee that all MMIO read and write\r
operations are serialized.\r
\r
+ If Address is not aligned on a 64-bit boundary, then ASSERT().\r
+ \r
If 64-bit MMIO register operations are not supported, then ASSERT().\r
\r
@param Address The MMIO register to read.\r
by Value and returns Value. This function must guarantee that all MMIO read\r
and write operations are serialized.\r
\r
+ If Address is not aligned on a 64-bit boundary, then ASSERT().\r
+ \r
If 64-bit MMIO register operations are not supported, then ASSERT().\r
\r
@param Address The MMIO register to write.\r
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