#ifndef __FSP_HEADER_FILE_H__\r
#define __FSP_HEADER_FILE_H__\r
\r
-#define FSP_HEADER_REVISION_3 3\r
+#define FSP_HEADER_REVISION_3 3\r
\r
#define FSPE_HEADER_REVISION_1 1\r
#define FSPP_HEADER_REVISION_1 1\r
///\r
/// Fixed FSP header offset in the FSP image\r
///\r
-#define FSP_INFO_HEADER_OFF 0x94\r
+#define FSP_INFO_HEADER_OFF 0x94\r
\r
#define OFFSET_IN_FSP_INFO_HEADER(x) (UINT32)&((FSP_INFO_HEADER *)(UINTN)0)->x\r
\r
///\r
/// Byte 0x00: Signature ('FSPH') for the FSP Information Header.\r
///\r
- UINT32 Signature;\r
+ UINT32 Signature;\r
///\r
/// Byte 0x04: Length of the FSP Information Header.\r
///\r
- UINT32 HeaderLength;\r
+ UINT32 HeaderLength;\r
///\r
/// Byte 0x08: Reserved.\r
///\r
- UINT8 Reserved1[2];\r
+ UINT8 Reserved1[2];\r
///\r
/// Byte 0x0A: Indicates compliance with a revision of this specification in the BCD format.\r
/// For revision v2.3 the value will be 0x23.\r
///\r
- UINT8 SpecVersion;\r
+ UINT8 SpecVersion;\r
///\r
/// Byte 0x0B: Revision of the FSP Information Header.\r
/// The Current value for this field is 0x6.\r
///\r
- UINT8 HeaderRevision;\r
+ UINT8 HeaderRevision;\r
///\r
/// Byte 0x0C: Revision of the FSP binary.\r
/// Major.Minor.Revision.Build\r
/// 23 : 16 - Minor Version\r
/// 31 : 24 - Major Version\r
///\r
- UINT32 ImageRevision;\r
+ UINT32 ImageRevision;\r
///\r
/// Byte 0x10: Signature string that will help match the FSP Binary to a supported HW configuration.\r
///\r
- CHAR8 ImageId[8];\r
+ CHAR8 ImageId[8];\r
///\r
/// Byte 0x18: Size of the entire FSP binary.\r
///\r
- UINT32 ImageSize;\r
+ UINT32 ImageSize;\r
///\r
/// Byte 0x1C: FSP binary preferred base address.\r
///\r
- UINT32 ImageBase;\r
+ UINT32 ImageBase;\r
///\r
/// Byte 0x20: Attribute for the FSP binary.\r
///\r
- UINT16 ImageAttribute;\r
+ UINT16 ImageAttribute;\r
///\r
/// Byte 0x22: Attributes of the FSP Component.\r
///\r
- UINT16 ComponentAttribute;\r
+ UINT16 ComponentAttribute;\r
///\r
/// Byte 0x24: Offset of the FSP configuration region.\r
///\r
- UINT32 CfgRegionOffset;\r
+ UINT32 CfgRegionOffset;\r
///\r
/// Byte 0x28: Size of the FSP configuration region.\r
///\r
- UINT32 CfgRegionSize;\r
+ UINT32 CfgRegionSize;\r
///\r
/// Byte 0x2C: Reserved2.\r
///\r
- UINT32 Reserved2;\r
+ UINT32 Reserved2;\r
///\r
/// Byte 0x30: The offset for the API to setup a temporary stack till the memory is initialized.\r
///\r
- UINT32 TempRamInitEntryOffset;\r
+ UINT32 TempRamInitEntryOffset;\r
///\r
/// Byte 0x34: Reserved3.\r
///\r
- UINT32 Reserved3;\r
+ UINT32 Reserved3;\r
///\r
/// Byte 0x38: The offset for the API to inform the FSP about the different stages in the boot process.\r
///\r
- UINT32 NotifyPhaseEntryOffset;\r
+ UINT32 NotifyPhaseEntryOffset;\r
///\r
/// Byte 0x3C: The offset for the API to initialize the memory.\r
///\r
- UINT32 FspMemoryInitEntryOffset;\r
+ UINT32 FspMemoryInitEntryOffset;\r
///\r
/// Byte 0x40: The offset for the API to tear down temporary RAM.\r
///\r
- UINT32 TempRamExitEntryOffset;\r
+ UINT32 TempRamExitEntryOffset;\r
///\r
/// Byte 0x44: The offset for the API to initialize the CPU and chipset.\r
///\r
- UINT32 FspSiliconInitEntryOffset;\r
+ UINT32 FspSiliconInitEntryOffset;\r
///\r
/// Byte 0x48: Offset for the API for the optional Multi-Phase processor and chipset initialization.\r
/// This value is only valid if FSP HeaderRevision is >= 5.\r
/// If the value is set to 0x00000000, then this API is not available in this component.\r
///\r
- UINT32 FspMultiPhaseSiInitEntryOffset;\r
+ UINT32 FspMultiPhaseSiInitEntryOffset;\r
///\r
/// Byte 0x4C: Extended revision of the FSP binary.\r
/// This value is only valid if FSP HeaderRevision is >= 6.\r
/// Minor Version = ImageRevision[23:16]\r
/// Major Version = ImageRevision[31:24]\r
///\r
- UINT16 ExtendedImageRevision;\r
+ UINT16 ExtendedImageRevision;\r
///\r
/// Byte 0x4E: Reserved4.\r
///\r
- UINT16 Reserved4;\r
+ UINT16 Reserved4;\r
} FSP_INFO_HEADER;\r
\r
///\r
///\r
/// Byte 0x00: Signature ('FSPE') for the FSP Extended Information Header.\r
///\r
- UINT32 Signature;\r
+ UINT32 Signature;\r
///\r
/// Byte 0x04: Length of the table in bytes, including all additional FSP producer defined data.\r
///\r
- UINT32 Length;\r
+ UINT32 Length;\r
///\r
/// Byte 0x08: FSP producer defined revision of the table.\r
///\r
- UINT8 Revision;\r
+ UINT8 Revision;\r
///\r
/// Byte 0x09: Reserved for future use.\r
///\r
- UINT8 Reserved;\r
+ UINT8 Reserved;\r
///\r
/// Byte 0x0A: FSP producer identification string\r
///\r
- CHAR8 FspProducerId[6];\r
+ CHAR8 FspProducerId[6];\r
///\r
/// Byte 0x10: FSP producer implementation revision number. Larger numbers are assumed to be newer revisions.\r
///\r
- UINT32 FspProducerRevision;\r
+ UINT32 FspProducerRevision;\r
///\r
/// Byte 0x14: Size of the FSP producer defined data (n) in bytes.\r
///\r
- UINT32 FspProducerDataSize;\r
+ UINT32 FspProducerDataSize;\r
///\r
/// Byte 0x18: FSP producer defined data of size (n) defined by FspProducerDataSize.\r
///\r
// A generic table search algorithm for additional tables can be implemented with a\r
// signature search algorithm until a terminator signature 'FSPP' is found.\r
//\r
-#define FSP_FSPP_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'P')\r
+#define FSP_FSPP_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'P')\r
#define FSP_PATCH_TABLE_SIGNATURE FSP_FSPP_SIGNATURE\r
\r
///\r
///\r
/// Byte 0x00: FSP Patch Table Signature "FSPP".\r
///\r
- UINT32 Signature;\r
+ UINT32 Signature;\r
///\r
/// Byte 0x04: Size including the PatchData.\r
///\r
- UINT16 HeaderLength;\r
+ UINT16 HeaderLength;\r
///\r
/// Byte 0x06: Revision is set to 0x01.\r
///\r
- UINT8 HeaderRevision;\r
+ UINT8 HeaderRevision;\r
///\r
/// Byte 0x07: Reserved for future use.\r
///\r
- UINT8 Reserved;\r
+ UINT8 Reserved;\r
///\r
/// Byte 0x08: Number of entries to Patch.\r
///\r
- UINT32 PatchEntryNum;\r
+ UINT32 PatchEntryNum;\r
///\r
/// Byte 0x0C: Patch Data.\r
///\r
-//UINT32 PatchData[];\r
+ // UINT32 PatchData[];\r
} FSP_PATCH_TABLE;\r
\r
#pragma pack()\r
\r
-extern EFI_GUID gFspHeaderFileGuid;\r
+extern EFI_GUID gFspHeaderFileGuid;\r
\r
#endif\r
projects / mirror_edk2.git / blobdiff