IntelFsp2Pkg: FSP_TEMP_RAM_INIT call must follow X64 Calling Convention

[mirror_edk2.git] / IntelFsp2Pkg / Include / SaveRestoreSseAvxNasm.inc

diff --git a/IntelFsp2Pkg/Include/SaveRestoreSseAvxNasm.inc b/IntelFsp2Pkg/Include/SaveRestoreSseAvxNasm.inc
index e8bd91669d4924ae32af9a98e04c553c9cd59891..38c807a311cb3a8811cab1f5acfd4ffd731bfd01 100644 (file)
--- a/IntelFsp2Pkg/Include/SaveRestoreSseAvxNasm.inc
+++ b/IntelFsp2Pkg/Include/SaveRestoreSseAvxNasm.inc
@@ -177,6 +177,30 @@
             LXMMN   xmm5, %1, 1\r
             %endmacro\r
 \r
+;\r
+; Upper half of YMM10 to save/restore RCX\r
+;\r
+;\r
+; Save RCX to YMM10[128:191]\r
+; Modified: XMM5 and YMM10\r
+;\r
+\r
+%macro SAVE_RCX     0\r
+            LYMMN   ymm10, xmm5, 1\r
+            SXMMN   xmm5, 0, rcx\r
+            SYMMN   ymm10, 1, xmm5\r
+            %endmacro\r
+\r
+;\r
+; Restore RCX from YMM10[128:191]\r
+; Modified: XMM5 and RCX\r
+;\r
+\r
+%macro LOAD_RCX     0\r
+            LYMMN   ymm10, xmm5, 1\r
+            movq    rcx,  xmm5\r
+            %endmacro\r
+\r
 ;\r
 ; YMM7[128:191] for calling stack\r
 ; arg 1:Entry\r
@@ -231,6 +255,7 @@ NextAddress:
             ; Use CpuId instruction (CPUID.01H:EDX.SSE[bit 25] = 1) to test\r
             ; whether the processor supports SSE instruction.\r
             ;\r
+            mov     r10, rcx\r
             mov     rax, 1\r
             cpuid\r
             bt      rdx, 25\r
@@ -241,6 +266,7 @@ NextAddress:
             ;\r
             bt      ecx, 19\r
             jnc     SseError\r
+            mov     rcx,  r10\r
 \r
             ;\r
             ; Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)\r
@@ -258,6 +284,7 @@ NextAddress:
             %endmacro\r
 \r
 %macro ENABLE_AVX   0\r
+            mov     r10, rcx\r
             mov     eax, 1\r
             cpuid\r
             and     ecx, 10000000h\r
@@ -280,5 +307,6 @@ EnableAvx:
             xgetbv                 ; result in edx:eax\r
             or      eax, 00000006h ; Set XCR0 bit #1 and bit #2 to enable SSE state and AVX state\r
             xsetbv\r
+            mov     rcx, r10\r
             %endmacro\r
 \r