EmbeddedPkg/PrePiLib: Correct function name

[mirror_edk2.git] / IntelFsp2WrapperPkg / IntelFsp2WrapperPkg.dec

diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
index d9d2d80e12a548a278850109de196be8fd45cdeb..96f2858fb4b779a3888e1dfde24afa94c7247a01 100644 (file)
--- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
+++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
@@ -1,7 +1,7 @@
 ## @file\r
 # Provides drivers and definitions to support fsp in EDKII bios.\r
 #\r
-# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
 # This program and the accompanying materials are licensed and made available under\r
 # the terms and conditions of the BSD License that accompanies this distribution.\r
 # The full text of the license may be found at\r
@@ -71,10 +71,46 @@
   ## Indicate the PEI memory size platform want to report\r
   gIntelFsp2WrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT32|0x40000005\r
 \r
-  ## This is the base address of FSP-T/M/S\r
+  ## This is the base address of FSP-T\r
   gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT32|0x00000300\r
-  gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00000301\r
+\r
+  ## This PCD indicates if FSP APIs are skipped from FSP wrapper.<BR><BR>\r
+  #  If a bit is set, that means this FSP API is skipped.<BR>\r
+  #  If a bit is clear, that means this FSP API is NOT skipped.<BR>\r
+  #  NOTE: Only NotifyPhase Post PCI enumeration (BIT16) is implemented.<BR>\r
+  #  BIT[15:0] is for function:<BR>\r
+  #    BIT0    - Skip TempRamInit<BR>\r
+  #    BIT1    - Skip MemoryInit<BR>\r
+  #    BIT2    - Skip TempRamExit<BR>\r
+  #    BIT3    - Skip SiliconInit<BR>\r
+  #    BIT4    - Skip NotifyPhase<BR>\r
+  #  BIT[32:16] is for sub-function:<BR>\r
+  #    BIT16   - Skip NotifyPhase (AfterPciEnumeration)<BR>\r
+  #    BIT17   - Skip NotifyPhase (ReadyToBoot)<BR>\r
+  #    BIT18   - Skip NotifyPhase (EndOfFirmware)<BR>\r
+  #  Any undefined BITs are reserved for future use.<BR>\r
+  # @Prompt Skip FSP API from FSP wrapper.\r
+  gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x40000009\r
+\r
+  ## This PCD decides how Wrapper code utilizes FSP\r
+  # 0: DISPATCH mode (FSP Wrapper will load PeiCore from FSP without calling FSP API)\r
+  # 1: API mode (FSP Wrapper will call FSP API)\r
+  #\r
+  gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0x00000001|UINT8|0x4000000A\r
 \r
 [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx]\r
+  #\r
+  ## These are the base address of FSP-M/S\r
+  #\r
+  gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00001000\r
   gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32|0x00001001\r
-  
\ No newline at end of file
+  #\r
+  # To provide flexibility for platform to pre-allocate FSP UPD buffer\r
+  #\r
+  # The PCDs define the pre-allocated FSPM and FSPS UPD Data Buffer Address.\r
+  # 0x00000000 - Platform will not pre-allocate UPD buffer before FspWrapper module\r
+  # non-zero   - Platform will pre-allocate UPD buffer and patch this value to\r
+  #              buffer address before FspWrapper module executing.\r
+  #\r
+  gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0x00000000|UINT32|0x50000000\r
+  gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0x00000000|UINT32|0x50000001\r