Fsp1.1 update.

[mirror_edk2.git] / IntelFspPkg / FspSecCore / Ia32 / FspApiEntry.s

diff --git a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s
index 203efd9e424c58afa27113393aa404345d3de48e..995aef6088e9f160a5be03cfa1305a7041546e98 100644 (file)
--- a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s
+++ b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s
@@ -205,7 +205,7 @@ FspSelfCheckDfltExit:
 \r
 \r
 #------------------------------------------------------------------------------\r
-# PlatformBasicInitDflt\r
+# SecPlatformInitDflt\r
 # Inputs:\r
 #   eax -> Return address\r
 # Outputs:\r
@@ -214,15 +214,15 @@ FspSelfCheckDfltExit:
 #   eax is cleared and ebp is used for return address.\r
 #   All others reserved.\r
 #------------------------------------------------------------------------------\r
-ASM_GLOBAL ASM_PFX(PlatformBasicInitDflt)\r
-ASM_PFX(PlatformBasicInitDflt):\r
+ASM_GLOBAL ASM_PFX(SecPlatformInitDflt)\r
+ASM_PFX(SecPlatformInitDflt):\r
    #\r
    # Save return address to EBP\r
    #\r
    movl   %eax, %ebp\r
    xorl   %eax, %eax\r
 \r
-PlatformBasicInitDfltExit:\r
+SecPlatformInitDfltExit:\r
    jmp   *%ebp\r
 \r
 \r
@@ -244,7 +244,7 @@ ASM_PFX(LoadUcode):
    #\r
    # Save return address to EBP\r
    #\r
-   movd   %xmm7, %ebp\r
+   movd   %mm7, %ebp\r
 \r
    cmpl   $0x00, %esp\r
    jz     ParamError\r
@@ -451,8 +451,6 @@ LoadUcodeExit:
 #----------------------------------------------------------------------------\r
 # EstablishStackFsp\r
 #\r
-# Following is the code copied from BYTFSP, need to figure out what it is doing..\r
-#\r
 #----------------------------------------------------------------------------\r
 ASM_GLOBAL ASM_PFX(EstablishStackFsp)\r
 ASM_PFX(EstablishStackFsp):\r
@@ -487,9 +485,9 @@ EstablishStackFspExit:
   #\r
   pushl   $DATA_LEN_OF_PER0                  # Size of the data region\r
   pushl   $0x30524550                        # Signature of the  data region 'PER0'\r
-  movd    %xmm4, %eax\r
-  pushl   %eax\r
-  movd    %xmm5, %eax\r
+  LOAD_EDX\r
+  pushl   %edx\r
+  LOAD_EAX\r
   pushl   %eax\r
   rdtsc\r
   pushl   %edx\r
@@ -537,8 +535,16 @@ ASM_PFX(TempRamInitApi):
   # Save timestamp into XMM4 & XMM5\r
   #\r
   rdtsc\r
-  movd    %edx, %xmm4\r
-  movd    %eax, %xmm5\r
+  SAVE_EAX\r
+  SAVE_EDX\r
+\r
+  #\r
+  # Check Parameter\r
+  #\r
+  movl    4(%esp), %eax\r
+  cmpl    $0x00, %eax\r
+  movl    $0x80000002, %eax\r
+  jz      NemInitExit\r
 \r
   #\r
   # CPUID/DeviceID check\r
@@ -556,31 +562,35 @@ TempRamInitApiL0:
   movd    %mm7, %esi\r
   jmp     ASM_PFX(SecPlatformInit)\r
 TempRamInitApiL1:\r
+  cmpl    $0x00, %eax\r
+  jnz     NemInitExit\r
 \r
   #\r
-  # Call Sec CAR Init\r
+  # Load microcode\r
   #\r
-  movl    $TempRamInitApiL2, %esi            #CALL_MMX  SecCarInit\r
+  LOAD_ESP\r
+  movl    $TempRamInitApiL2, %esi            #CALL_MMX  LoadUcode\r
   movd    %mm7, %esi\r
-  jmp     ASM_PFX(SecCarInit)\r
+  jmp     ASM_PFX(LoadUcode)\r
 TempRamInitApiL2:\r
-\r
-  # @todo: ESP has been modified, we need to restore here.\r
-\r
-  LOAD_REGS\r
-  SAVE_REGS\r
+  cmpl    $0x00, %eax\r
+  jnz     NemInitExit\r
 \r
   #\r
-  # Load microcode\r
+  # Call Sec CAR Init\r
   #\r
-  movl    $TempRamInitApiL3, %esi            #CALL_MMX  LoadUcode\r
+  LOAD_ESP\r
+  movl    $TempRamInitApiL3, %esi            #CALL_MMX  SecCarInit\r
   movd    %mm7, %esi\r
-  jmp     ASM_PFX(LoadUcode)\r
+  jmp     ASM_PFX(SecCarInit)\r
 TempRamInitApiL3:\r
+  cmpl    $0x00, %eax\r
+  jnz     NemInitExit\r
 \r
   #\r
   # EstablishStackFsp\r
   #\r
+  LOAD_ESP\r
   movl    $TempRamInitApiL4, %esi            #CALL_MMX  EstablishStackFsp\r
   movd    %mm7, %esi\r
   jmp     ASM_PFX(EstablishStackFsp)\r