Update IntelFspPkg to support FSP1.1

[mirror_edk2.git] / IntelFspPkg / Library / SecFspSecPlatformLibNull / Ia32 / SecCarInit.asm

diff --git a/IntelFspPkg/Library/SecFspSecPlatformLibNull/Ia32/SecCarInit.asm b/IntelFspPkg/Library/SecFspSecPlatformLibNull/Ia32/SecCarInit.asm
new file mode 100644 (file)
index 0000000..31296e0
--- /dev/null
+++ b/IntelFspPkg/Library/SecFspSecPlatformLibNull/Ia32/SecCarInit.asm
@@ -0,0 +1,51 @@
+;; @file\r
+;  SEC CAR function\r
+;\r
+; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;;\r
+\r
+;\r
+; Define assembler characteristics\r
+;\r
+.586p\r
+.xmm\r
+.model flat, c\r
+\r
+RET_ESI  MACRO\r
+\r
+  movd    esi, mm7                      ; move ReturnAddress from MM7 to ESI\r
+  jmp     esi\r
+\r
+ENDM\r
+\r
+.code \r
+\r
+;-----------------------------------------------------------------------------\r
+;\r
+;  Section:     SecCarInit\r
+;\r
+;  Description: This function initializes the Cache for Data, Stack, and Code\r
+;\r
+;-----------------------------------------------------------------------------\r
+SecCarInit    PROC    NEAR    PUBLIC\r
+\r
+  ;\r
+  ; Set up CAR\r
+  ;\r
+\r
+  xor    eax, eax\r
+\r
+SecCarInitExit:\r
+\r
+  RET_ESI\r
+\r
+SecCarInit    ENDP\r
+\r
+END\r