Fsp1.1 update.

[mirror_edk2.git] / IntelFspWrapperPkg / FspInitPei / FspInitPei.c

diff --git a/IntelFspWrapperPkg/FspInitPei/FspInitPei.c b/IntelFspWrapperPkg/FspInitPei/FspInitPei.c
index 17a646836ab770e5426baf8201565c0b95e061f6..48a030709b03e73e282556660673f9953c2363bc 100644 (file)
--- a/IntelFspWrapperPkg/FspInitPei/FspInitPei.c
+++ b/IntelFspWrapperPkg/FspInitPei/FspInitPei.c
@@ -42,17 +42,21 @@ FspPeiEntryPoint (
     return EFI_DEVICE_ERROR;\r
   }\r
 \r
+  ASSERT (FspHeader->TempRamInitEntryOffset != 0);\r
+  ASSERT (FspHeader->FspInitEntryOffset != 0);\r
+  ASSERT (FspHeader->NotifyPhaseEntryOffset != 0);\r
+\r
   if ((PcdGet8 (PcdFspApiVersion) >= 2) &&\r
       (FspHeader->HeaderRevision >= FSP_HEADER_REVISION_2) &&\r
-      (FspHeader->ApiEntryNum >= 6) &&\r
-      (FspHeader->FspMemoryInitEntryOffset != 0) &&\r
-      (FspHeader->TempRamExitEntryOffset != 0) &&\r
-      (FspHeader->FspSiliconInitEntryOffset != 0) ) {\r
-    PcdFspApiVersion = FSP_HEADER_REVISION_2;\r
+      (FspHeader->ApiEntryNum >= 6) ) {\r
+    ASSERT (FspHeader->FspMemoryInitEntryOffset != 0);\r
+    ASSERT (FspHeader->TempRamExitEntryOffset != 0);\r
+    ASSERT (FspHeader->FspSiliconInitEntryOffset != 0);\r
+    PcdFspApiVersion = PcdGet8 (PcdFspApiVersion);\r
   }\r
   DEBUG ((DEBUG_INFO, "PcdFspApiVersion - 0x%x\n", PcdFspApiVersion));\r
 \r
-  if (PcdFspApiVersion == FSP_HEADER_REVISION_1) {\r
+  if (PcdFspApiVersion == 1) {\r
     PeiFspInitV1 (FspHeader);\r
   } else {\r
     PeiFspInitV2 (FspHeader);\r