]> git.proxmox.com Git - mirror_edk2.git/blobdiff - IntelFspWrapperPkg/IntelFspWrapperPkg.dec
IntelFsp2WrapperPkg: Revert 90c5bc08
[mirror_edk2.git] / IntelFspWrapperPkg / IntelFspWrapperPkg.dec
index b7e81d3a9266224614390b439de778895bd7c8c4..1fc8e2c48426e4a53b043b736128e032352b2e53 100644 (file)
 \r
 [LibraryClasses]\r
   ##  @libraryclass  Provide FSP API related function.\r
-  FspApiLib|IntelFspWrapperPkg/Include/Library/FspApiLib.h\r
+  FspApiLib|Include/Library/FspApiLib.h\r
 \r
   ##  @libraryclass  Provide FSP hob process related function.\r
-  FspHobProcessLib|IntelFspWrapperPkg/Include/Library/FspHobProcessLib.h\r
+  FspHobProcessLib|Include/Library/FspHobProcessLib.h\r
 \r
   ##  @libraryclass  Provide FSP platform information related function.\r
-  FspPlatformInfoLib|IntelFspWrapperPkg/Include/Library/FspPlatformInfoLib.h\r
+  FspPlatformInfoLib|Include/Library/FspPlatformInfoLib.h\r
 \r
   ##  @libraryclass  Provide FSP wrapper platform sec related function.\r
-  FspPlatformSecLib|IntelFspWrapperPkg/Include/Library/FspPlatformSecLib.h\r
+  FspPlatformSecLib|Include/Library/FspPlatformSecLib.h\r
 \r
 [Guids]\r
   #\r
   ## Provides the size of the BIOS Flash Device.\r
   gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00200000|UINT32|0x10000002\r
 \r
-  ## Indicates the base address of the FSP binary.\r
+  ## Indicates the base address of the factory FSP binary.\r
   gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFF80000|UINT32|0x10000003\r
-  ## Provides the size of the FSP binary.\r
+  ## Indicates the base address of the updatable FSP binary to support Dual FSP.\r
+  #  There could be two FSP images at different locations in a flash - \r
+  #  one factory version (default) and updatable version (updatable).\r
+  #  TempRamInit, FspMemoryInit and TempRamExit are always executed from factory version.\r
+  #  FspSiliconInit and NotifyPhase can be executed from updatable version if it is available,\r
+  #  FspSiliconInit and NotifyPhase are executed from factory version if there is no updateable version,\r
+  #  PcdFlashFvFspBase is base address of factory FSP, and PcdFlashFvSecondFspBase\r
+  #  is base address of updatable FSP. If PcdFlashFvSecondFspBase is 0, that means\r
+  #  there is no updatable FSP.\r
+  gFspWrapperTokenSpaceGuid.PcdFlashFvSecondFspBase|0x00000000|UINT32|0x10000008\r
+  ## Provides the size of the factory FSP binary.\r
   gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize|0x00048000|UINT32|0x10000004\r
+  ## Provides the size of the updatable FSP binary to support Dual FSP.\r
+  gFspWrapperTokenSpaceGuid.PcdFlashFvSecondFspSize|0x00000000|UINT32|0x10000009\r
 \r
   ## Indicates the base address of the first Microcode Patch in the Microcode Region\r
   gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x10000005\r