--- /dev/null
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution. The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+; SecEntry.asm\r
+;\r
+; Abstract:\r
+;\r
+; This is the code that goes from real-mode to protected mode.\r
+; It consumes the reset vector, calls TempRamInit API from FSP binary.\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+#include "Fsp.h"\r
+\r
+.686p\r
+.xmm\r
+.model small, c\r
+\r
+EXTRN CallPeiCoreEntryPoint:NEAR\r
+EXTRN TempRamInitParams:FAR\r
+\r
+; Pcds\r
+EXTRN PcdGet32 (PcdFlashFvFspBase):DWORD\r
+EXTRN PcdGet32 (PcdFlashFvFspSize):DWORD\r
+\r
+_TEXT_REALMODE SEGMENT PARA PUBLIC USE16 'CODE'\r
+ ASSUME CS:_TEXT_REALMODE, DS:_TEXT_REALMODE\r
+\r
+;----------------------------------------------------------------------------\r
+;\r
+; Procedure: _ModuleEntryPoint\r
+;\r
+; Input: None\r
+;\r
+; Output: None\r
+;\r
+; Destroys: Assume all registers\r
+;\r
+; Description:\r
+;\r
+; Transition to non-paged flat-model protected mode from a\r
+; hard-coded GDT that provides exactly two descriptors.\r
+; This is a bare bones transition to protected mode only\r
+; used for a while in PEI and possibly DXE.\r
+;\r
+; After enabling protected mode, a far jump is executed to\r
+; transfer to PEI using the newly loaded GDT.\r
+;\r
+; Return: None\r
+;\r
+; MMX Usage:\r
+; MM0 = BIST State\r
+; MM5 = Save time-stamp counter value high32bit\r
+; MM6 = Save time-stamp counter value low32bit.\r
+;\r
+;----------------------------------------------------------------------------\r
+\r
+align 4\r
+_ModuleEntryPoint PROC NEAR C PUBLIC\r
+ fninit ; clear any pending Floating point exceptions\r
+ ;\r
+ ; Store the BIST value in mm0\r
+ ;\r
+ movd mm0, eax\r
+\r
+ ;\r
+ ; Save time-stamp counter value\r
+ ; rdtsc load 64bit time-stamp counter to EDX:EAX\r
+ ;\r
+ rdtsc\r
+ movd mm5, edx\r
+ movd mm6, eax\r
+\r
+ ;\r
+ ; Load the GDT table in GdtDesc\r
+ ;\r
+ mov esi, OFFSET GdtDesc\r
+ DB 66h\r
+ lgdt fword ptr cs:[si]\r
+\r
+ ;\r
+ ; Transition to 16 bit protected mode\r
+ ;\r
+ mov eax, cr0 ; Get control register 0\r
+ or eax, 00000003h ; Set PE bit (bit #0) & MP bit (bit #1)\r
+ mov cr0, eax ; Activate protected mode\r
+\r
+ mov eax, cr4 ; Get control register 4\r
+ or eax, 00000600h ; Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)\r
+ mov cr4, eax\r
+\r
+ ;\r
+ ; Now we're in 16 bit protected mode\r
+ ; Set up the selectors for 32 bit protected mode entry\r
+ ;\r
+ mov ax, SYS_DATA_SEL\r
+ mov ds, ax\r
+ mov es, ax\r
+ mov fs, ax\r
+ mov gs, ax\r
+ mov ss, ax\r
+\r
+ ;\r
+ ; Transition to Flat 32 bit protected mode\r
+ ; The jump to a far pointer causes the transition to 32 bit mode\r
+ ;\r
+ mov esi, offset ProtectedModeEntryLinearAddress\r
+ jmp fword ptr cs:[si]\r
+\r
+_ModuleEntryPoint ENDP\r
+_TEXT_REALMODE ENDS\r
+\r
+_TEXT_PROTECTED_MODE SEGMENT PARA PUBLIC USE32 'CODE'\r
+ ASSUME CS:_TEXT_PROTECTED_MODE, DS:_TEXT_PROTECTED_MODE\r
+\r
+;----------------------------------------------------------------------------\r
+;\r
+; Procedure: ProtectedModeEntryPoint\r
+;\r
+; Input: None\r
+;\r
+; Output: None\r
+;\r
+; Destroys: Assume all registers\r
+;\r
+; Description:\r
+;\r
+; This function handles:\r
+; Call two basic APIs from FSP binary\r
+; Initializes stack with some early data (BIST, PEI entry, etc)\r
+;\r
+; Return: None\r
+;\r
+;----------------------------------------------------------------------------\r
+\r
+align 4\r
+ProtectedModeEntryPoint PROC NEAR PUBLIC\r
+\r
+ ; Find the fsp info header\r
+ mov edi, PcdGet32 (PcdFlashFvFspBase)\r
+ mov ecx, PcdGet32 (PcdFlashFvFspSize)\r
+\r
+ mov eax, dword ptr [edi + FVH_SIGINATURE_OFFSET]\r
+ cmp eax, FVH_SIGINATURE_VALID_VALUE\r
+ jnz FspHeaderNotFound\r
+\r
+ xor eax, eax\r
+ mov ax, word ptr [edi + FVH_EXTHEADER_OFFSET_OFFSET]\r
+ cmp ax, 0\r
+ jnz FspFvExtHeaderExist\r
+\r
+ xor eax, eax\r
+ mov ax, word ptr [edi + FVH_HEADER_LENGTH_OFFSET] ; Bypass Fv Header\r
+ add edi, eax\r
+ jmp FspCheckFfsHeader\r
+\r
+FspFvExtHeaderExist:\r
+ add edi, eax\r
+ mov eax, dword ptr [edi + FVH_EXTHEADER_SIZE_OFFSET] ; Bypass Ext Fv Header\r
+ add edi, eax\r
+\r
+ ; Round up to 8 byte alignment\r
+ mov eax, edi\r
+ and al, 07h\r
+ jz FspCheckFfsHeader\r
+\r
+ and edi, 0FFFFFFF8h\r
+ add edi, 08h\r
+\r
+FspCheckFfsHeader:\r
+ ; Check the ffs guid\r
+ mov eax, dword ptr [edi]\r
+ cmp eax, FSP_HEADER_GUID_DWORD1\r
+ jnz FspHeaderNotFound\r
+\r
+ mov eax, dword ptr [edi + 4]\r
+ cmp eax, FSP_HEADER_GUID_DWORD2\r
+ jnz FspHeaderNotFound\r
+\r
+ mov eax, dword ptr [edi + 8]\r
+ cmp eax, FSP_HEADER_GUID_DWORD3\r
+ jnz FspHeaderNotFound\r
+\r
+ mov eax, dword ptr [edi + 0Ch]\r
+ cmp eax, FSP_HEADER_GUID_DWORD4\r
+ jnz FspHeaderNotFound\r
+\r
+ add edi, FFS_HEADER_SIZE_VALUE ; Bypass the ffs header\r
+\r
+ ; Check the section type as raw section\r
+ mov al, byte ptr [edi + SECTION_HEADER_TYPE_OFFSET]\r
+ cmp al, 019h\r
+ jnz FspHeaderNotFound\r
+\r
+ add edi, RAW_SECTION_HEADER_SIZE_VALUE ; Bypass the section header\r
+ jmp FspHeaderFound\r
+\r
+FspHeaderNotFound:\r
+ jmp $\r
+\r
+FspHeaderFound:\r
+ ; Get the fsp TempRamInit Api address\r
+ mov eax, dword ptr [edi + FSP_HEADER_IMAGEBASE_OFFSET]\r
+ add eax, dword ptr [edi + FSP_HEADER_TEMPRAMINIT_OFFSET]\r
+\r
+ ; Setup the hardcode stack\r
+ mov esp, OFFSET TempRamInitStack\r
+\r
+ ; Call the fsp TempRamInit Api\r
+ jmp eax\r
+\r
+TempRamInitDone:\r
+ cmp eax, 0\r
+ jnz FspApiFailed\r
+\r
+ ; ECX: start of range\r
+ ; EDX: end of range\r
+ mov esp, edx\r
+ push edx\r
+ push ecx\r
+ push eax ; zero - no hob list yet\r
+ call CallPeiCoreEntryPoint\r
+\r
+FspApiFailed:\r
+ jmp $\r
+\r
+align 10h\r
+TempRamInitStack:\r
+ DD OFFSET TempRamInitDone\r
+ DD OFFSET TempRamInitParams\r
+\r
+ProtectedModeEntryPoint ENDP\r
+\r
+;\r
+; ROM-based Global-Descriptor Table for the Tiano PEI Phase\r
+;\r
+align 16\r
+PUBLIC BootGdtTable\r
+\r
+;\r
+; GDT[0]: 0x00: Null entry, never used.\r
+;\r
+NULL_SEL EQU $ - GDT_BASE ; Selector [0]\r
+GDT_BASE:\r
+BootGdtTable DD 0\r
+ DD 0\r
+;\r
+; Linear data segment descriptor\r
+;\r
+LINEAR_SEL EQU $ - GDT_BASE ; Selector [0x8]\r
+ DW 0FFFFh ; limit 0xFFFFF\r
+ DW 0 ; base 0\r
+ DB 0\r
+ DB 092h ; present, ring 0, data, expand-up, writable\r
+ DB 0CFh ; page-granular, 32-bit\r
+ DB 0\r
+;\r
+; Linear code segment descriptor\r
+;\r
+LINEAR_CODE_SEL EQU $ - GDT_BASE ; Selector [0x10]\r
+ DW 0FFFFh ; limit 0xFFFFF\r
+ DW 0 ; base 0\r
+ DB 0\r
+ DB 09Bh ; present, ring 0, data, expand-up, not-writable\r
+ DB 0CFh ; page-granular, 32-bit\r
+ DB 0\r
+;\r
+; System data segment descriptor\r
+;\r
+SYS_DATA_SEL EQU $ - GDT_BASE ; Selector [0x18]\r
+ DW 0FFFFh ; limit 0xFFFFF\r
+ DW 0 ; base 0\r
+ DB 0\r
+ DB 093h ; present, ring 0, data, expand-up, not-writable\r
+ DB 0CFh ; page-granular, 32-bit\r
+ DB 0\r
+\r
+;\r
+; System code segment descriptor\r
+;\r
+SYS_CODE_SEL EQU $ - GDT_BASE ; Selector [0x20]\r
+ DW 0FFFFh ; limit 0xFFFFF\r
+ DW 0 ; base 0\r
+ DB 0\r
+ DB 09Ah ; present, ring 0, data, expand-up, writable\r
+ DB 0CFh ; page-granular, 32-bit\r
+ DB 0\r
+;\r
+; Spare segment descriptor\r
+;\r
+SYS16_CODE_SEL EQU $ - GDT_BASE ; Selector [0x28]\r
+ DW 0FFFFh ; limit 0xFFFFF\r
+ DW 0 ; base 0\r
+ DB 0Eh ; Changed from F000 to E000.\r
+ DB 09Bh ; present, ring 0, code, expand-up, writable\r
+ DB 00h ; byte-granular, 16-bit\r
+ DB 0\r
+;\r
+; Spare segment descriptor\r
+;\r
+SYS16_DATA_SEL EQU $ - GDT_BASE ; Selector [0x30]\r
+ DW 0FFFFh ; limit 0xFFFF\r
+ DW 0 ; base 0\r
+ DB 0\r
+ DB 093h ; present, ring 0, data, expand-up, not-writable\r
+ DB 00h ; byte-granular, 16-bit\r
+ DB 0\r
+\r
+;\r
+; Spare segment descriptor\r
+;\r
+SPARE5_SEL EQU $ - GDT_BASE ; Selector [0x38]\r
+ DW 0 ; limit 0\r
+ DW 0 ; base 0\r
+ DB 0\r
+ DB 0 ; present, ring 0, data, expand-up, writable\r
+ DB 0 ; page-granular, 32-bit\r
+ DB 0\r
+GDT_SIZE EQU $ - BootGdtTable ; Size, in bytes\r
+\r
+;\r
+; GDT Descriptor\r
+;\r
+GdtDesc: ; GDT descriptor\r
+ DW GDT_SIZE - 1 ; GDT limit\r
+ DD OFFSET BootGdtTable ; GDT base address\r
+\r
+\r
+ProtectedModeEntryLinearAddress LABEL FWORD\r
+ProtectedModeEntryLinearOffset LABEL DWORD\r
+ DD OFFSET ProtectedModeEntryPoint ; Offset of our 32 bit code\r
+ DW LINEAR_CODE_SEL\r
+\r
+_TEXT_PROTECTED_MODE ENDS\r
+END\r