IntelSiliconPkg: Rename IGD structures to make it consistent

[mirror_edk2.git] / IntelSiliconPkg / Include / IndustryStandard / IgdOpRegion.h

diff --git a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
index 9982c9c9befed2ee985b12c3ed4c9aeb618d777f..7f76c09baecfca260ee81d674e5b9921d4e2b059 100644 (file)
--- a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
+++ b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
@@ -36,8 +36,9 @@
 **/\r
 #pragma pack(1)\r
 ///\r
-/// OpRegion header (mailbox 0) structure. The OpRegion Header is used to\r
+/// OpRegion Mailbox 0 Header structure. The OpRegion Header is used to\r
 /// identify a block of memory as the graphics driver OpRegion.\r
+/// Offset 0x0, Size 0x100\r
 ///\r
 typedef struct {\r
   CHAR8  SIGN[0x10];    ///< Offset 0x00 OpRegion Signature\r
@@ -49,16 +50,17 @@ typedef struct {
   UINT32 MBOX;          ///< Offset 0x58 Supported Mailboxes\r
   UINT32 DMOD;          ///< Offset 0x5C Driver Model\r
   UINT8  RSV1[0xA0];    ///< Offset 0x60 Reserved\r
-} INTEL_IGD_OPREGION_HEADER;\r
+} IGD_OPREGION_HEADER;\r
 \r
 ///\r
-/// OpRegion mailbox 1 (public ACPI Methods)\r
+/// OpRegion Mailbox 1 - Public ACPI Methods\r
+/// Offset 0x100, Size 0x100\r
 ///\r
 typedef struct {\r
   UINT32 DRDY;          ///< Offset 0x100 Driver Readiness\r
   UINT32 CSTS;          ///< Offset 0x104 Status\r
   UINT32 CEVT;          ///< Offset 0x108 Current Event\r
-  UINT8  RSV2[0x14];    ///< Offset 0x10C Reserved\r
+  UINT8  RSVD[0x14];    ///< Offset 0x10C Reserved Must be Zero\r
   UINT32 DIDL[8];       ///< Offset 0x120 Supported Display Devices ID List\r
   UINT32 CPDL[8];       ///< Offset 0x140 Currently Attached Display Devices List\r
   UINT32 CADL[8];       ///< Offset 0x160 Currently Active Display Devices List\r
@@ -73,20 +75,22 @@ typedef struct {
   UINT32 CNOT;          ///< Offset 0x1BC Current OS Notification\r
   UINT32 NRDY;          ///< Offset 0x1C0 Driver Status\r
   UINT8  RSV3[0x3C];    ///< Offset 0x1C4 - 0x1FF Reserved\r
-} INTEL_IGD_OPREGION_MBOX1;\r
+} IGD_OPREGION_MBOX1;\r
 \r
 ///\r
-/// OpRegion mailbox 2 (Software SCI Interface).\r
+/// OpRegion Mailbox 2 - Software SCI Interface\r
+/// Offset 0x200, Size 0x100\r
 ///\r
 typedef struct {\r
   UINT32 SCIC;          ///< Offset 0x200 Software SCI Command / Status / Data\r
   UINT32 PARM;          ///< Offset 0x204 Software SCI Parameters\r
   UINT32 DSLP;          ///< Offset 0x208 Driver Sleep Time Out\r
   UINT8  RSV4[0xF4];    ///< Offset 0x20C - 0x2FF Reserved\r
-} INTEL_IGD_OPREGION_MBOX2;\r
+} IGD_OPREGION_MBOX2;\r
 \r
 ///\r
-/// OpRegion mailbox 3 (BIOS/Driver Communication - ASLE Support).\r
+/// OpRegion Mailbox 3 - BIOS/Driver Notification - ASLE Support\r
+/// Offset 0x300, Size 0x100\r
 ///\r
 typedef struct {\r
   UINT32 ARDY;          ///< Offset 0x300 Driver Readiness\r
@@ -103,25 +107,26 @@ typedef struct {
   UINT32 PFMB;          ///< Offset 0x396 PWM Frequency and Minimum Brightness\r
   UINT32 CCDV;          ///< Offset 0x39A Color Correction Default Values\r
   UINT8  RSV5[0x62];    ///< Offset 0x39E - 0x3FF  Reserved\r
-} INTEL_IGD_OPREGION_MBOX3;\r
+} IGD_OPREGION_MBOX3;\r
 \r
 ///\r
-/// OpRegion mailbox 4 (VBT).\r
+/// OpRegion Mailbox 4 - VBT Video BIOS Table\r
+/// Offset 0x400, Size 0x1800\r
 ///\r
 typedef struct {\r
   UINT8  RVBT[0x1800];  ///< Offset 0x400 - 0x1BFF Raw VBT Data\r
-} INTEL_IGD_OPREGION_VBT;\r
+} IGD_OPREGION_MBOX4;\r
 \r
 ///\r
 /// IGD OpRegion Structure\r
 ///\r
 typedef struct {\r
-  INTEL_IGD_OPREGION_HEADER Header; ///< OpRegion header (Offset 0x0, Size 0x100)\r
-  INTEL_IGD_OPREGION_MBOX1  MBox1;  ///< Mailbox 1: Public ACPI Methods (Offset 0x100, Size 0x100)\r
-  INTEL_IGD_OPREGION_MBOX2  MBox2;  ///< Mailbox 2: Software SCI Interface (Offset 0x200, Size 0x100)\r
-  INTEL_IGD_OPREGION_MBOX3  MBox3;  ///< Mailbox 3: BIOS to Driver Communication (Offset 0x300, Size 0x100)\r
-  INTEL_IGD_OPREGION_VBT    VBT;    ///< Mailbox 4: Video BIOS Table (VBT) (Offset 0x400, Size 0x1200)\r
-} IGD_IGD_OPREGION_STRUCTURE;\r
+  IGD_OPREGION_HEADER Header; ///< OpRegion header (Offset 0x0, Size 0x100)\r
+  IGD_OPREGION_MBOX1  MBox1;  ///< Mailbox 1: Public ACPI Methods (Offset 0x100, Size 0x100)\r
+  IGD_OPREGION_MBOX2  MBox2;  ///< Mailbox 2: Software SCI Interface (Offset 0x200, Size 0x100)\r
+  IGD_OPREGION_MBOX3  MBox3;  ///< Mailbox 3: BIOS to Driver Notification (Offset 0x300, Size 0x100)\r
+  IGD_OPREGION_MBOX4  MBox4;  ///< Mailbox 4: Video BIOS Table (VBT) (Offset 0x400, Size 0x1800)\r
+} IGD_OPREGION_STRUCTURE;\r
 #pragma pack()\r
 \r
 #endif\r