BOOLEAN mVtdEnabled;\r
\r
/**\r
- Invalid VTd global IOTLB.\r
+ Flush VTD page table and context table memory.\r
\r
- @param[in] VtdIndex The index of VTd engine.\r
+ This action is to make sure the IOMMU engine can get final data in memory.\r
\r
- @retval EFI_SUCCESS VTd global IOTLB is invalidated.\r
- @retval EFI_DEVICE_ERROR VTd global IOTLB is not invalidated.\r
+ @param[in] VtdIndex The index used to identify a VTd engine.\r
+ @param[in] Base The base address of memory to be flushed.\r
+ @param[in] Size The size of memory in bytes to be flushed.\r
**/\r
-EFI_STATUS\r
-InvalidateVtdIOTLBGlobal (\r
+VOID\r
+FlushPageTableMemory (\r
+ IN UINTN VtdIndex,\r
+ IN UINTN Base,\r
+ IN UINTN Size\r
+ )\r
+{\r
+ if (mVtdUnitInformation[VtdIndex].ECapReg.Bits.C == 0) {\r
+ WriteBackDataCacheRange ((VOID *)Base, Size);\r
+ }\r
+}\r
+\r
+/**\r
+ Flush VTd engine write buffer.\r
+\r
+ @param[in] VtdIndex The index used to identify a VTd engine.\r
+**/\r
+VOID\r
+FlushWriteBuffer (\r
IN UINTN VtdIndex\r
)\r
{\r
- UINT64 Reg64;\r
UINT32 Reg32;\r
\r
- if (!mVtdEnabled) {\r
- return EFI_SUCCESS;\r
+ if (mVtdUnitInformation[VtdIndex].CapReg.Bits.RWBF != 0) {\r
+ Reg32 = MmioRead32 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + R_GSTS_REG);\r
+ MmioWrite32 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + R_GCMD_REG, Reg32 | B_GMCD_REG_WBF);\r
+ do {\r
+ Reg32 = MmioRead32 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + R_GSTS_REG);\r
+ } while ((Reg32 & B_GSTS_REG_WBF) != 0);\r
}\r
+}\r
\r
- DEBUG((DEBUG_VERBOSE, "InvalidateVtdIOTLBGlobal(%d)\n", VtdIndex));\r
-\r
- AsmWbinvd();\r
+/**\r
+ Invalidate VTd context cache.\r
\r
- //\r
- // Write Buffer Flush before invalidation\r
- //\r
- Reg32 = MmioRead32 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + R_CAP_REG);\r
- if ((Reg32 & B_CAP_REG_RWBF) != 0) {\r
- MmioWrite32 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + R_GCMD_REG, B_GMCD_REG_WBF);\r
- }\r
+ @param[in] VtdIndex The index used to identify a VTd engine.\r
+**/\r
+EFI_STATUS\r
+InvalidateContextCache (\r
+ IN UINTN VtdIndex\r
+ )\r
+{\r
+ UINT64 Reg64;\r
\r
- //\r
- // Invalidate the context cache\r
- //\r
Reg64 = MmioRead64 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + R_CCMD_REG);\r
if ((Reg64 & B_CCMD_REG_ICC) != 0) {\r
- DEBUG ((DEBUG_ERROR,"ERROR: InvalidateVtdIOTLBGlobal: B_CCMD_REG_ICC is set for VTD(%d)\n",VtdIndex));\r
+ DEBUG ((DEBUG_ERROR,"ERROR: InvalidateContextCache: B_CCMD_REG_ICC is set for VTD(%d)\n",VtdIndex));\r
return EFI_DEVICE_ERROR;\r
}\r
\r
Reg64 = MmioRead64 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + R_CCMD_REG);\r
} while ((Reg64 & B_CCMD_REG_ICC) != 0);\r
\r
- //\r
- // Invalidate the IOTLB cache\r
- //\r
-\r
- Reg64 = MmioRead64 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + (mVtdUnitInformation[VtdIndex].ECapReg.Bits.IRO * 16) + R_IOTLB_REG);\r
- if ((Reg64 & B_IOTLB_REG_IVT) != 0) {\r
- DEBUG ((DEBUG_ERROR,"ERROR: InvalidateVtdIOTLBGlobal: B_IOTLB_REG_IVT is set for VTD(%d)\n", VtdIndex));\r
- return EFI_DEVICE_ERROR;\r
- }\r
-\r
- Reg64 &= ((~B_IOTLB_REG_IVT) & (~B_IOTLB_REG_IIRG_MASK));\r
- Reg64 |= (B_IOTLB_REG_IVT | V_IOTLB_REG_IIRG_GLOBAL);\r
- MmioWrite64 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + (mVtdUnitInformation[VtdIndex].ECapReg.Bits.IRO * 16) + R_IOTLB_REG, Reg64);\r
-\r
- do {\r
- Reg64 = MmioRead64 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + (mVtdUnitInformation[VtdIndex].ECapReg.Bits.IRO * 16) + R_IOTLB_REG);\r
- } while ((Reg64 & B_IOTLB_REG_IVT) != 0);\r
-\r
- //\r
- // Disable VTd\r
- //\r
- MmioWrite32 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + R_GCMD_REG, B_GMCD_REG_SRTP);\r
- do {\r
- Reg32 = MmioRead32 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + R_GSTS_REG);\r
- } while((Reg32 & B_GSTS_REG_RTPS) == 0);\r
-\r
- //\r
- // Enable VTd\r
- //\r
- MmioWrite32 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + R_GCMD_REG, B_GMCD_REG_TE);\r
- do {\r
- Reg32 = MmioRead32 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + R_GSTS_REG);\r
- } while ((Reg32 & B_GSTS_REG_TE) == 0);\r
-\r
return EFI_SUCCESS;\r
}\r
\r
/**\r
- Invalid VTd IOTLB domain.\r
-\r
- @param[in] VtdIndex The index of VTd engine.\r
- @param[in] DomainIdentifier The domain ID of the source.\r
+ Invalidate VTd IOTLB.\r
\r
- @retval EFI_SUCCESS VTd IOTLB domain is invalidated.\r
- @retval EFI_DEVICE_ERROR VTd IOTLB domain is not invalidated.\r
+ @param[in] VtdIndex The index used to identify a VTd engine.\r
**/\r
EFI_STATUS\r
-InvalidateVtdIOTLBDomain (\r
- IN UINTN VtdIndex,\r
- IN UINT16 DomainIdentifier\r
+InvalidateIOTLB (\r
+ IN UINTN VtdIndex\r
)\r
{\r
UINT64 Reg64;\r
\r
- if (!mVtdEnabled) {\r
- return EFI_SUCCESS;\r
- }\r
-\r
- DEBUG((DEBUG_VERBOSE, "InvalidateVtdIOTLBDomain(%d): 0x%016lx (0x%04x)\n", VtdIndex, DomainIdentifier));\r
-\r
- //\r
- // Invalidate the context cache\r
- //\r
- Reg64 = MmioRead64 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + R_CCMD_REG);\r
- if ((Reg64 & B_CCMD_REG_ICC) != 0) {\r
- DEBUG ((DEBUG_ERROR,"ERROR: InvalidateVtdIOTLBDomain: B_CCMD_REG_ICC is set for VTD(%d)\n",VtdIndex));\r
- return EFI_DEVICE_ERROR;\r
- }\r
-\r
- Reg64 &= ((~B_CCMD_REG_ICC) & (~B_CCMD_REG_CIRG_MASK));\r
- Reg64 |= (B_CCMD_REG_ICC | V_CCMD_REG_CIRG_DOMAIN);\r
- Reg64 |= (B_CCMD_REG_ICC | V_CCMD_REG_CIRG_DOMAIN);\r
- MmioWrite64 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + R_CCMD_REG, Reg64);\r
-\r
- do {\r
- Reg64 = MmioRead64 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + R_CCMD_REG);\r
- } while ((Reg64 & B_CCMD_REG_ICC) != 0);\r
-\r
- //\r
- // Invalidate the IOTLB cache\r
- //\r
-\r
Reg64 = MmioRead64 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + (mVtdUnitInformation[VtdIndex].ECapReg.Bits.IRO * 16) + R_IOTLB_REG);\r
if ((Reg64 & B_IOTLB_REG_IVT) != 0) {\r
- DEBUG ((DEBUG_ERROR,"ERROR: InvalidateVtdIOTLBDomain: B_IOTLB_REG_IVT is set for VTD(%d)\n", VtdIndex));\r
+ DEBUG ((DEBUG_ERROR,"ERROR: InvalidateIOTLB: B_IOTLB_REG_IVT is set for VTD(%d)\n", VtdIndex));\r
return EFI_DEVICE_ERROR;\r
}\r
\r
Reg64 &= ((~B_IOTLB_REG_IVT) & (~B_IOTLB_REG_IIRG_MASK));\r
- Reg64 |= (B_IOTLB_REG_IVT | V_IOTLB_REG_IIRG_DOMAIN);\r
- Reg64 |= LShiftU64 (DomainIdentifier, 32);\r
+ Reg64 |= (B_IOTLB_REG_IVT | V_IOTLB_REG_IIRG_GLOBAL);\r
MmioWrite64 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + (mVtdUnitInformation[VtdIndex].ECapReg.Bits.IRO * 16) + R_IOTLB_REG, Reg64);\r
\r
do {\r
}\r
\r
/**\r
- Invalid VTd IOTLB page.\r
+ Invalid VTd global IOTLB.\r
\r
@param[in] VtdIndex The index of VTd engine.\r
- @param[in] Address The address of IOTLB page.\r
- @param[in] AddressMode The address mode of IOTLB page.\r
- @param[in] DomainIdentifier The domain ID of the source.\r
\r
- @retval EFI_SUCCESS VTd IOTLB page is invalidated.\r
- @retval EFI_DEVICE_ERROR VTd IOTLB page is not invalidated.\r
+ @retval EFI_SUCCESS VTd global IOTLB is invalidated.\r
+ @retval EFI_DEVICE_ERROR VTd global IOTLB is not invalidated.\r
**/\r
EFI_STATUS\r
-InvalidateVtdIOTLBPage (\r
- IN UINTN VtdIndex,\r
- IN UINT64 Address,\r
- IN UINT8 AddressMode,\r
- IN UINT16 DomainIdentifier\r
+InvalidateVtdIOTLBGlobal (\r
+ IN UINTN VtdIndex\r
)\r
{\r
- UINT64 Reg64;\r
- UINT64 Data64;\r
-\r
if (!mVtdEnabled) {\r
return EFI_SUCCESS;\r
}\r
\r
- DEBUG((DEBUG_VERBOSE, "InvalidateVtdIOTLBPage(%d): 0x%016lx (0x%02x)\n", VtdIndex, Address, AddressMode));\r
-\r
- if (mVtdUnitInformation[VtdIndex].CapReg.Bits.PSI != 0) {\r
- Reg64 = MmioRead64 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + (mVtdUnitInformation[VtdIndex].ECapReg.Bits.IRO * 16) + R_IOTLB_REG);\r
- if ((Reg64 & B_IOTLB_REG_IVT) != 0) {\r
- DEBUG ((DEBUG_ERROR,"ERROR: InvalidateVtdIOTLBPage: B_IOTLB_REG_IVT is set for VTD(%d)\n", VtdIndex));\r
- return EFI_DEVICE_ERROR;\r
- }\r
+ DEBUG((DEBUG_VERBOSE, "InvalidateVtdIOTLBGlobal(%d)\n", VtdIndex));\r
\r
- Data64 = Address | AddressMode;\r
- MmioWrite64 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + (mVtdUnitInformation[VtdIndex].ECapReg.Bits.IRO * 16) + R_IVA_REG, Data64);\r
+ //\r
+ // Write Buffer Flush before invalidation\r
+ //\r
+ FlushWriteBuffer (VtdIndex);\r
\r
- Reg64 &= ((~B_IOTLB_REG_IVT) & (~B_IOTLB_REG_IIRG_MASK));\r
- Reg64 |= (B_IOTLB_REG_IVT | V_IOTLB_REG_IIRG_PAGE);\r
- Reg64 |= LShiftU64 (DomainIdentifier, 32);\r
- MmioWrite64 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + (mVtdUnitInformation[VtdIndex].ECapReg.Bits.IRO * 16) + R_IOTLB_REG, Reg64);\r
+ //\r
+ // Invalidate the context cache\r
+ //\r
+ if (mVtdUnitInformation[VtdIndex].HasDirtyContext) {\r
+ InvalidateContextCache (VtdIndex);\r
+ }\r
\r
- do {\r
- Reg64 = MmioRead64 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + (mVtdUnitInformation[VtdIndex].ECapReg.Bits.IRO * 16) + R_IOTLB_REG);\r
- } while ((Reg64 & B_IOTLB_REG_IVT) != 0);\r
- } else {\r
- InvalidateVtdIOTLBGlobal (VtdIndex);\r
+ //\r
+ // Invalidate the IOTLB cache\r
+ //\r
+ if (mVtdUnitInformation[VtdIndex].HasDirtyContext || mVtdUnitInformation[VtdIndex].HasDirtyPages) {\r
+ InvalidateIOTLB (VtdIndex);\r
}\r
\r
return EFI_SUCCESS;\r
}\r
\r
DomainNumber = (UINTN)1 << (UINT8)((UINTN)mVtdUnitInformation[Index].CapReg.Bits.ND * 2 + 4);\r
- if (mVtdUnitInformation[Index].PciDeviceInfo.PciDescriptorNumber >= DomainNumber) {\r
- DEBUG((DEBUG_ERROR, "!!!! Pci device Number(0x%x) >= DomainNumber(0x%x) !!!!\n", mVtdUnitInformation[Index].PciDeviceInfo.PciDescriptorNumber, DomainNumber));\r
+ if (mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceDataNumber >= DomainNumber) {\r
+ DEBUG((DEBUG_ERROR, "!!!! Pci device Number(0x%x) >= DomainNumber(0x%x) !!!!\n", mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceDataNumber, DomainNumber));\r
return ;\r
}\r
}\r
return ;\r
}\r
\r
+/**\r
+ Disable PMR in all VTd engine.\r
+**/\r
+VOID\r
+DisablePmr (\r
+ VOID\r
+ )\r
+{\r
+ UINT32 Reg32;\r
+ VTD_CAP_REG CapReg;\r
+ UINTN Index;\r
+\r
+ DEBUG ((DEBUG_INFO,"DisablePmr\n"));\r
+ for (Index = 0; Index < mVtdUnitNumber; Index++) {\r
+ CapReg.Uint64 = MmioRead64 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_CAP_REG);\r
+ if (CapReg.Bits.PLMR == 0 || CapReg.Bits.PHMR == 0) {\r
+ continue ;\r
+ }\r
+\r
+ Reg32 = MmioRead32 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_PMEN_ENABLE_REG);\r
+ if ((Reg32 & BIT0) != 0) {\r
+ MmioWrite32 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_PMEN_ENABLE_REG, 0x0);\r
+ do {\r
+ Reg32 = MmioRead32 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_PMEN_ENABLE_REG);\r
+ } while((Reg32 & BIT0) != 0);\r
+ DEBUG ((DEBUG_INFO,"Pmr(%d) disabled\n", Index));\r
+ } else {\r
+ DEBUG ((DEBUG_INFO,"Pmr(%d) not enabled\n", Index));\r
+ }\r
+ }\r
+ return ;\r
+}\r
+\r
/**\r
Enable DMAR translation.\r
\r
)\r
{\r
UINTN Index;\r
- UINT64 Reg64;\r
UINT32 Reg32;\r
\r
- AsmWbinvd();\r
-\r
for (Index = 0; Index < mVtdUnitNumber; Index++) {\r
DEBUG((DEBUG_INFO, ">>>>>>EnableDmar() for engine [%d] \n", Index));\r
\r
//\r
// Write Buffer Flush before invalidation\r
//\r
- Reg32 = MmioRead32 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_CAP_REG);\r
- if ((Reg32 & B_CAP_REG_RWBF) != 0) {\r
- MmioWrite32 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_GCMD_REG, B_GMCD_REG_WBF);\r
- }\r
+ FlushWriteBuffer (Index);\r
\r
//\r
// Invalidate the context cache\r
//\r
- Reg64 = MmioRead64 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_CCMD_REG);\r
- if ((Reg64 & B_CCMD_REG_ICC) != 0) {\r
- DEBUG ((DEBUG_INFO,"ERROR: EnableDmar: B_CCMD_REG_ICC is set for VTD(%d)\n",Index));\r
- return EFI_DEVICE_ERROR;\r
- }\r
-\r
- Reg64 &= ((~B_CCMD_REG_ICC) & (~B_CCMD_REG_CIRG_MASK));\r
- Reg64 |= (B_CCMD_REG_ICC | V_CCMD_REG_CIRG_GLOBAL);\r
- MmioWrite64 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_CCMD_REG, Reg64);\r
-\r
- DEBUG((DEBUG_INFO, "EnableDmar: Waiting B_CCMD_REG_ICC ...\n"));\r
- do {\r
- Reg64 = MmioRead64 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_CCMD_REG);\r
- } while ((Reg64 & B_CCMD_REG_ICC) != 0);\r
+ InvalidateContextCache (Index);\r
\r
//\r
// Invalidate the IOTLB cache\r
//\r
- DEBUG((DEBUG_INFO, "EnableDmar: IRO 0x%x\n", mVtdUnitInformation[Index].ECapReg.Bits.IRO));\r
-\r
- Reg64 = MmioRead64 (mVtdUnitInformation[Index].VtdUnitBaseAddress + (mVtdUnitInformation[Index].ECapReg.Bits.IRO * 16) + R_IOTLB_REG);\r
- if ((Reg64 & B_IOTLB_REG_IVT) != 0) {\r
- DEBUG ((DEBUG_INFO,"ERROR: EnableDmar: B_IOTLB_REG_IVT is set for VTD(%d)\n", Index));\r
- return EFI_DEVICE_ERROR;\r
- }\r
-\r
- Reg64 &= ((~B_IOTLB_REG_IVT) & (~B_IOTLB_REG_IIRG_MASK));\r
- Reg64 |= (B_IOTLB_REG_IVT | V_IOTLB_REG_IIRG_GLOBAL);\r
- MmioWrite64 (mVtdUnitInformation[Index].VtdUnitBaseAddress + (mVtdUnitInformation[Index].ECapReg.Bits.IRO * 16) + R_IOTLB_REG, Reg64);\r
-\r
- DEBUG((DEBUG_INFO, "EnableDmar: Waiting B_IOTLB_REG_IVT ...\n"));\r
- do {\r
- Reg64 = MmioRead64 (mVtdUnitInformation[Index].VtdUnitBaseAddress + (mVtdUnitInformation[Index].ECapReg.Bits.IRO * 16) + R_IOTLB_REG);\r
- } while ((Reg64 & B_IOTLB_REG_IVT) != 0);\r
+ InvalidateIOTLB (Index);\r
\r
//\r
// Enable VTd\r
DEBUG ((DEBUG_INFO,"VTD (%d) enabled!<<<<<<\n",Index));\r
}\r
\r
+ //\r
+ // Need disable PMR, since we already setup translation table.\r
+ //\r
+ DisablePmr ();\r
+\r
mVtdEnabled = TRUE;\r
\r
return EFI_SUCCESS;\r
)\r
{\r
UINTN Index;\r
+ UINTN SubIndex;\r
UINT32 Reg32;\r
\r
- AsmWbinvd();\r
-\r
for (Index = 0; Index < mVtdUnitNumber; Index++) {\r
DEBUG((DEBUG_INFO, ">>>>>>DisableDmar() for engine [%d] \n", Index));\r
\r
//\r
// Write Buffer Flush before invalidation\r
//\r
- Reg32 = MmioRead32 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_CAP_REG);\r
- if ((Reg32 & B_CAP_REG_RWBF) != 0) {\r
- MmioWrite32 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_GCMD_REG, B_GMCD_REG_WBF);\r
- }\r
+ FlushWriteBuffer (Index);\r
\r
//\r
// Disable VTd\r
\r
mVtdEnabled = FALSE;\r
\r
+ for (Index = 0; Index < mVtdUnitNumber; Index++) {\r
+ DEBUG((DEBUG_INFO, "engine [%d] access\n", Index));\r
+ for (SubIndex = 0; SubIndex < mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceDataNumber; SubIndex++) {\r
+ DEBUG ((DEBUG_INFO, " PCI S%04X B%02x D%02x F%02x - %d\n",\r
+ mVtdUnitInformation[Index].Segment,\r
+ mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceData[Index].PciSourceId.Bits.Bus,\r
+ mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceData[Index].PciSourceId.Bits.Device,\r
+ mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceData[Index].PciSourceId.Bits.Function,\r
+ mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceData[Index].AccessCount\r
+ ));\r
+ }\r
+ }\r
+\r
return EFI_SUCCESS;\r
}\r
\r
FrcdReg.Uint64[1] = MmioRead64 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + ((CapReg.Bits.FRO * 16) + (Index * 16) + R_FRCD_REG + sizeof(UINT64)));\r
DEBUG((DEBUG_INFO, " FRCD_REG[%d] - 0x%016lx %016lx\n", Index, FrcdReg.Uint64[1], FrcdReg.Uint64[0]));\r
if (FrcdReg.Uint64[1] != 0 || FrcdReg.Uint64[0] != 0) {\r
- DEBUG((DEBUG_INFO, " Fault Info - 0x%016lx\n", LShiftU64(FrcdReg.Bits.FI, 12)));\r
+ DEBUG((DEBUG_INFO, " Fault Info - 0x%016lx\n", VTD_64BITS_ADDRESS(FrcdReg.Bits.FILo, FrcdReg.Bits.FIHi)));\r
SourceId.Uint16 = (UINT16)FrcdReg.Bits.SID;\r
DEBUG((DEBUG_INFO, " Source - B%02x D%02x F%02x\n", SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function));\r
DEBUG((DEBUG_INFO, " Type - %x (%a)\n", FrcdReg.Bits.T, FrcdReg.Bits.T ? "read" : "write"));\r
for (Index = 0; Index < (UINTN)CapReg.Bits.NFR + 1; Index++) {\r
FrcdReg.Uint64[0] = MmioRead64 (mVtdUnitInformation[Num].VtdUnitBaseAddress + ((CapReg.Bits.FRO * 16) + (Index * 16) + R_FRCD_REG));\r
FrcdReg.Uint64[1] = MmioRead64 (mVtdUnitInformation[Num].VtdUnitBaseAddress + ((CapReg.Bits.FRO * 16) + (Index * 16) + R_FRCD_REG + sizeof(UINT64)));\r
- if ((FrcdReg.Uint64[0] != 0) || (FrcdReg.Uint64[1] != 0)) {\r
+ if (FrcdReg.Bits.F != 0) {\r
HasError = TRUE;\r
}\r
}\r
\r
if (HasError) {\r
- DEBUG((DEBUG_INFO, "#### ERROR ####\n"));\r
+ DEBUG((DEBUG_INFO, "\n#### ERROR ####\n"));\r
DumpVtdRegs (Num);\r
- DEBUG((DEBUG_INFO, "#### ERROR ####\n"));\r
+ DEBUG((DEBUG_INFO, "#### ERROR ####\n\n"));\r
+ //\r
+ // Clear\r
+ //\r
+ for (Index = 0; Index < (UINTN)CapReg.Bits.NFR + 1; Index++) {\r
+ FrcdReg.Uint64[1] = MmioRead64 (mVtdUnitInformation[Num].VtdUnitBaseAddress + ((CapReg.Bits.FRO * 16) + (Index * 16) + R_FRCD_REG + sizeof(UINT64)));\r
+ if (FrcdReg.Bits.F != 0) {\r
+ FrcdReg.Bits.F = 0;\r
+ MmioWrite64 (mVtdUnitInformation[Num].VtdUnitBaseAddress + ((CapReg.Bits.FRO * 16) + (Index * 16) + R_FRCD_REG + sizeof(UINT64)), FrcdReg.Uint64[1]);\r
+ }\r
+ MmioWrite32 (mVtdUnitInformation[Num].VtdUnitBaseAddress + R_FSTS_REG, MmioRead32 (mVtdUnitInformation[Num].VtdUnitBaseAddress + R_FSTS_REG));\r
+ }\r
}\r
}\r
}\r
projects / mirror_edk2.git / blobdiff